196    am->Aam.IRRS.imm   = imm32;  in AMD64AMode_IRRS()
197    am->Aam.IRRS.base  = base;  in AMD64AMode_IRRS()
198    am->Aam.IRRS.index = indEx;  in AMD64AMode_IRRS()
199    am->Aam.IRRS.shift = shift;  in AMD64AMode_IRRS()
215          vex_printf("0x%x(", am->Aam.IRRS.imm);  in ppAMD64AMode()
216          ppHRegAMD64(am->Aam.IRRS.base);  in ppAMD64AMode()
218          ppHRegAMD64(am->Aam.IRRS.index);  in ppAMD64AMode()
219          vex_printf(",%d)", 1 << am->Aam.IRRS.shift);  in ppAMD64AMode()
232          addHRegUse(u, HRmRead, am->Aam.IRRS.base);  in addRegUsage_AMD64AMode()
233          addHRegUse(u, HRmRead, am->Aam.IRRS.index);  in addRegUsage_AMD64AMode()
246          am->Aam.IRRS.base = lookupHRegRemap(m, am->Aam.IRRS.base);  in mapRegs_AMD64AMode()
247          am->Aam.IRRS.index = lookupHRegRemap(m, am->Aam.IRRS.index);  in mapRegs_AMD64AMode()
2116       if (fits8bits(am->Aam.IRRS.imm)  in doAMode_M__wrk()
2117           && ! sameHReg(am->Aam.IRRS.index, hregAMD64_RSP())) {  in doAMode_M__wrk()
2119          *p++ = mkSIB(am->Aam.IRRS.shift, iregEnc210(am->Aam.IRRS.index),  in doAMode_M__wrk()
2120                                           iregEnc210(am->Aam.IRRS.base));  in doAMode_M__wrk()
2121          *p++ = toUChar(am->Aam.IRRS.imm & 0xFF);  in doAMode_M__wrk()
2124       if (! sameHReg(am->Aam.IRRS.index, hregAMD64_RSP())) {  in doAMode_M__wrk()
2126          *p++ = mkSIB(am->Aam.IRRS.shift, iregEnc210(am->Aam.IRRS.index),  in doAMode_M__wrk()
2127                                           iregEnc210(am->Aam.IRRS.base));  in doAMode_M__wrk()
2128          p = emit32(p, am->Aam.IRRS.imm);  in doAMode_M__wrk()
2204       UChar X = iregEnc3(am->Aam.IRRS.index);  in rexAMode_M__wrk()
2205       UChar B = iregEnc3(am->Aam.IRRS.base);  in rexAMode_M__wrk()