Lines Matching refs:VFCSel
1148 i->ARM64in.VFCSel.dst = dst; in ARM64Instr_VFCSel()
1149 i->ARM64in.VFCSel.argL = argL; in ARM64Instr_VFCSel()
1150 i->ARM64in.VFCSel.argR = argR; in ARM64Instr_VFCSel()
1151 i->ARM64in.VFCSel.cond = cond; in ARM64Instr_VFCSel()
1152 i->ARM64in.VFCSel.isD = isD; in ARM64Instr_VFCSel()
1730 = (i->ARM64in.VFCSel.isD ? ppHRegARM64 : ppHRegARM64asSreg); in ppARM64Instr()
1732 ppHRegARM64fp(i->ARM64in.VFCSel.dst); in ppARM64Instr()
1734 ppHRegARM64fp(i->ARM64in.VFCSel.argL); in ppARM64Instr()
1736 ppHRegARM64fp(i->ARM64in.VFCSel.argR); in ppARM64Instr()
1737 vex_printf(", %s", showARM64CondCode(i->ARM64in.VFCSel.cond)); in ppARM64Instr()
2139 addHRegUse(u, HRmRead, i->ARM64in.VFCSel.argL); in getRegUsage_ARM64Instr()
2140 addHRegUse(u, HRmRead, i->ARM64in.VFCSel.argR); in getRegUsage_ARM64Instr()
2141 addHRegUse(u, HRmWrite, i->ARM64in.VFCSel.dst); in getRegUsage_ARM64Instr()
2384 i->ARM64in.VFCSel.argL = lookupHRegRemap(m, i->ARM64in.VFCSel.argL); in mapRegs_ARM64Instr()
2385 i->ARM64in.VFCSel.argR = lookupHRegRemap(m, i->ARM64in.VFCSel.argR); in mapRegs_ARM64Instr()
2386 i->ARM64in.VFCSel.dst = lookupHRegRemap(m, i->ARM64in.VFCSel.dst); in mapRegs_ARM64Instr()
4158 Bool isD = i->ARM64in.VFCSel.isD; in emit_ARM64Instr()
4159 UInt dd = dregEnc(i->ARM64in.VFCSel.dst); in emit_ARM64Instr()
4160 UInt nn = dregEnc(i->ARM64in.VFCSel.argL); in emit_ARM64Instr()
4161 UInt mm = dregEnc(i->ARM64in.VFCSel.argR); in emit_ARM64Instr()
4162 UInt cond = (UInt)i->ARM64in.VFCSel.cond; in emit_ARM64Instr()