207     HReg r_srcL = instr->GXin.Shft.srcL;  in ppTILEGXInstr()
208     TILEGXRH *rh_srcR = instr->GXin.Shft.srcR;  in ppTILEGXInstr()
209     vex_printf("%s ", tilegxShftOp[instr->GXin.Shft.op]);  in ppTILEGXInstr()
210     ppHRegTILEGX(instr->GXin.Shft.dst);  in ppTILEGXInstr()
708   i->GXin.Shft.op = op;  in TILEGXInstr_Shft()
709   i->GXin.Shft.sz32 = sz32;  in TILEGXInstr_Shft()
710   i->GXin.Shft.dst = dst;  in TILEGXInstr_Shft()
711   i->GXin.Shft.srcL = srcL;  in TILEGXInstr_Shft()
712   i->GXin.Shft.srcR = srcR;  in TILEGXInstr_Shft()
947     addHRegUse(u, HRmRead, i->GXin.Shft.srcL);  in getRegUsage_TILEGXInstr()
948     addRegUsage_TILEGXRH(u, i->GXin.Shft.srcR);  in getRegUsage_TILEGXInstr()
949     addHRegUse(u, HRmWrite, i->GXin.Shft.dst);  in getRegUsage_TILEGXInstr()
1099     mapReg(m, &i->GXin.Shft.srcL);  in mapRegs_TILEGXInstr()
1100     mapRegs_TILEGXRH(m, i->GXin.Shft.srcR);  in mapRegs_TILEGXInstr()
1101     mapReg(m, &i->GXin.Shft.dst);  in mapRegs_TILEGXInstr()
1659     TILEGXRH *srcR = i->GXin.Shft.srcR;  in emit_TILEGXInstr()
1660     Bool sz32 = i->GXin.Shft.sz32;  in emit_TILEGXInstr()
1662     UInt r_dst = iregNo(i->GXin.Shft.dst);  in emit_TILEGXInstr()
1663     UInt r_srcL = iregNo(i->GXin.Shft.srcL);  in emit_TILEGXInstr()
1666     switch (i->GXin.Shft.op) {  in emit_TILEGXInstr()