Lines Matching refs:dstGA
295 vex_printf("move r11, 0x%x,", (UInt)instr->GXin.XDirect.dstGA); in ppTILEGXInstr()
305 ppHRegTILEGX(instr->GXin.XIndir.dstGA); in ppTILEGXInstr()
315 ppHRegTILEGX(instr->GXin.XAssisted.dstGA); in ppTILEGXInstr()
832 TILEGXInstr *TILEGXInstr_XDirect ( Addr64 dstGA, TILEGXAMode* amPC, in TILEGXInstr_XDirect() argument
837 i->GXin.XDirect.dstGA = dstGA; in TILEGXInstr_XDirect()
844 TILEGXInstr *TILEGXInstr_XIndir ( HReg dstGA, TILEGXAMode* amPC, in TILEGXInstr_XIndir() argument
849 i->GXin.XIndir.dstGA = dstGA; in TILEGXInstr_XIndir()
855 TILEGXInstr *TILEGXInstr_XAssisted ( HReg dstGA, TILEGXAMode* amPC, in TILEGXInstr_XAssisted() argument
860 i->GXin.XAssisted.dstGA = dstGA; in TILEGXInstr_XAssisted()
1037 addHRegUse(u, HRmRead, i->GXin.XIndir.dstGA); in getRegUsage_TILEGXInstr()
1041 addHRegUse(u, HRmRead, i->GXin.XAssisted.dstGA); in getRegUsage_TILEGXInstr()
1138 mapReg(m, &i->GXin.XIndir.dstGA); in mapRegs_TILEGXInstr()
1142 mapReg(m, &i->GXin.XAssisted.dstGA); in mapRegs_TILEGXInstr()
2109 p = mkLoadImm_EXACTLY4(p, /*r*/ 11, (ULong)i->GXin.XDirect.dstGA); in emit_TILEGXInstr()
2177 iregNo(i->GXin.XIndir.dstGA), in emit_TILEGXInstr()
2223 iregNo(i->GXin.XIndir.dstGA), in emit_TILEGXInstr()