1328       vex_printf( "LD%s:", e->Iex.Load.end==Iend_LE ? "le" : "be" );  in ppIRExpr()
1432    vex_printf(" = CAS%s(", cas->end==Iend_LE ? "le" : "be" );  in ppIRCAS()
1463    vex_printf(") { ST%s(", sg->end==Iend_LE ? "le" : "be");  in ppIRStoreG()
1491    vex_printf("(LD%s(", lg->end==Iend_LE ? "le" : "be");  in ppIRLoadG()
1575          vex_printf( "ST%s(", s->Ist.Store.end==Iend_LE ? "le" : "be" );  in ppIRStmt()
1593                        s->Ist.LLSC.end==Iend_LE ? "le" : "be");  in ppIRStmt()
1599                        s->Ist.LLSC.end==Iend_LE ? "le" : "be");  in ppIRStmt()
1857    vassert(end == Iend_LE || end == Iend_BE);  in IRExpr_Load()
2114    vassert(end == Iend_LE || end == Iend_BE);  in IRStmt_Store()
2122    vassert(end == Iend_LE || end == Iend_BE);  in IRStmt_StoreG()
4130          if (expr->Iex.Load.end != Iend_LE && expr->Iex.Load.end != Iend_BE)  in tcExpr()
4231          if (stmt->Ist.Store.end != Iend_LE && stmt->Ist.Store.end != Iend_BE)  in tcStmt()
4245          if (sg->end != Iend_LE && sg->end != Iend_BE)  in tcStmt()
4322          if (stmt->Ist.LLSC.end != Iend_LE && stmt->Ist.LLSC.end != Iend_BE)  in tcStmt()