Lines Matching refs:Hit

133 typedef enum { Hit  = 0, Miss, MissDirty } CacheResult;  enumerator
259 return Hit; in cachesim_setref()
269 return Hit; in cachesim_setref()
305 return ((res1 == Miss) || (res2 == Miss)) ? Miss : Hit; in cachesim_ref()
312 return Hit; in cachesim_ref()
318 if ( cachesim_ref( &I1, a, size) == Hit ) return L1_Hit; in cachesim_I1_ref()
319 if ( cachesim_ref( &LL, a, size) == Hit ) return LL_Hit; in cachesim_I1_ref()
326 if ( cachesim_ref( &D1, a, size) == Hit ) return L1_Hit; in cachesim_D1_ref()
327 if ( cachesim_ref( &LL, a, size) == Hit ) return LL_Hit; in cachesim_D1_ref()
366 return Hit; in cachesim_setref_wb()
377 return Hit; in cachesim_setref_wb()
413 return ((res1 == Miss) || (res2 == Miss)) ? Miss : Hit; in cachesim_ref_wb()
419 return Hit; in cachesim_ref_wb()
426 if ( cachesim_ref( &I1, a, size) == Hit ) return L1_Hit; in cachesim_I1_Read()
428 case Hit: return LL_Hit; in cachesim_I1_Read()
438 if ( cachesim_ref( &D1, a, size) == Hit ) return L1_Hit; in cachesim_D1_Read()
440 case Hit: return LL_Hit; in cachesim_D1_Read()
450 if ( cachesim_ref( &D1, a, size) == Hit ) { in cachesim_D1_Write()
459 case Hit: return LL_Hit; in cachesim_D1_Write()
533 if ( cachesim_ref( &I1, a, size) == Hit ) return L1_Hit; in prefetch_I1_ref()
535 if ( cachesim_ref( &LL, a, size) == Hit ) return LL_Hit; in prefetch_I1_ref()
542 if ( cachesim_ref( &D1, a, size) == Hit ) return L1_Hit; in prefetch_D1_ref()
544 if ( cachesim_ref( &LL, a, size) == Hit ) return LL_Hit; in prefetch_D1_ref()
554 if ( cachesim_ref( &I1, a, size) == Hit ) return L1_Hit; in prefetch_I1_Read()
557 case Hit: return LL_Hit; in prefetch_I1_Read()
567 if ( cachesim_ref( &D1, a, size) == Hit ) return L1_Hit; in prefetch_D1_Read()
570 case Hit: return LL_Hit; in prefetch_D1_Read()
581 if ( cachesim_ref( &D1, a, size) == Hit ) { in prefetch_D1_Write()
590 case Hit: return LL_Hit; in prefetch_D1_Write()