Lines Matching refs:line_size_bits
76 int line_size_bits; member
185 c->line_size_bits = VG_(log2)(c->line_size); in cachesim_initcache()
186 c->tag_shift = c->line_size_bits + VG_(log2)(c->sets); in cachesim_initcache()
286 UWord block1 = a >> c->line_size_bits; in cachesim_ref()
287 UWord block2 = (a+size-1) >> c->line_size_bits; in cachesim_ref()
395 UInt set1 = ( a >> c->line_size_bits) & (c->sets_min_1); in cachesim_ref_wb()
396 UInt set2 = ((a+size-1) >> c->line_size_bits) & (c->sets_min_1); in cachesim_ref_wb()
497 UInt block = ( a >> LL.line_size_bits); in prefetch_LL_doref()
689 UInt set1 = ( a >> L.line_size_bits) & (L.sets_min_1); \
690 UInt set2 = ((a+size-1) >> L.line_size_bits) & (L.sets_min_1); \
885 UInt setNo = (memline >> LL.line_size_bits) & (LL.sets_min_1); in cacheuse_LL_access()