Lines Matching defs:DD
62 #define TESTINSN_vmovf32_imm(instruction, DD, imm) \ argument
154 #define TESTINSN_vmov_double_2core(instruction, DD, RN, RM, RNval, RMval) \ argument
193 #define TESTINSN_un_f64(instruction, DD, DM, DMtype, DMval0, DMval1) \ argument
227 #define TESTINSN_un_cvt_ds(instruction, DD, SM, SMval) \ argument
278 #define TESTINSN_cvt_f64_i32(instruction, DD, SM, SMval) \ argument
295 #define TESTINSN_un_f64_q_vmrs(instruction, DD, DM, DMtype, DMval, RN) \ argument
317 #define TESTINSN_core_to_scalar(instruction, DD, DM, DMval) \ argument
334 #define TESTINSN_vldr_f64(instruction, DD, RN, RNval, imm) \ argument
368 #define TESTINSN_vstr64(instruction, DD, DDval, RM, RMval, imm) \ argument
760 #define TESTINSN_cmp_f64(instruction, DD, DDval0, DDval1, DM, DMval0, DMval1) \ argument
820 #define TESTINSN_cmpz_f64(instruction, DD, DDval0, DDval1) \ argument