77 #define TESTINSN_vmov_core_single(instruction, RN, SD, SDval) \  argument
83       "mov " #RN ", #0\n\t" \
86       "str " #RN ", [%0]\n\t" \
89       : #SD, #RN, "memory" \
91   printf("%s :: "#RN" 0x%08x\n", \
95 #define TESTINSN_vmov_single_core(instruction, SD, RN, RNval) \  argument
99   printf(#RN" 0x%08x\t",  RNval); \
101       "mov " #RN ", %1\n\t" \
107       : #SD, #RN, "memory" \
134 #define TESTINSN_vmov_2single_2core(instruction, SD1, SD2, RN, RM, RNval, RMval) \  argument
138   printf("\t\t\t "#RN" 0x%08x "#RM" 0x%08x\n",  RNval, RMval); \
140       "mov " #RN ", %1\n\t" \
148       : #SD1, #SD2, #RN, #RM, "memory" \
154 #define TESTINSN_vmov_double_2core(instruction, DD, RN, RM, RNval, RMval) \  argument
158   printf(#RN" 0x%08x "#RM" 0x%08x\t",  RNval, RMval); \
160       "mov " #RN ", %1\n\t" \
167       : #DD, #RN, #RM, "memory" \
295 #define TESTINSN_un_f64_q_vmrs(instruction, DD, DM, DMtype, DMval, RN) \  argument
303       ".word 0xEEE14A10 @ vmsr FPSCR, "#RN"\n\t" \
307       ".word 0xEEF14A10 @ vmrs "#RN", FPSCR\n\t" \
311       : #DD, #DM, "memory", #RN \
334 #define TESTINSN_vldr_f64(instruction, DD, RN, RNval, imm) \  argument
340       "mov " #RN ", %1\n\t" \
345       : #DD, #RN, "memory" \
351 #define TESTINSN_vldr_f32(instruction, SD, RN, RNval, imm) \  argument
357       "mov " #RN ", %1\n\t" \
362       : #SD, #RN, "memory" \
452 #define TESTINSN_VSTMIAnoWB(instruction, RN, QD, QDval) \  argument
458       "mov " #RN ", %0\n\t" \
462       : #QD, "memory", #RN \
468 #define TESTINSN_VSTMIAnoWB32(instruction, RN, SD, SDval) \  argument
474       "mov " #RN ", %0\n\t" \
478       : #SD, "memory", #RN \
484 #define TESTINSN_VSTMIAWB(RN, QD1, QD2) \  argument
491       "mov " #RN ", %0\n\t" \
492       "vstmia " #RN "!, {" #QD1 "}\n\t" \
493       "vstmia " #RN "!, {" #QD2 "}\n\t" \
496       : #QD1, #QD2, "memory", #RN \
498   printf("vstmia "#RN"!, "#QD1"; vstmia "#RN"!, "#QD2" :: Result 0x%08x 0x%08x 0x%08x 0x%08x\n", \
502 #define TESTINSN_VSTMIAWB32(RN, SD1, SD2) \  argument
509       "mov " #RN ", %0\n\t" \
510       "vstmia " #RN "!, {" #SD1 "}\n\t" \
511       "vstmia " #RN "!, {" #SD2 "}\n\t" \
514       : #SD1, #SD2, "memory", #RN \
516   printf("vstmia " #RN "!, "#SD1"; vstmia "#RN"!, "#SD2" :: Result 0x%08x 0x%08x\n", \
520 #define TESTINSN_VSTMDB(RN, QD1, QD2) \  argument
528       "mov " #RN ", %0\n\t" \
529       "vstmdb " #RN "!, {" #QD1 "}\n\t" \
530       "vstmdb " #RN "!, {" #QD2 "}\n\t" \
531       "mov %0, " #RN "\n\t" \
534       : #QD1, #QD2, "memory", #RN \
536   printf("vstmdb " #RN "!, " #QD2 "; vstmdb " #RN "!, " #QD2 \
541 #define TESTINSN_VLDMIAnoWB(instruction, RN, QD) \  argument
548       "mov " #RN ", %0\n\t" \
550       "mov " #RN ", %1\n\t" \
551       "vstmia " #RN ", {" #QD "}\n\t" \
554       : #QD, "memory", #RN \
560 #define TESTINSN_VLDMIAWB(RN, QD1, QD2) \  argument
568       "mov " #RN ", %0\n\t" \
569       "vldmia " #RN "!, {" #QD1 "}\n\t" \
570       "vldmia " #RN "!, {" #QD2 "}\n\t" \
571       "mov " #RN ", %1\n\t" \
572       "vstmia " #RN "!, {" #QD1 "}\n\t" \
573       "vstmia " #RN "!, {" #QD2 "}\n\t" \
576       : #QD1, #QD2, "memory", #RN \
582 #define TESTINSN_VLDMDB(RN, QD1, QD2) \  argument
591       "mov " #RN ", %0\n\t" \
592       "vldmdb " #RN "!, {" #QD1 "}\n\t" \
593       "vldmdb " #RN "!, {" #QD2 "}\n\t" \
594       "mov " #RN ", %1\n\t" \
595       "vstmia " #RN "!, {" #QD1 "}\n\t" \
596       "vstmia " #RN "!, {" #QD2 "}\n\t" \
599       : #QD1, #QD2, "memory", #RN \