Lines Matching refs:i64
1 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
4 %struct.rs_allocation = type { i64*, i64*, i64*, i64* }
412 define void @rsSetElementAtImpl_long(%struct.rs_allocation* nocapture readonly %a, i64 %val, i32 %x…
414 %2 = bitcast i8* %1 to i64*
415 store i64 %val, i64* %2, align 8, !tbaa !45
419 define i64 @rsGetElementAtImpl_long(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, i…
421 %2 = bitcast i8* %1 to i64*
422 %3 = load i64, i64* %2, align 8, !tbaa !45
423 ret i64 %3
427 define void @rsSetElementAtImpl_long2(%struct.rs_allocation* nocapture readonly %a, <2 x i64> %val,…
429 %2 = bitcast i8* %1 to <2 x i64>*
430 store <2 x i64> %val, <2 x i64>* %2, align 16, !tbaa !46
434 define <2 x i64> @rsGetElementAtImpl_long2(%struct.rs_allocation* nocapture readonly %a, i32 %x, i3…
436 %2 = bitcast i8* %1 to <2 x i64>*
437 %3 = load <2 x i64>, <2 x i64>* %2, align 16, !tbaa !46
438 ret <2 x i64> %3
442 define void @rsSetElementAtImpl_long3(%struct.rs_allocation* nocapture readonly %a, <3 x i64>* %val…
444 %2 = load <3 x i64>, <3 x i64>* %val
445 %3 = shufflevector <3 x i64> %2, <3 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
446 %4 = bitcast i8* %1 to <4 x i64>*
447 store <4 x i64> %3, <4 x i64>* %4, align 32, !tbaa !47
451 define void @rsGetElementAtImpl_long3(<3 x i64>* noalias nocapture sret %agg.result, %struct.rs_all…
453 %2 = bitcast i8* %1 to <4 x i64>*
454 %3 = load <4 x i64>, <4 x i64>* %2, align 32
455 %4 = bitcast <3 x i64>* %agg.result to <4 x i64>*
456 store <4 x i64> %3, <4 x i64>* %4, align 32, !tbaa !47
461 define void @rsSetElementAtImpl_long4(%struct.rs_allocation* nocapture readonly %a, <4 x i64>* %val…
463 %2 = load <4 x i64>, <4 x i64>* %val
464 %3 = bitcast i8* %1 to <4 x i64>*
465 store <4 x i64> %2, <4 x i64>* %3, align 32, !tbaa !48
469 define void @rsGetElementAtImpl_long4(<4 x i64>* noalias nocapture sret %agg.result, %struct.rs_all…
471 %2 = bitcast i8* %1 to <4 x i64>*
472 %3 = load <4 x i64>, <4 x i64>* %2, align 32, !tbaa !15
473 store <4 x i64> %3, <4 x i64>* %agg.result, align 32, !tbaa !48
478 define void @rsSetElementAtImpl_ulong(%struct.rs_allocation* nocapture readonly %a, i64 %val, i32 %…
480 %2 = bitcast i8* %1 to i64*
481 store i64 %val, i64* %2, align 8, !tbaa !49
485 define i64 @rsGetElementAtImpl_ulong(%struct.rs_allocation* nocapture readonly %a, i32 %x, i32 %y, …
487 %2 = bitcast i8* %1 to i64*
488 %3 = load i64, i64* %2, align 8, !tbaa !49
489 ret i64 %3
493 define void @rsSetElementAtImpl_ulong2(%struct.rs_allocation* nocapture readonly %a, <2 x i64> %val…
495 %2 = bitcast i8* %1 to <2 x i64>*
496 store <2 x i64> %val, <2 x i64>* %2, align 16, !tbaa !50
500 define <2 x i64> @rsGetElementAtImpl_ulong2(%struct.rs_allocation* nocapture readonly %a, i32 %x, i…
502 %2 = bitcast i8* %1 to <2 x i64>*
503 %3 = load <2 x i64>, <2 x i64>* %2, align 16, !tbaa !50
504 ret <2 x i64> %3
508 define void @rsSetElementAtImpl_ulong3(%struct.rs_allocation* nocapture readonly %a, <3 x i64>* %va…
510 %2 = load <3 x i64>, <3 x i64>* %val
511 %3 = shufflevector <3 x i64> %2, <3 x i64> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 undef>
512 %4 = bitcast i8* %1 to <4 x i64>*
513 store <4 x i64> %3, <4 x i64>* %4, align 32, !tbaa !47
517 define void @rsGetElementAtImpl_ulong3(<3 x i64>* noalias nocapture sret %agg.result, %struct.rs_al…
519 %2 = bitcast i8* %1 to <4 x i64>*
520 %3 = load <4 x i64>, <4 x i64>* %2, align 32
521 %4 = bitcast <3 x i64>* %agg.result to <4 x i64>*
522 store <4 x i64> %3, <4 x i64>* %4, align 32, !tbaa !51
527 define void @rsSetElementAtImpl_ulong4(%struct.rs_allocation* nocapture readonly %a, <4 x i64>* %va…
529 %2 = load <4 x i64>, <4 x i64>* %val
530 %3 = bitcast i8* %1 to <4 x i64>*
531 store <4 x i64> %2, <4 x i64>* %3, align 32, !tbaa !52
535 define void @rsGetElementAtImpl_ulong4(<4 x i64>* noalias nocapture sret %agg.result, %struct.rs_al…
537 %2 = bitcast i8* %1 to <4 x i64>*
538 %3 = load <4 x i64>, <4 x i64>* %2, align 32, !tbaa !15
539 store <4 x i64> %3, <4 x i64>* %agg.result, align 32, !tbaa !52
736 define void @__rsAllocationVLoadXImpl_long4(<4 x i64>* noalias nocapture sret %agg.result, %struct.…
738 %2 = bitcast i8* %1 to <4 x i64>*
739 %3 = load <4 x i64>, <4 x i64>* %2, align 8
740 store <4 x i64> %3, <4 x i64>* %agg.result
743 define void @__rsAllocationVLoadXImpl_long3(<3 x i64>* noalias nocapture sret %agg.result, %struct.…
745 %2 = bitcast i8* %1 to <3 x i64>*
746 %3 = load <3 x i64>, <3 x i64>* %2, align 8
747 store <3 x i64> %3, <3 x i64>* %agg.result
750 define <2 x i64> @__rsAllocationVLoadXImpl_long2(%struct.rs_allocation* nocapture readonly %a, i32 …
752 %2 = bitcast i8* %1 to <2 x i64>*
753 %3 = load <2 x i64>, <2 x i64>* %2, align 8
754 ret <2 x i64> %3
757 define void @__rsAllocationVLoadXImpl_ulong4(<4 x i64>* noalias nocapture sret %agg.result, %struct…
759 %2 = bitcast i8* %1 to <4 x i64>*
760 %3 = load <4 x i64>, <4 x i64>* %2, align 8
761 store <4 x i64> %3, <4 x i64>* %agg.result
764 define void @__rsAllocationVLoadXImpl_ulong3(<3 x i64>* noalias nocapture sret %agg.result, %struct…
766 %2 = bitcast i8* %1 to <3 x i64>*
767 %3 = load <3 x i64>, <3 x i64>* %2, align 8
768 store <3 x i64> %3, <3 x i64>* %agg.result
771 define <2 x i64> @__rsAllocationVLoadXImpl_ulong2(%struct.rs_allocation* nocapture readonly %a, i32…
773 %2 = bitcast i8* %1 to <2 x i64>*
774 %3 = load <2 x i64>, <2 x i64>* %2, align 8
775 ret <2 x i64> %3
933 define void @__rsAllocationVStoreXImpl_long4(%struct.rs_allocation* nocapture readonly %a, <4 x i64…
935 %2 = load <4 x i64>, <4 x i64>* %val
936 %3 = bitcast i8* %1 to <4 x i64>*
937 store <4 x i64> %2, <4 x i64>* %3, align 8
940 define void @__rsAllocationVStoreXImpl_long3(%struct.rs_allocation* nocapture readonly %a, <3 x i64…
942 %2 = load <3 x i64>, <3 x i64>* %val
943 %3 = bitcast i8* %1 to <3 x i64>*
944 store <3 x i64> %2, <3 x i64>* %3, align 8
947 define void @__rsAllocationVStoreXImpl_long2(%struct.rs_allocation* nocapture readonly %a, <2 x i64…
949 %2 = bitcast i8* %1 to <2 x i64>*
950 store <2 x i64> %val, <2 x i64>* %2, align 8
954 …ationVStoreXImpl_ulong4(%struct.rs_allocation* nocapture readonly %a, <4 x i64>* %val, i32 %x, i32…
956 %2 = load <4 x i64>, <4 x i64>* %val
957 %3 = bitcast i8* %1 to <4 x i64>*
958 store <4 x i64> %2, <4 x i64>* %3, align 8
961 …ationVStoreXImpl_ulong3(%struct.rs_allocation* nocapture readonly %a, <3 x i64>* %val, i32 %x, i32…
963 %2 = load <3 x i64>, <3 x i64>* %val
964 %3 = bitcast i8* %1 to <3 x i64>*
965 store <3 x i64> %2, <3 x i64>* %3, align 8
968 …ationVStoreXImpl_ulong2(%struct.rs_allocation* nocapture readonly %a, <2 x i64> %val, i32 %x, i32 …
970 %2 = bitcast i8* %1 to <2 x i64>*
971 store <2 x i64> %val, <2 x i64>* %2, align 8