1 //===- InstCombineShifts.cpp ----------------------------------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the visitShl, visitLShr, and visitAShr functions.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "InstCombineInternal.h"
15 #include "llvm/Analysis/ConstantFolding.h"
16 #include "llvm/Analysis/InstructionSimplify.h"
17 #include "llvm/IR/IntrinsicInst.h"
18 #include "llvm/IR/PatternMatch.h"
19 using namespace llvm;
20 using namespace PatternMatch;
21
22 #define DEBUG_TYPE "instcombine"
23
commonShiftTransforms(BinaryOperator & I)24 Instruction *InstCombiner::commonShiftTransforms(BinaryOperator &I) {
25 assert(I.getOperand(1)->getType() == I.getOperand(0)->getType());
26 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
27
28 // See if we can fold away this shift.
29 if (SimplifyDemandedInstructionBits(I))
30 return &I;
31
32 // Try to fold constant and into select arguments.
33 if (isa<Constant>(Op0))
34 if (SelectInst *SI = dyn_cast<SelectInst>(Op1))
35 if (Instruction *R = FoldOpIntoSelect(I, SI))
36 return R;
37
38 if (Constant *CUI = dyn_cast<Constant>(Op1))
39 if (Instruction *Res = FoldShiftByConstant(Op0, CUI, I))
40 return Res;
41
42 // X shift (A srem B) -> X shift (A and B-1) iff B is a power of 2.
43 // Because shifts by negative values (which could occur if A were negative)
44 // are undefined.
45 Value *A; const APInt *B;
46 if (Op1->hasOneUse() && match(Op1, m_SRem(m_Value(A), m_Power2(B)))) {
47 // FIXME: Should this get moved into SimplifyDemandedBits by saying we don't
48 // demand the sign bit (and many others) here??
49 Value *Rem = Builder->CreateAnd(A, ConstantInt::get(I.getType(), *B-1),
50 Op1->getName());
51 I.setOperand(1, Rem);
52 return &I;
53 }
54
55 return nullptr;
56 }
57
58 /// CanEvaluateShifted - See if we can compute the specified value, but shifted
59 /// logically to the left or right by some number of bits. This should return
60 /// true if the expression can be computed for the same cost as the current
61 /// expression tree. This is used to eliminate extraneous shifting from things
62 /// like:
63 /// %C = shl i128 %A, 64
64 /// %D = shl i128 %B, 96
65 /// %E = or i128 %C, %D
66 /// %F = lshr i128 %E, 64
67 /// where the client will ask if E can be computed shifted right by 64-bits. If
68 /// this succeeds, the GetShiftedValue function will be called to produce the
69 /// value.
CanEvaluateShifted(Value * V,unsigned NumBits,bool isLeftShift,InstCombiner & IC,Instruction * CxtI)70 static bool CanEvaluateShifted(Value *V, unsigned NumBits, bool isLeftShift,
71 InstCombiner &IC, Instruction *CxtI) {
72 // We can always evaluate constants shifted.
73 if (isa<Constant>(V))
74 return true;
75
76 Instruction *I = dyn_cast<Instruction>(V);
77 if (!I) return false;
78
79 // If this is the opposite shift, we can directly reuse the input of the shift
80 // if the needed bits are already zero in the input. This allows us to reuse
81 // the value which means that we don't care if the shift has multiple uses.
82 // TODO: Handle opposite shift by exact value.
83 ConstantInt *CI = nullptr;
84 if ((isLeftShift && match(I, m_LShr(m_Value(), m_ConstantInt(CI)))) ||
85 (!isLeftShift && match(I, m_Shl(m_Value(), m_ConstantInt(CI))))) {
86 if (CI->getZExtValue() == NumBits) {
87 // TODO: Check that the input bits are already zero with MaskedValueIsZero
88 #if 0
89 // If this is a truncate of a logical shr, we can truncate it to a smaller
90 // lshr iff we know that the bits we would otherwise be shifting in are
91 // already zeros.
92 uint32_t OrigBitWidth = OrigTy->getScalarSizeInBits();
93 uint32_t BitWidth = Ty->getScalarSizeInBits();
94 if (MaskedValueIsZero(I->getOperand(0),
95 APInt::getHighBitsSet(OrigBitWidth, OrigBitWidth-BitWidth)) &&
96 CI->getLimitedValue(BitWidth) < BitWidth) {
97 return CanEvaluateTruncated(I->getOperand(0), Ty);
98 }
99 #endif
100
101 }
102 }
103
104 // We can't mutate something that has multiple uses: doing so would
105 // require duplicating the instruction in general, which isn't profitable.
106 if (!I->hasOneUse()) return false;
107
108 switch (I->getOpcode()) {
109 default: return false;
110 case Instruction::And:
111 case Instruction::Or:
112 case Instruction::Xor:
113 // Bitwise operators can all arbitrarily be arbitrarily evaluated shifted.
114 return CanEvaluateShifted(I->getOperand(0), NumBits, isLeftShift, IC, I) &&
115 CanEvaluateShifted(I->getOperand(1), NumBits, isLeftShift, IC, I);
116
117 case Instruction::Shl: {
118 // We can often fold the shift into shifts-by-a-constant.
119 CI = dyn_cast<ConstantInt>(I->getOperand(1));
120 if (!CI) return false;
121
122 // We can always fold shl(c1)+shl(c2) -> shl(c1+c2).
123 if (isLeftShift) return true;
124
125 // We can always turn shl(c)+shr(c) -> and(c2).
126 if (CI->getValue() == NumBits) return true;
127
128 unsigned TypeWidth = I->getType()->getScalarSizeInBits();
129
130 // We can turn shl(c1)+shr(c2) -> shl(c3)+and(c4), but it isn't
131 // profitable unless we know the and'd out bits are already zero.
132 if (CI->getZExtValue() > NumBits) {
133 unsigned LowBits = TypeWidth - CI->getZExtValue();
134 if (IC.MaskedValueIsZero(I->getOperand(0),
135 APInt::getLowBitsSet(TypeWidth, NumBits) << LowBits,
136 0, CxtI))
137 return true;
138 }
139
140 return false;
141 }
142 case Instruction::LShr: {
143 // We can often fold the shift into shifts-by-a-constant.
144 CI = dyn_cast<ConstantInt>(I->getOperand(1));
145 if (!CI) return false;
146
147 // We can always fold lshr(c1)+lshr(c2) -> lshr(c1+c2).
148 if (!isLeftShift) return true;
149
150 // We can always turn lshr(c)+shl(c) -> and(c2).
151 if (CI->getValue() == NumBits) return true;
152
153 unsigned TypeWidth = I->getType()->getScalarSizeInBits();
154
155 // We can always turn lshr(c1)+shl(c2) -> lshr(c3)+and(c4), but it isn't
156 // profitable unless we know the and'd out bits are already zero.
157 if (CI->getValue().ult(TypeWidth) && CI->getZExtValue() > NumBits) {
158 unsigned LowBits = CI->getZExtValue() - NumBits;
159 if (IC.MaskedValueIsZero(I->getOperand(0),
160 APInt::getLowBitsSet(TypeWidth, NumBits) << LowBits,
161 0, CxtI))
162 return true;
163 }
164
165 return false;
166 }
167 case Instruction::Select: {
168 SelectInst *SI = cast<SelectInst>(I);
169 return CanEvaluateShifted(SI->getTrueValue(), NumBits, isLeftShift,
170 IC, SI) &&
171 CanEvaluateShifted(SI->getFalseValue(), NumBits, isLeftShift, IC, SI);
172 }
173 case Instruction::PHI: {
174 // We can change a phi if we can change all operands. Note that we never
175 // get into trouble with cyclic PHIs here because we only consider
176 // instructions with a single use.
177 PHINode *PN = cast<PHINode>(I);
178 for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
179 if (!CanEvaluateShifted(PN->getIncomingValue(i), NumBits, isLeftShift,
180 IC, PN))
181 return false;
182 return true;
183 }
184 }
185 }
186
187 /// GetShiftedValue - When CanEvaluateShifted returned true for an expression,
188 /// this value inserts the new computation that produces the shifted value.
GetShiftedValue(Value * V,unsigned NumBits,bool isLeftShift,InstCombiner & IC,const DataLayout & DL)189 static Value *GetShiftedValue(Value *V, unsigned NumBits, bool isLeftShift,
190 InstCombiner &IC, const DataLayout &DL) {
191 // We can always evaluate constants shifted.
192 if (Constant *C = dyn_cast<Constant>(V)) {
193 if (isLeftShift)
194 V = IC.Builder->CreateShl(C, NumBits);
195 else
196 V = IC.Builder->CreateLShr(C, NumBits);
197 // If we got a constantexpr back, try to simplify it with TD info.
198 if (ConstantExpr *CE = dyn_cast<ConstantExpr>(V))
199 V = ConstantFoldConstantExpression(CE, DL, IC.getTargetLibraryInfo());
200 return V;
201 }
202
203 Instruction *I = cast<Instruction>(V);
204 IC.Worklist.Add(I);
205
206 switch (I->getOpcode()) {
207 default: llvm_unreachable("Inconsistency with CanEvaluateShifted");
208 case Instruction::And:
209 case Instruction::Or:
210 case Instruction::Xor:
211 // Bitwise operators can all arbitrarily be arbitrarily evaluated shifted.
212 I->setOperand(
213 0, GetShiftedValue(I->getOperand(0), NumBits, isLeftShift, IC, DL));
214 I->setOperand(
215 1, GetShiftedValue(I->getOperand(1), NumBits, isLeftShift, IC, DL));
216 return I;
217
218 case Instruction::Shl: {
219 BinaryOperator *BO = cast<BinaryOperator>(I);
220 unsigned TypeWidth = BO->getType()->getScalarSizeInBits();
221
222 // We only accept shifts-by-a-constant in CanEvaluateShifted.
223 ConstantInt *CI = cast<ConstantInt>(BO->getOperand(1));
224
225 // We can always fold shl(c1)+shl(c2) -> shl(c1+c2).
226 if (isLeftShift) {
227 // If this is oversized composite shift, then unsigned shifts get 0.
228 unsigned NewShAmt = NumBits+CI->getZExtValue();
229 if (NewShAmt >= TypeWidth)
230 return Constant::getNullValue(I->getType());
231
232 BO->setOperand(1, ConstantInt::get(BO->getType(), NewShAmt));
233 BO->setHasNoUnsignedWrap(false);
234 BO->setHasNoSignedWrap(false);
235 return I;
236 }
237
238 // We turn shl(c)+lshr(c) -> and(c2) if the input doesn't already have
239 // zeros.
240 if (CI->getValue() == NumBits) {
241 APInt Mask(APInt::getLowBitsSet(TypeWidth, TypeWidth - NumBits));
242 V = IC.Builder->CreateAnd(BO->getOperand(0),
243 ConstantInt::get(BO->getContext(), Mask));
244 if (Instruction *VI = dyn_cast<Instruction>(V)) {
245 VI->moveBefore(BO);
246 VI->takeName(BO);
247 }
248 return V;
249 }
250
251 // We turn shl(c1)+shr(c2) -> shl(c3)+and(c4), but only when we know that
252 // the and won't be needed.
253 assert(CI->getZExtValue() > NumBits);
254 BO->setOperand(1, ConstantInt::get(BO->getType(),
255 CI->getZExtValue() - NumBits));
256 BO->setHasNoUnsignedWrap(false);
257 BO->setHasNoSignedWrap(false);
258 return BO;
259 }
260 case Instruction::LShr: {
261 BinaryOperator *BO = cast<BinaryOperator>(I);
262 unsigned TypeWidth = BO->getType()->getScalarSizeInBits();
263 // We only accept shifts-by-a-constant in CanEvaluateShifted.
264 ConstantInt *CI = cast<ConstantInt>(BO->getOperand(1));
265
266 // We can always fold lshr(c1)+lshr(c2) -> lshr(c1+c2).
267 if (!isLeftShift) {
268 // If this is oversized composite shift, then unsigned shifts get 0.
269 unsigned NewShAmt = NumBits+CI->getZExtValue();
270 if (NewShAmt >= TypeWidth)
271 return Constant::getNullValue(BO->getType());
272
273 BO->setOperand(1, ConstantInt::get(BO->getType(), NewShAmt));
274 BO->setIsExact(false);
275 return I;
276 }
277
278 // We turn lshr(c)+shl(c) -> and(c2) if the input doesn't already have
279 // zeros.
280 if (CI->getValue() == NumBits) {
281 APInt Mask(APInt::getHighBitsSet(TypeWidth, TypeWidth - NumBits));
282 V = IC.Builder->CreateAnd(I->getOperand(0),
283 ConstantInt::get(BO->getContext(), Mask));
284 if (Instruction *VI = dyn_cast<Instruction>(V)) {
285 VI->moveBefore(I);
286 VI->takeName(I);
287 }
288 return V;
289 }
290
291 // We turn lshr(c1)+shl(c2) -> lshr(c3)+and(c4), but only when we know that
292 // the and won't be needed.
293 assert(CI->getZExtValue() > NumBits);
294 BO->setOperand(1, ConstantInt::get(BO->getType(),
295 CI->getZExtValue() - NumBits));
296 BO->setIsExact(false);
297 return BO;
298 }
299
300 case Instruction::Select:
301 I->setOperand(
302 1, GetShiftedValue(I->getOperand(1), NumBits, isLeftShift, IC, DL));
303 I->setOperand(
304 2, GetShiftedValue(I->getOperand(2), NumBits, isLeftShift, IC, DL));
305 return I;
306 case Instruction::PHI: {
307 // We can change a phi if we can change all operands. Note that we never
308 // get into trouble with cyclic PHIs here because we only consider
309 // instructions with a single use.
310 PHINode *PN = cast<PHINode>(I);
311 for (unsigned i = 0, e = PN->getNumIncomingValues(); i != e; ++i)
312 PN->setIncomingValue(i, GetShiftedValue(PN->getIncomingValue(i), NumBits,
313 isLeftShift, IC, DL));
314 return PN;
315 }
316 }
317 }
318
319
320
FoldShiftByConstant(Value * Op0,Constant * Op1,BinaryOperator & I)321 Instruction *InstCombiner::FoldShiftByConstant(Value *Op0, Constant *Op1,
322 BinaryOperator &I) {
323 bool isLeftShift = I.getOpcode() == Instruction::Shl;
324
325 ConstantInt *COp1 = nullptr;
326 if (ConstantDataVector *CV = dyn_cast<ConstantDataVector>(Op1))
327 COp1 = dyn_cast_or_null<ConstantInt>(CV->getSplatValue());
328 else if (ConstantVector *CV = dyn_cast<ConstantVector>(Op1))
329 COp1 = dyn_cast_or_null<ConstantInt>(CV->getSplatValue());
330 else
331 COp1 = dyn_cast<ConstantInt>(Op1);
332
333 if (!COp1)
334 return nullptr;
335
336 // See if we can propagate this shift into the input, this covers the trivial
337 // cast of lshr(shl(x,c1),c2) as well as other more complex cases.
338 if (I.getOpcode() != Instruction::AShr &&
339 CanEvaluateShifted(Op0, COp1->getZExtValue(), isLeftShift, *this, &I)) {
340 DEBUG(dbgs() << "ICE: GetShiftedValue propagating shift through expression"
341 " to eliminate shift:\n IN: " << *Op0 << "\n SH: " << I <<"\n");
342
343 return ReplaceInstUsesWith(
344 I, GetShiftedValue(Op0, COp1->getZExtValue(), isLeftShift, *this, DL));
345 }
346
347 // See if we can simplify any instructions used by the instruction whose sole
348 // purpose is to compute bits we don't care about.
349 uint32_t TypeBits = Op0->getType()->getScalarSizeInBits();
350
351 assert(!COp1->uge(TypeBits) &&
352 "Shift over the type width should have been removed already");
353
354 // ((X*C1) << C2) == (X * (C1 << C2))
355 if (BinaryOperator *BO = dyn_cast<BinaryOperator>(Op0))
356 if (BO->getOpcode() == Instruction::Mul && isLeftShift)
357 if (Constant *BOOp = dyn_cast<Constant>(BO->getOperand(1)))
358 return BinaryOperator::CreateMul(BO->getOperand(0),
359 ConstantExpr::getShl(BOOp, Op1));
360
361 // Try to fold constant and into select arguments.
362 if (SelectInst *SI = dyn_cast<SelectInst>(Op0))
363 if (Instruction *R = FoldOpIntoSelect(I, SI))
364 return R;
365 if (isa<PHINode>(Op0))
366 if (Instruction *NV = FoldOpIntoPhi(I))
367 return NV;
368
369 // Fold shift2(trunc(shift1(x,c1)), c2) -> trunc(shift2(shift1(x,c1),c2))
370 if (TruncInst *TI = dyn_cast<TruncInst>(Op0)) {
371 Instruction *TrOp = dyn_cast<Instruction>(TI->getOperand(0));
372 // If 'shift2' is an ashr, we would have to get the sign bit into a funny
373 // place. Don't try to do this transformation in this case. Also, we
374 // require that the input operand is a shift-by-constant so that we have
375 // confidence that the shifts will get folded together. We could do this
376 // xform in more cases, but it is unlikely to be profitable.
377 if (TrOp && I.isLogicalShift() && TrOp->isShift() &&
378 isa<ConstantInt>(TrOp->getOperand(1))) {
379 // Okay, we'll do this xform. Make the shift of shift.
380 Constant *ShAmt = ConstantExpr::getZExt(COp1, TrOp->getType());
381 // (shift2 (shift1 & 0x00FF), c2)
382 Value *NSh = Builder->CreateBinOp(I.getOpcode(), TrOp, ShAmt,I.getName());
383
384 // For logical shifts, the truncation has the effect of making the high
385 // part of the register be zeros. Emulate this by inserting an AND to
386 // clear the top bits as needed. This 'and' will usually be zapped by
387 // other xforms later if dead.
388 unsigned SrcSize = TrOp->getType()->getScalarSizeInBits();
389 unsigned DstSize = TI->getType()->getScalarSizeInBits();
390 APInt MaskV(APInt::getLowBitsSet(SrcSize, DstSize));
391
392 // The mask we constructed says what the trunc would do if occurring
393 // between the shifts. We want to know the effect *after* the second
394 // shift. We know that it is a logical shift by a constant, so adjust the
395 // mask as appropriate.
396 if (I.getOpcode() == Instruction::Shl)
397 MaskV <<= COp1->getZExtValue();
398 else {
399 assert(I.getOpcode() == Instruction::LShr && "Unknown logical shift");
400 MaskV = MaskV.lshr(COp1->getZExtValue());
401 }
402
403 // shift1 & 0x00FF
404 Value *And = Builder->CreateAnd(NSh,
405 ConstantInt::get(I.getContext(), MaskV),
406 TI->getName());
407
408 // Return the value truncated to the interesting size.
409 return new TruncInst(And, I.getType());
410 }
411 }
412
413 if (Op0->hasOneUse()) {
414 if (BinaryOperator *Op0BO = dyn_cast<BinaryOperator>(Op0)) {
415 // Turn ((X >> C) + Y) << C -> (X + (Y << C)) & (~0 << C)
416 Value *V1, *V2;
417 ConstantInt *CC;
418 switch (Op0BO->getOpcode()) {
419 default: break;
420 case Instruction::Add:
421 case Instruction::And:
422 case Instruction::Or:
423 case Instruction::Xor: {
424 // These operators commute.
425 // Turn (Y + (X >> C)) << C -> (X + (Y << C)) & (~0 << C)
426 if (isLeftShift && Op0BO->getOperand(1)->hasOneUse() &&
427 match(Op0BO->getOperand(1), m_Shr(m_Value(V1),
428 m_Specific(Op1)))) {
429 Value *YS = // (Y << C)
430 Builder->CreateShl(Op0BO->getOperand(0), Op1, Op0BO->getName());
431 // (X + (Y << C))
432 Value *X = Builder->CreateBinOp(Op0BO->getOpcode(), YS, V1,
433 Op0BO->getOperand(1)->getName());
434 uint32_t Op1Val = COp1->getLimitedValue(TypeBits);
435
436 APInt Bits = APInt::getHighBitsSet(TypeBits, TypeBits - Op1Val);
437 Constant *Mask = ConstantInt::get(I.getContext(), Bits);
438 if (VectorType *VT = dyn_cast<VectorType>(X->getType()))
439 Mask = ConstantVector::getSplat(VT->getNumElements(), Mask);
440 return BinaryOperator::CreateAnd(X, Mask);
441 }
442
443 // Turn (Y + ((X >> C) & CC)) << C -> ((X & (CC << C)) + (Y << C))
444 Value *Op0BOOp1 = Op0BO->getOperand(1);
445 if (isLeftShift && Op0BOOp1->hasOneUse() &&
446 match(Op0BOOp1,
447 m_And(m_OneUse(m_Shr(m_Value(V1), m_Specific(Op1))),
448 m_ConstantInt(CC)))) {
449 Value *YS = // (Y << C)
450 Builder->CreateShl(Op0BO->getOperand(0), Op1,
451 Op0BO->getName());
452 // X & (CC << C)
453 Value *XM = Builder->CreateAnd(V1, ConstantExpr::getShl(CC, Op1),
454 V1->getName()+".mask");
455 return BinaryOperator::Create(Op0BO->getOpcode(), YS, XM);
456 }
457 }
458
459 // FALL THROUGH.
460 case Instruction::Sub: {
461 // Turn ((X >> C) + Y) << C -> (X + (Y << C)) & (~0 << C)
462 if (isLeftShift && Op0BO->getOperand(0)->hasOneUse() &&
463 match(Op0BO->getOperand(0), m_Shr(m_Value(V1),
464 m_Specific(Op1)))) {
465 Value *YS = // (Y << C)
466 Builder->CreateShl(Op0BO->getOperand(1), Op1, Op0BO->getName());
467 // (X + (Y << C))
468 Value *X = Builder->CreateBinOp(Op0BO->getOpcode(), V1, YS,
469 Op0BO->getOperand(0)->getName());
470 uint32_t Op1Val = COp1->getLimitedValue(TypeBits);
471
472 APInt Bits = APInt::getHighBitsSet(TypeBits, TypeBits - Op1Val);
473 Constant *Mask = ConstantInt::get(I.getContext(), Bits);
474 if (VectorType *VT = dyn_cast<VectorType>(X->getType()))
475 Mask = ConstantVector::getSplat(VT->getNumElements(), Mask);
476 return BinaryOperator::CreateAnd(X, Mask);
477 }
478
479 // Turn (((X >> C)&CC) + Y) << C -> (X + (Y << C)) & (CC << C)
480 if (isLeftShift && Op0BO->getOperand(0)->hasOneUse() &&
481 match(Op0BO->getOperand(0),
482 m_And(m_OneUse(m_Shr(m_Value(V1), m_Value(V2))),
483 m_ConstantInt(CC))) && V2 == Op1) {
484 Value *YS = // (Y << C)
485 Builder->CreateShl(Op0BO->getOperand(1), Op1, Op0BO->getName());
486 // X & (CC << C)
487 Value *XM = Builder->CreateAnd(V1, ConstantExpr::getShl(CC, Op1),
488 V1->getName()+".mask");
489
490 return BinaryOperator::Create(Op0BO->getOpcode(), XM, YS);
491 }
492
493 break;
494 }
495 }
496
497
498 // If the operand is a bitwise operator with a constant RHS, and the
499 // shift is the only use, we can pull it out of the shift.
500 if (ConstantInt *Op0C = dyn_cast<ConstantInt>(Op0BO->getOperand(1))) {
501 bool isValid = true; // Valid only for And, Or, Xor
502 bool highBitSet = false; // Transform if high bit of constant set?
503
504 switch (Op0BO->getOpcode()) {
505 default: isValid = false; break; // Do not perform transform!
506 case Instruction::Add:
507 isValid = isLeftShift;
508 break;
509 case Instruction::Or:
510 case Instruction::Xor:
511 highBitSet = false;
512 break;
513 case Instruction::And:
514 highBitSet = true;
515 break;
516 }
517
518 // If this is a signed shift right, and the high bit is modified
519 // by the logical operation, do not perform the transformation.
520 // The highBitSet boolean indicates the value of the high bit of
521 // the constant which would cause it to be modified for this
522 // operation.
523 //
524 if (isValid && I.getOpcode() == Instruction::AShr)
525 isValid = Op0C->getValue()[TypeBits-1] == highBitSet;
526
527 if (isValid) {
528 Constant *NewRHS = ConstantExpr::get(I.getOpcode(), Op0C, Op1);
529
530 Value *NewShift =
531 Builder->CreateBinOp(I.getOpcode(), Op0BO->getOperand(0), Op1);
532 NewShift->takeName(Op0BO);
533
534 return BinaryOperator::Create(Op0BO->getOpcode(), NewShift,
535 NewRHS);
536 }
537 }
538 }
539 }
540
541 // Find out if this is a shift of a shift by a constant.
542 BinaryOperator *ShiftOp = dyn_cast<BinaryOperator>(Op0);
543 if (ShiftOp && !ShiftOp->isShift())
544 ShiftOp = nullptr;
545
546 if (ShiftOp && isa<ConstantInt>(ShiftOp->getOperand(1))) {
547
548 // This is a constant shift of a constant shift. Be careful about hiding
549 // shl instructions behind bit masks. They are used to represent multiplies
550 // by a constant, and it is important that simple arithmetic expressions
551 // are still recognizable by scalar evolution.
552 //
553 // The transforms applied to shl are very similar to the transforms applied
554 // to mul by constant. We can be more aggressive about optimizing right
555 // shifts.
556 //
557 // Combinations of right and left shifts will still be optimized in
558 // DAGCombine where scalar evolution no longer applies.
559
560 ConstantInt *ShiftAmt1C = cast<ConstantInt>(ShiftOp->getOperand(1));
561 uint32_t ShiftAmt1 = ShiftAmt1C->getLimitedValue(TypeBits);
562 uint32_t ShiftAmt2 = COp1->getLimitedValue(TypeBits);
563 assert(ShiftAmt2 != 0 && "Should have been simplified earlier");
564 if (ShiftAmt1 == 0) return nullptr; // Will be simplified in the future.
565 Value *X = ShiftOp->getOperand(0);
566
567 IntegerType *Ty = cast<IntegerType>(I.getType());
568
569 // Check for (X << c1) << c2 and (X >> c1) >> c2
570 if (I.getOpcode() == ShiftOp->getOpcode()) {
571 uint32_t AmtSum = ShiftAmt1+ShiftAmt2; // Fold into one big shift.
572 // If this is oversized composite shift, then unsigned shifts get 0, ashr
573 // saturates.
574 if (AmtSum >= TypeBits) {
575 if (I.getOpcode() != Instruction::AShr)
576 return ReplaceInstUsesWith(I, Constant::getNullValue(I.getType()));
577 AmtSum = TypeBits-1; // Saturate to 31 for i32 ashr.
578 }
579
580 return BinaryOperator::Create(I.getOpcode(), X,
581 ConstantInt::get(Ty, AmtSum));
582 }
583
584 if (ShiftAmt1 == ShiftAmt2) {
585 // If we have ((X << C) >>u C), turn this into X & (-1 >>u C).
586 if (I.getOpcode() == Instruction::LShr &&
587 ShiftOp->getOpcode() == Instruction::Shl) {
588 APInt Mask(APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt1));
589 return BinaryOperator::CreateAnd(X,
590 ConstantInt::get(I.getContext(), Mask));
591 }
592 } else if (ShiftAmt1 < ShiftAmt2) {
593 uint32_t ShiftDiff = ShiftAmt2-ShiftAmt1;
594
595 // (X >>?,exact C1) << C2 --> X << (C2-C1)
596 // The inexact version is deferred to DAGCombine so we don't hide shl
597 // behind a bit mask.
598 if (I.getOpcode() == Instruction::Shl &&
599 ShiftOp->getOpcode() != Instruction::Shl &&
600 ShiftOp->isExact()) {
601 assert(ShiftOp->getOpcode() == Instruction::LShr ||
602 ShiftOp->getOpcode() == Instruction::AShr);
603 ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
604 BinaryOperator *NewShl = BinaryOperator::Create(Instruction::Shl,
605 X, ShiftDiffCst);
606 NewShl->setHasNoUnsignedWrap(I.hasNoUnsignedWrap());
607 NewShl->setHasNoSignedWrap(I.hasNoSignedWrap());
608 return NewShl;
609 }
610
611 // (X << C1) >>u C2 --> X >>u (C2-C1) & (-1 >> C2)
612 if (I.getOpcode() == Instruction::LShr &&
613 ShiftOp->getOpcode() == Instruction::Shl) {
614 ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
615 // (X <<nuw C1) >>u C2 --> X >>u (C2-C1)
616 if (ShiftOp->hasNoUnsignedWrap()) {
617 BinaryOperator *NewLShr = BinaryOperator::Create(Instruction::LShr,
618 X, ShiftDiffCst);
619 NewLShr->setIsExact(I.isExact());
620 return NewLShr;
621 }
622 Value *Shift = Builder->CreateLShr(X, ShiftDiffCst);
623
624 APInt Mask(APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt2));
625 return BinaryOperator::CreateAnd(Shift,
626 ConstantInt::get(I.getContext(),Mask));
627 }
628
629 // We can't handle (X << C1) >>s C2, it shifts arbitrary bits in. However,
630 // we can handle (X <<nsw C1) >>s C2 since it only shifts in sign bits.
631 if (I.getOpcode() == Instruction::AShr &&
632 ShiftOp->getOpcode() == Instruction::Shl) {
633 if (ShiftOp->hasNoSignedWrap()) {
634 // (X <<nsw C1) >>s C2 --> X >>s (C2-C1)
635 ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
636 BinaryOperator *NewAShr = BinaryOperator::Create(Instruction::AShr,
637 X, ShiftDiffCst);
638 NewAShr->setIsExact(I.isExact());
639 return NewAShr;
640 }
641 }
642 } else {
643 assert(ShiftAmt2 < ShiftAmt1);
644 uint32_t ShiftDiff = ShiftAmt1-ShiftAmt2;
645
646 // (X >>?exact C1) << C2 --> X >>?exact (C1-C2)
647 // The inexact version is deferred to DAGCombine so we don't hide shl
648 // behind a bit mask.
649 if (I.getOpcode() == Instruction::Shl &&
650 ShiftOp->getOpcode() != Instruction::Shl &&
651 ShiftOp->isExact()) {
652 ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
653 BinaryOperator *NewShr = BinaryOperator::Create(ShiftOp->getOpcode(),
654 X, ShiftDiffCst);
655 NewShr->setIsExact(true);
656 return NewShr;
657 }
658
659 // (X << C1) >>u C2 --> X << (C1-C2) & (-1 >> C2)
660 if (I.getOpcode() == Instruction::LShr &&
661 ShiftOp->getOpcode() == Instruction::Shl) {
662 ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
663 if (ShiftOp->hasNoUnsignedWrap()) {
664 // (X <<nuw C1) >>u C2 --> X <<nuw (C1-C2)
665 BinaryOperator *NewShl = BinaryOperator::Create(Instruction::Shl,
666 X, ShiftDiffCst);
667 NewShl->setHasNoUnsignedWrap(true);
668 return NewShl;
669 }
670 Value *Shift = Builder->CreateShl(X, ShiftDiffCst);
671
672 APInt Mask(APInt::getLowBitsSet(TypeBits, TypeBits - ShiftAmt2));
673 return BinaryOperator::CreateAnd(Shift,
674 ConstantInt::get(I.getContext(),Mask));
675 }
676
677 // We can't handle (X << C1) >>s C2, it shifts arbitrary bits in. However,
678 // we can handle (X <<nsw C1) >>s C2 since it only shifts in sign bits.
679 if (I.getOpcode() == Instruction::AShr &&
680 ShiftOp->getOpcode() == Instruction::Shl) {
681 if (ShiftOp->hasNoSignedWrap()) {
682 // (X <<nsw C1) >>s C2 --> X <<nsw (C1-C2)
683 ConstantInt *ShiftDiffCst = ConstantInt::get(Ty, ShiftDiff);
684 BinaryOperator *NewShl = BinaryOperator::Create(Instruction::Shl,
685 X, ShiftDiffCst);
686 NewShl->setHasNoSignedWrap(true);
687 return NewShl;
688 }
689 }
690 }
691 }
692 return nullptr;
693 }
694
visitShl(BinaryOperator & I)695 Instruction *InstCombiner::visitShl(BinaryOperator &I) {
696 if (Value *V = SimplifyVectorOp(I))
697 return ReplaceInstUsesWith(I, V);
698
699 if (Value *V =
700 SimplifyShlInst(I.getOperand(0), I.getOperand(1), I.hasNoSignedWrap(),
701 I.hasNoUnsignedWrap(), DL, TLI, DT, AC))
702 return ReplaceInstUsesWith(I, V);
703
704 if (Instruction *V = commonShiftTransforms(I))
705 return V;
706
707 if (ConstantInt *Op1C = dyn_cast<ConstantInt>(I.getOperand(1))) {
708 unsigned ShAmt = Op1C->getZExtValue();
709
710 // If the shifted-out value is known-zero, then this is a NUW shift.
711 if (!I.hasNoUnsignedWrap() &&
712 MaskedValueIsZero(I.getOperand(0),
713 APInt::getHighBitsSet(Op1C->getBitWidth(), ShAmt),
714 0, &I)) {
715 I.setHasNoUnsignedWrap();
716 return &I;
717 }
718
719 // If the shifted out value is all signbits, this is a NSW shift.
720 if (!I.hasNoSignedWrap() &&
721 ComputeNumSignBits(I.getOperand(0), 0, &I) > ShAmt) {
722 I.setHasNoSignedWrap();
723 return &I;
724 }
725 }
726
727 // (C1 << A) << C2 -> (C1 << C2) << A
728 Constant *C1, *C2;
729 Value *A;
730 if (match(I.getOperand(0), m_OneUse(m_Shl(m_Constant(C1), m_Value(A)))) &&
731 match(I.getOperand(1), m_Constant(C2)))
732 return BinaryOperator::CreateShl(ConstantExpr::getShl(C1, C2), A);
733
734 return nullptr;
735 }
736
visitLShr(BinaryOperator & I)737 Instruction *InstCombiner::visitLShr(BinaryOperator &I) {
738 if (Value *V = SimplifyVectorOp(I))
739 return ReplaceInstUsesWith(I, V);
740
741 if (Value *V = SimplifyLShrInst(I.getOperand(0), I.getOperand(1), I.isExact(),
742 DL, TLI, DT, AC))
743 return ReplaceInstUsesWith(I, V);
744
745 if (Instruction *R = commonShiftTransforms(I))
746 return R;
747
748 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
749
750 if (ConstantInt *Op1C = dyn_cast<ConstantInt>(Op1)) {
751 unsigned ShAmt = Op1C->getZExtValue();
752
753 if (IntrinsicInst *II = dyn_cast<IntrinsicInst>(Op0)) {
754 unsigned BitWidth = Op0->getType()->getScalarSizeInBits();
755 // ctlz.i32(x)>>5 --> zext(x == 0)
756 // cttz.i32(x)>>5 --> zext(x == 0)
757 // ctpop.i32(x)>>5 --> zext(x == -1)
758 if ((II->getIntrinsicID() == Intrinsic::ctlz ||
759 II->getIntrinsicID() == Intrinsic::cttz ||
760 II->getIntrinsicID() == Intrinsic::ctpop) &&
761 isPowerOf2_32(BitWidth) && Log2_32(BitWidth) == ShAmt) {
762 bool isCtPop = II->getIntrinsicID() == Intrinsic::ctpop;
763 Constant *RHS = ConstantInt::getSigned(Op0->getType(), isCtPop ? -1:0);
764 Value *Cmp = Builder->CreateICmpEQ(II->getArgOperand(0), RHS);
765 return new ZExtInst(Cmp, II->getType());
766 }
767 }
768
769 // If the shifted-out value is known-zero, then this is an exact shift.
770 if (!I.isExact() &&
771 MaskedValueIsZero(Op0, APInt::getLowBitsSet(Op1C->getBitWidth(), ShAmt),
772 0, &I)){
773 I.setIsExact();
774 return &I;
775 }
776 }
777
778 return nullptr;
779 }
780
visitAShr(BinaryOperator & I)781 Instruction *InstCombiner::visitAShr(BinaryOperator &I) {
782 if (Value *V = SimplifyVectorOp(I))
783 return ReplaceInstUsesWith(I, V);
784
785 if (Value *V = SimplifyAShrInst(I.getOperand(0), I.getOperand(1), I.isExact(),
786 DL, TLI, DT, AC))
787 return ReplaceInstUsesWith(I, V);
788
789 if (Instruction *R = commonShiftTransforms(I))
790 return R;
791
792 Value *Op0 = I.getOperand(0), *Op1 = I.getOperand(1);
793
794 if (ConstantInt *Op1C = dyn_cast<ConstantInt>(Op1)) {
795 unsigned ShAmt = Op1C->getZExtValue();
796
797 // If the input is a SHL by the same constant (ashr (shl X, C), C), then we
798 // have a sign-extend idiom.
799 Value *X;
800 if (match(Op0, m_Shl(m_Value(X), m_Specific(Op1)))) {
801 // If the input is an extension from the shifted amount value, e.g.
802 // %x = zext i8 %A to i32
803 // %y = shl i32 %x, 24
804 // %z = ashr %y, 24
805 // then turn this into "z = sext i8 A to i32".
806 if (ZExtInst *ZI = dyn_cast<ZExtInst>(X)) {
807 uint32_t SrcBits = ZI->getOperand(0)->getType()->getScalarSizeInBits();
808 uint32_t DestBits = ZI->getType()->getScalarSizeInBits();
809 if (Op1C->getZExtValue() == DestBits-SrcBits)
810 return new SExtInst(ZI->getOperand(0), ZI->getType());
811 }
812 }
813
814 // If the shifted-out value is known-zero, then this is an exact shift.
815 if (!I.isExact() &&
816 MaskedValueIsZero(Op0,APInt::getLowBitsSet(Op1C->getBitWidth(),ShAmt),
817 0, &I)){
818 I.setIsExact();
819 return &I;
820 }
821 }
822
823 // See if we can turn a signed shr into an unsigned shr.
824 if (MaskedValueIsZero(Op0,
825 APInt::getSignBit(I.getType()->getScalarSizeInBits()),
826 0, &I))
827 return BinaryOperator::CreateLShr(Op0, Op1);
828
829 return nullptr;
830 }
831