1 /****************************************************************************** 2 * 3 * Copyright (C) 1999-2013 Broadcom Corporation 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ******************************************************************************/ 18 19 #ifndef HCIDEFS_H 20 #define HCIDEFS_H 21 22 #define HCI_PROTO_VERSION 0x01 /* Version for BT spec 1.1 */ 23 #define HCI_PROTO_VERSION_1_2 0x02 /* Version for BT spec 1.2 */ 24 #define HCI_PROTO_VERSION_2_0 0x03 /* Version for BT spec 2.0 */ 25 #define HCI_PROTO_VERSION_2_1 0x04 /* Version for BT spec 2.1 [Lisbon] */ 26 #define HCI_PROTO_VERSION_3_0 0x05 /* Version for BT spec 3.0 */ 27 #define HCI_PROTO_REVISION 0x000C /* Current implementation version */ 28 /* 29 ** Definitions for HCI groups 30 */ 31 #define HCI_GRP_LINK_CONTROL_CMDS (0x01 << 10) /* 0x0400 */ 32 #define HCI_GRP_LINK_POLICY_CMDS (0x02 << 10) /* 0x0800 */ 33 #define HCI_GRP_HOST_CONT_BASEBAND_CMDS (0x03 << 10) /* 0x0C00 */ 34 #define HCI_GRP_INFORMATIONAL_PARAMS (0x04 << 10) /* 0x1000 */ 35 #define HCI_GRP_STATUS_PARAMS (0x05 << 10) /* 0x1400 */ 36 #define HCI_GRP_TESTING_CMDS (0x06 << 10) /* 0x1800 */ 37 38 #define HCI_GRP_VENDOR_SPECIFIC (0x3F << 10) /* 0xFC00 */ 39 40 /* Group occupies high 6 bits of the HCI command rest is opcode itself */ 41 #define HCI_OGF(p) (UINT8)((0xFC00 & (p)) >> 10) 42 #define HCI_OCF(p) ( 0x3FF & (p)) 43 44 /* 45 ** Definitions for Link Control Commands 46 */ 47 /* Following opcode is used only in command complete event for flow control */ 48 #define HCI_COMMAND_NONE 0x0000 49 50 /* Commands of HCI_GRP_LINK_CONTROL_CMDS group */ 51 #define HCI_INQUIRY (0x0001 | HCI_GRP_LINK_CONTROL_CMDS) 52 #define HCI_INQUIRY_CANCEL (0x0002 | HCI_GRP_LINK_CONTROL_CMDS) 53 #define HCI_PERIODIC_INQUIRY_MODE (0x0003 | HCI_GRP_LINK_CONTROL_CMDS) 54 #define HCI_EXIT_PERIODIC_INQUIRY_MODE (0x0004 | HCI_GRP_LINK_CONTROL_CMDS) 55 #define HCI_CREATE_CONNECTION (0x0005 | HCI_GRP_LINK_CONTROL_CMDS) 56 #define HCI_DISCONNECT (0x0006 | HCI_GRP_LINK_CONTROL_CMDS) 57 #define HCI_ADD_SCO_CONNECTION (0x0007 | HCI_GRP_LINK_CONTROL_CMDS) 58 #define HCI_CREATE_CONNECTION_CANCEL (0x0008 | HCI_GRP_LINK_CONTROL_CMDS) 59 #define HCI_ACCEPT_CONNECTION_REQUEST (0x0009 | HCI_GRP_LINK_CONTROL_CMDS) 60 #define HCI_REJECT_CONNECTION_REQUEST (0x000A | HCI_GRP_LINK_CONTROL_CMDS) 61 #define HCI_LINK_KEY_REQUEST_REPLY (0x000B | HCI_GRP_LINK_CONTROL_CMDS) 62 #define HCI_LINK_KEY_REQUEST_NEG_REPLY (0x000C | HCI_GRP_LINK_CONTROL_CMDS) 63 #define HCI_PIN_CODE_REQUEST_REPLY (0x000D | HCI_GRP_LINK_CONTROL_CMDS) 64 #define HCI_PIN_CODE_REQUEST_NEG_REPLY (0x000E | HCI_GRP_LINK_CONTROL_CMDS) 65 #define HCI_CHANGE_CONN_PACKET_TYPE (0x000F | HCI_GRP_LINK_CONTROL_CMDS) 66 #define HCI_AUTHENTICATION_REQUESTED (0x0011 | HCI_GRP_LINK_CONTROL_CMDS) 67 #define HCI_SET_CONN_ENCRYPTION (0x0013 | HCI_GRP_LINK_CONTROL_CMDS) 68 #define HCI_CHANGE_CONN_LINK_KEY (0x0015 | HCI_GRP_LINK_CONTROL_CMDS) 69 #define HCI_MASTER_LINK_KEY (0x0017 | HCI_GRP_LINK_CONTROL_CMDS) 70 #define HCI_RMT_NAME_REQUEST (0x0019 | HCI_GRP_LINK_CONTROL_CMDS) 71 #define HCI_RMT_NAME_REQUEST_CANCEL (0x001A | HCI_GRP_LINK_CONTROL_CMDS) 72 #define HCI_READ_RMT_FEATURES (0x001B | HCI_GRP_LINK_CONTROL_CMDS) 73 #define HCI_READ_RMT_EXT_FEATURES (0x001C | HCI_GRP_LINK_CONTROL_CMDS) 74 #define HCI_READ_RMT_VERSION_INFO (0x001D | HCI_GRP_LINK_CONTROL_CMDS) 75 #define HCI_READ_RMT_CLOCK_OFFSET (0x001F | HCI_GRP_LINK_CONTROL_CMDS) 76 #define HCI_READ_LMP_HANDLE (0x0020 | HCI_GRP_LINK_CONTROL_CMDS) 77 #define HCI_SETUP_ESCO_CONNECTION (0x0028 | HCI_GRP_LINK_CONTROL_CMDS) 78 #define HCI_ACCEPT_ESCO_CONNECTION (0x0029 | HCI_GRP_LINK_CONTROL_CMDS) 79 #define HCI_REJECT_ESCO_CONNECTION (0x002A | HCI_GRP_LINK_CONTROL_CMDS) 80 #define HCI_IO_CAPABILITY_RESPONSE (0x002B | HCI_GRP_LINK_CONTROL_CMDS) 81 #define HCI_USER_CONF_REQUEST_REPLY (0x002C | HCI_GRP_LINK_CONTROL_CMDS) 82 #define HCI_USER_CONF_VALUE_NEG_REPLY (0x002D | HCI_GRP_LINK_CONTROL_CMDS) 83 #define HCI_USER_PASSKEY_REQ_REPLY (0x002E | HCI_GRP_LINK_CONTROL_CMDS) 84 #define HCI_USER_PASSKEY_REQ_NEG_REPLY (0x002F | HCI_GRP_LINK_CONTROL_CMDS) 85 #define HCI_REM_OOB_DATA_REQ_REPLY (0x0030 | HCI_GRP_LINK_CONTROL_CMDS) 86 #define HCI_REM_OOB_DATA_REQ_NEG_REPLY (0x0033 | HCI_GRP_LINK_CONTROL_CMDS) 87 #define HCI_IO_CAP_REQ_NEG_REPLY (0x0034 | HCI_GRP_LINK_CONTROL_CMDS) 88 89 /* AMP HCI */ 90 #define HCI_CREATE_PHYSICAL_LINK (0x0035 | HCI_GRP_LINK_CONTROL_CMDS) 91 #define HCI_ACCEPT_PHYSICAL_LINK (0x0036 | HCI_GRP_LINK_CONTROL_CMDS) 92 #define HCI_DISCONNECT_PHYSICAL_LINK (0x0037 | HCI_GRP_LINK_CONTROL_CMDS) 93 #define HCI_CREATE_LOGICAL_LINK (0x0038 | HCI_GRP_LINK_CONTROL_CMDS) 94 #define HCI_ACCEPT_LOGICAL_LINK (0x0039 | HCI_GRP_LINK_CONTROL_CMDS) 95 #define HCI_DISCONNECT_LOGICAL_LINK (0x003A | HCI_GRP_LINK_CONTROL_CMDS) 96 #define HCI_LOGICAL_LINK_CANCEL (0x003B | HCI_GRP_LINK_CONTROL_CMDS) 97 #define HCI_FLOW_SPEC_MODIFY (0x003C | HCI_GRP_LINK_CONTROL_CMDS) 98 /* End of AMP HCI */ 99 100 #define HCI_ENH_SETUP_ESCO_CONNECTION (0x003D | HCI_GRP_LINK_CONTROL_CMDS) 101 #define HCI_ENH_ACCEPT_ESCO_CONNECTION (0x003E | HCI_GRP_LINK_CONTROL_CMDS) 102 103 /* ConnectionLess Broadcast */ 104 #define HCI_TRUNCATED_PAGE (0x003F | HCI_GRP_LINK_CONTROL_CMDS) 105 #define HCI_TRUNCATED_PAGE_CANCEL (0x0040 | HCI_GRP_LINK_CONTROL_CMDS) 106 #define HCI_SET_CLB (0x0041 | HCI_GRP_LINK_CONTROL_CMDS) 107 #define HCI_RECEIVE_CLB (0x0042 | HCI_GRP_LINK_CONTROL_CMDS) 108 #define HCI_START_SYNC_TRAIN (0x0043 | HCI_GRP_LINK_CONTROL_CMDS) 109 #define HCI_RECEIVE_SYNC_TRAIN (0x0044 | HCI_GRP_LINK_CONTROL_CMDS) 110 111 #define HCI_LINK_CTRL_CMDS_FIRST HCI_INQUIRY 112 #define HCI_LINK_CTRL_CMDS_LAST HCI_RECEIVE_SYNC_TRAIN 113 114 /* Commands of HCI_GRP_LINK_POLICY_CMDS */ 115 #define HCI_HOLD_MODE (0x0001 | HCI_GRP_LINK_POLICY_CMDS) 116 #define HCI_SNIFF_MODE (0x0003 | HCI_GRP_LINK_POLICY_CMDS) 117 #define HCI_EXIT_SNIFF_MODE (0x0004 | HCI_GRP_LINK_POLICY_CMDS) 118 #define HCI_PARK_MODE (0x0005 | HCI_GRP_LINK_POLICY_CMDS) 119 #define HCI_EXIT_PARK_MODE (0x0006 | HCI_GRP_LINK_POLICY_CMDS) 120 #define HCI_QOS_SETUP (0x0007 | HCI_GRP_LINK_POLICY_CMDS) 121 #define HCI_ROLE_DISCOVERY (0x0009 | HCI_GRP_LINK_POLICY_CMDS) 122 #define HCI_SWITCH_ROLE (0x000B | HCI_GRP_LINK_POLICY_CMDS) 123 #define HCI_READ_POLICY_SETTINGS (0x000C | HCI_GRP_LINK_POLICY_CMDS) 124 #define HCI_WRITE_POLICY_SETTINGS (0x000D | HCI_GRP_LINK_POLICY_CMDS) 125 #define HCI_READ_DEF_POLICY_SETTINGS (0x000E | HCI_GRP_LINK_POLICY_CMDS) 126 #define HCI_WRITE_DEF_POLICY_SETTINGS (0x000F | HCI_GRP_LINK_POLICY_CMDS) 127 #define HCI_FLOW_SPECIFICATION (0x0010 | HCI_GRP_LINK_POLICY_CMDS) 128 #define HCI_SNIFF_SUB_RATE (0x0011 | HCI_GRP_LINK_POLICY_CMDS) 129 130 #define HCI_LINK_POLICY_CMDS_FIRST HCI_HOLD_MODE 131 #define HCI_LINK_POLICY_CMDS_LAST HCI_SNIFF_SUB_RATE 132 133 134 /* Commands of HCI_GRP_HOST_CONT_BASEBAND_CMDS */ 135 #define HCI_SET_EVENT_MASK (0x0001 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 136 #define HCI_RESET (0x0003 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 137 #define HCI_SET_EVENT_FILTER (0x0005 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 138 #define HCI_FLUSH (0x0008 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 139 #define HCI_READ_PIN_TYPE (0x0009 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 140 #define HCI_WRITE_PIN_TYPE (0x000A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 141 #define HCI_CREATE_NEW_UNIT_KEY (0x000B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 142 #define HCI_GET_MWS_TRANS_LAYER_CFG (0x000C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 143 #define HCI_READ_STORED_LINK_KEY (0x000D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 144 #define HCI_WRITE_STORED_LINK_KEY (0x0011 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 145 #define HCI_DELETE_STORED_LINK_KEY (0x0012 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 146 #define HCI_CHANGE_LOCAL_NAME (0x0013 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 147 #define HCI_READ_LOCAL_NAME (0x0014 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 148 #define HCI_READ_CONN_ACCEPT_TOUT (0x0015 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 149 #define HCI_WRITE_CONN_ACCEPT_TOUT (0x0016 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 150 #define HCI_READ_PAGE_TOUT (0x0017 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 151 #define HCI_WRITE_PAGE_TOUT (0x0018 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 152 #define HCI_READ_SCAN_ENABLE (0x0019 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 153 #define HCI_WRITE_SCAN_ENABLE (0x001A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 154 #define HCI_READ_PAGESCAN_CFG (0x001B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 155 #define HCI_WRITE_PAGESCAN_CFG (0x001C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 156 #define HCI_READ_INQUIRYSCAN_CFG (0x001D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 157 #define HCI_WRITE_INQUIRYSCAN_CFG (0x001E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 158 #define HCI_READ_AUTHENTICATION_ENABLE (0x001F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 159 #define HCI_WRITE_AUTHENTICATION_ENABLE (0x0020 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 160 #define HCI_READ_ENCRYPTION_MODE (0x0021 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 161 #define HCI_WRITE_ENCRYPTION_MODE (0x0022 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 162 #define HCI_READ_CLASS_OF_DEVICE (0x0023 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 163 #define HCI_WRITE_CLASS_OF_DEVICE (0x0024 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 164 #define HCI_READ_VOICE_SETTINGS (0x0025 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 165 #define HCI_WRITE_VOICE_SETTINGS (0x0026 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 166 #define HCI_READ_AUTO_FLUSH_TOUT (0x0027 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 167 #define HCI_WRITE_AUTO_FLUSH_TOUT (0x0028 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 168 #define HCI_READ_NUM_BCAST_REXMITS (0x0029 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 169 #define HCI_WRITE_NUM_BCAST_REXMITS (0x002A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 170 #define HCI_READ_HOLD_MODE_ACTIVITY (0x002B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 171 #define HCI_WRITE_HOLD_MODE_ACTIVITY (0x002C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 172 #define HCI_READ_TRANSMIT_POWER_LEVEL (0x002D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 173 #define HCI_READ_SCO_FLOW_CTRL_ENABLE (0x002E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 174 #define HCI_WRITE_SCO_FLOW_CTRL_ENABLE (0x002F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 175 #define HCI_SET_HC_TO_HOST_FLOW_CTRL (0x0031 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 176 #define HCI_HOST_BUFFER_SIZE (0x0033 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 177 #define HCI_HOST_NUM_PACKETS_DONE (0x0035 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 178 #define HCI_READ_LINK_SUPER_TOUT (0x0036 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 179 #define HCI_WRITE_LINK_SUPER_TOUT (0x0037 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 180 #define HCI_READ_NUM_SUPPORTED_IAC (0x0038 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 181 #define HCI_READ_CURRENT_IAC_LAP (0x0039 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 182 #define HCI_WRITE_CURRENT_IAC_LAP (0x003A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 183 #define HCI_READ_PAGESCAN_PERIOD_MODE (0x003B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 184 #define HCI_WRITE_PAGESCAN_PERIOD_MODE (0x003C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 185 #define HCI_READ_PAGESCAN_MODE (0x003D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 186 #define HCI_WRITE_PAGESCAN_MODE (0x003E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 187 #define HCI_SET_AFH_CHANNELS (0x003F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 188 189 #define HCI_READ_INQSCAN_TYPE (0x0042 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 190 #define HCI_WRITE_INQSCAN_TYPE (0x0043 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 191 #define HCI_READ_INQUIRY_MODE (0x0044 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 192 #define HCI_WRITE_INQUIRY_MODE (0x0045 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 193 #define HCI_READ_PAGESCAN_TYPE (0x0046 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 194 #define HCI_WRITE_PAGESCAN_TYPE (0x0047 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 195 #define HCI_READ_AFH_ASSESSMENT_MODE (0x0048 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 196 #define HCI_WRITE_AFH_ASSESSMENT_MODE (0x0049 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 197 #define HCI_READ_EXT_INQ_RESPONSE (0x0051 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 198 #define HCI_WRITE_EXT_INQ_RESPONSE (0x0052 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 199 #define HCI_REFRESH_ENCRYPTION_KEY (0x0053 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 200 #define HCI_READ_SIMPLE_PAIRING_MODE (0x0055 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 201 #define HCI_WRITE_SIMPLE_PAIRING_MODE (0x0056 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 202 #define HCI_READ_LOCAL_OOB_DATA (0x0057 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 203 #define HCI_READ_INQ_TX_POWER_LEVEL (0x0058 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 204 #define HCI_WRITE_INQ_TX_POWER_LEVEL (0x0059 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 205 #define HCI_READ_ERRONEOUS_DATA_RPT (0x005A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 206 #define HCI_WRITE_ERRONEOUS_DATA_RPT (0x005B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 207 #define HCI_ENHANCED_FLUSH (0x005F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 208 #define HCI_SEND_KEYPRESS_NOTIF (0x0060 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 209 210 #define HCI_READ_LOGICAL_LINK_ACCEPT_TIMEOUT (0x0061 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 211 #define HCI_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT (0x0062 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 212 #define HCI_SET_EVENT_MASK_PAGE_2 (0x0063 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 213 #define HCI_READ_LOCATION_DATA (0x0064 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 214 #define HCI_WRITE_LOCATION_DATA (0x0065 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 215 #define HCI_READ_FLOW_CONTROL_MODE (0x0066 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 216 #define HCI_WRITE_FLOW_CONTROL_MODE (0x0067 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 217 #define HCI_READ_BE_FLUSH_TOUT (0x0069 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 218 #define HCI_WRITE_BE_FLUSH_TOUT (0x006A | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 219 #define HCI_SHORT_RANGE_MODE (0x006B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 220 #define HCI_READ_LE_HOST_SUPPORTED (0x006C | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 221 #define HCI_WRITE_LE_HOST_SUPPORTED (0x006D | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 222 223 224 /* MWS coexistence */ 225 #define HCI_SET_MWS_CHANNEL_PARAMETERS (0x006E | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 226 #define HCI_SET_EXTERNAL_FRAME_CONFIGURATION (0x006F | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 227 #define HCI_SET_MWS_SIGNALING (0x0070 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 228 #define HCI_SET_MWS_TRANSPORT_LAYER (0x0071 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 229 #define HCI_SET_MWS_SCAN_FREQUENCY_TABLE (0x0072 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 230 #define HCI_SET_MWS_PATTERN_CONFIGURATION (0x0073 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 231 232 /* ConnectionLess Broadcast */ 233 #define HCI_SET_RESERVED_LT_ADDR (0x0074 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 234 #define HCI_DELETE_RESERVED_LT_ADDR (0x0075 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 235 #define HCI_WRITE_CLB_DATA (0x0076 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 236 #define HCI_READ_SYNC_TRAIN_PARAM (0x0077 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 237 #define HCI_WRITE_SYNC_TRAIN_PARAM (0x0078 | HCI_GRP_HOST_CONT_BASEBAND_CMDS) 238 239 240 #define HCI_CONT_BASEBAND_CMDS_FIRST HCI_SET_EVENT_MASK 241 #define HCI_CONT_BASEBAND_CMDS_LAST HCI_READ_SYNC_TRAIN_PARAM 242 243 244 /* Commands of HCI_GRP_INFORMATIONAL_PARAMS group */ 245 #define HCI_READ_LOCAL_VERSION_INFO (0x0001 | HCI_GRP_INFORMATIONAL_PARAMS) 246 #define HCI_READ_LOCAL_SUPPORTED_CMDS (0x0002 | HCI_GRP_INFORMATIONAL_PARAMS) 247 #define HCI_READ_LOCAL_FEATURES (0x0003 | HCI_GRP_INFORMATIONAL_PARAMS) 248 #define HCI_READ_LOCAL_EXT_FEATURES (0x0004 | HCI_GRP_INFORMATIONAL_PARAMS) 249 #define HCI_READ_BUFFER_SIZE (0x0005 | HCI_GRP_INFORMATIONAL_PARAMS) 250 #define HCI_READ_COUNTRY_CODE (0x0007 | HCI_GRP_INFORMATIONAL_PARAMS) 251 #define HCI_READ_BD_ADDR (0x0009 | HCI_GRP_INFORMATIONAL_PARAMS) 252 #define HCI_READ_DATA_BLOCK_SIZE (0x000A | HCI_GRP_INFORMATIONAL_PARAMS) 253 #define HCI_READ_LOCAL_SUPPORTED_CODECS (0x000B | HCI_GRP_INFORMATIONAL_PARAMS) 254 255 256 #define HCI_INFORMATIONAL_CMDS_FIRST HCI_READ_LOCAL_VERSION_INFO 257 #define HCI_INFORMATIONAL_CMDS_LAST HCI_READ_LOCAL_SUPPORTED_CODECS 258 259 260 /* Commands of HCI_GRP_STATUS_PARAMS group */ 261 #define HCI_READ_FAILED_CONTACT_COUNT (0x0001 | HCI_GRP_STATUS_PARAMS) 262 #define HCI_RESET_FAILED_CONTACT_COUNT (0x0002 | HCI_GRP_STATUS_PARAMS) 263 #define HCI_GET_LINK_QUALITY (0x0003 | HCI_GRP_STATUS_PARAMS) 264 #define HCI_READ_RSSI (0x0005 | HCI_GRP_STATUS_PARAMS) 265 #define HCI_READ_AFH_CH_MAP (0x0006 | HCI_GRP_STATUS_PARAMS) 266 #define HCI_READ_CLOCK (0x0007 | HCI_GRP_STATUS_PARAMS) 267 #define HCI_READ_ENCR_KEY_SIZE (0x0008 | HCI_GRP_STATUS_PARAMS) 268 269 /* AMP HCI */ 270 #define HCI_READ_LOCAL_AMP_INFO (0x0009 | HCI_GRP_STATUS_PARAMS) 271 #define HCI_READ_LOCAL_AMP_ASSOC (0x000A | HCI_GRP_STATUS_PARAMS) 272 #define HCI_WRITE_REMOTE_AMP_ASSOC (0x000B | HCI_GRP_STATUS_PARAMS) 273 274 /* CSA4 (Trigger Clock) */ 275 #define HCI_SET_TRIGGERED_CLOCK_CAPTURE (0x000D | HCI_GRP_STATUS_PARAMS) 276 277 #define HCI_STATUS_PARAMS_CMDS_FIRST HCI_READ_FAILED_CONTACT_COUNT 278 #define HCI_STATUS_PARAMS_CMDS_LAST HCI_SET_TRIGGERED_CLOCK_CAPTURE 279 280 /* Commands of HCI_GRP_TESTING_CMDS group */ 281 #define HCI_READ_LOOPBACK_MODE (0x0001 | HCI_GRP_TESTING_CMDS) 282 #define HCI_WRITE_LOOPBACK_MODE (0x0002 | HCI_GRP_TESTING_CMDS) 283 #define HCI_ENABLE_DEV_UNDER_TEST_MODE (0x0003 | HCI_GRP_TESTING_CMDS) 284 #define HCI_WRITE_SIMP_PAIR_DEBUG_MODE (0x0004 | HCI_GRP_TESTING_CMDS) 285 286 /* AMP HCI */ 287 #define HCI_ENABLE_AMP_RCVR_REPORTS (0x0007 | HCI_GRP_TESTING_CMDS) 288 #define HCI_AMP_TEST_END (0x0008 | HCI_GRP_TESTING_CMDS) 289 #define HCI_AMP_TEST (0x0009 | HCI_GRP_TESTING_CMDS) 290 291 #define HCI_TESTING_CMDS_FIRST HCI_READ_LOOPBACK_MODE 292 #define HCI_TESTING_CMDS_LAST HCI_AMP_TEST 293 294 #define HCI_VENDOR_CMDS_FIRST 0x0001 295 #define HCI_VENDOR_CMDS_LAST 0xFFFF 296 #define HCI_VSC_MULTI_AV_HANDLE 0x0AAA 297 #define HCI_VSC_BURST_MODE_HANDLE 0x0BBB 298 299 /* BLE HCI */ 300 #define HCI_GRP_BLE_CMDS (0x08 << 10) 301 /* Commands of BLE Controller setup and configuration */ 302 #define HCI_BLE_SET_EVENT_MASK (0x0001 | HCI_GRP_BLE_CMDS) 303 #define HCI_BLE_READ_BUFFER_SIZE (0x0002 | HCI_GRP_BLE_CMDS) 304 #define HCI_BLE_READ_LOCAL_SPT_FEAT (0x0003 | HCI_GRP_BLE_CMDS) 305 #define HCI_BLE_WRITE_LOCAL_SPT_FEAT (0x0004 | HCI_GRP_BLE_CMDS) 306 #define HCI_BLE_WRITE_RANDOM_ADDR (0x0005 | HCI_GRP_BLE_CMDS) 307 #define HCI_BLE_WRITE_ADV_PARAMS (0x0006 | HCI_GRP_BLE_CMDS) 308 #define HCI_BLE_READ_ADV_CHNL_TX_POWER (0x0007 | HCI_GRP_BLE_CMDS) 309 #define HCI_BLE_WRITE_ADV_DATA (0x0008 | HCI_GRP_BLE_CMDS) 310 #define HCI_BLE_WRITE_SCAN_RSP_DATA (0x0009 | HCI_GRP_BLE_CMDS) 311 #define HCI_BLE_WRITE_ADV_ENABLE (0x000A | HCI_GRP_BLE_CMDS) 312 #define HCI_BLE_WRITE_SCAN_PARAMS (0x000B | HCI_GRP_BLE_CMDS) 313 #define HCI_BLE_WRITE_SCAN_ENABLE (0x000C | HCI_GRP_BLE_CMDS) 314 #define HCI_BLE_CREATE_LL_CONN (0x000D | HCI_GRP_BLE_CMDS) 315 #define HCI_BLE_CREATE_CONN_CANCEL (0x000E | HCI_GRP_BLE_CMDS) 316 #define HCI_BLE_READ_WHITE_LIST_SIZE (0x000F | HCI_GRP_BLE_CMDS) 317 #define HCI_BLE_CLEAR_WHITE_LIST (0x0010 | HCI_GRP_BLE_CMDS) 318 #define HCI_BLE_ADD_WHITE_LIST (0x0011 | HCI_GRP_BLE_CMDS) 319 #define HCI_BLE_REMOVE_WHITE_LIST (0x0012 | HCI_GRP_BLE_CMDS) 320 #define HCI_BLE_UPD_LL_CONN_PARAMS (0x0013 | HCI_GRP_BLE_CMDS) 321 #define HCI_BLE_SET_HOST_CHNL_CLASS (0x0014 | HCI_GRP_BLE_CMDS) 322 #define HCI_BLE_READ_CHNL_MAP (0x0015 | HCI_GRP_BLE_CMDS) 323 #define HCI_BLE_READ_REMOTE_FEAT (0x0016 | HCI_GRP_BLE_CMDS) 324 #define HCI_BLE_ENCRYPT (0x0017 | HCI_GRP_BLE_CMDS) 325 #define HCI_BLE_RAND (0x0018 | HCI_GRP_BLE_CMDS) 326 #define HCI_BLE_START_ENC (0x0019 | HCI_GRP_BLE_CMDS) 327 #define HCI_BLE_LTK_REQ_REPLY (0x001A | HCI_GRP_BLE_CMDS) 328 #define HCI_BLE_LTK_REQ_NEG_REPLY (0x001B | HCI_GRP_BLE_CMDS) 329 #define HCI_BLE_READ_SUPPORTED_STATES (0x001C | HCI_GRP_BLE_CMDS) 330 331 #define HCI_BLE_RESET (0x0020 | HCI_GRP_BLE_CMDS) 332 333 /* LE supported states definition */ 334 #define HCI_LE_ADV_STATE 0x00000001 335 #define HCI_LE_SCAN_STATE 0x00000002 336 #define HCI_LE_INIT_STATE 0x00000004 337 #define HCI_LE_CONN_SL_STATE 0x00000008 338 #define HCI_LE_ADV_SCAN_STATE 0x00000010 339 #define HCI_LE_ADV_INIT_STATE 0x00000020 340 #define HCI_LE_ADV_MA_STATE 0x00000040 341 #define HCI_LE_ADV_SL_STATE 0x00000080 342 #define HCI_LE_SCAN_INIT_STATE 0x00000100 343 #define HCI_LE_SCAN_MA_STATE 0x00000200 344 #define HCI_LE_SCAN_SL_STATE 0x00000400 345 #define HCI_LE_INIT_MA_STATE 0x00000800 346 347 348 /* 349 ** Definitions for HCI Events 350 */ 351 #define HCI_INQUIRY_COMP_EVT 0x01 352 #define HCI_INQUIRY_RESULT_EVT 0x02 353 #define HCI_CONNECTION_COMP_EVT 0x03 354 #define HCI_CONNECTION_REQUEST_EVT 0x04 355 #define HCI_DISCONNECTION_COMP_EVT 0x05 356 #define HCI_AUTHENTICATION_COMP_EVT 0x06 357 #define HCI_RMT_NAME_REQUEST_COMP_EVT 0x07 358 #define HCI_ENCRYPTION_CHANGE_EVT 0x08 359 #define HCI_CHANGE_CONN_LINK_KEY_EVT 0x09 360 #define HCI_MASTER_LINK_KEY_COMP_EVT 0x0A 361 #define HCI_READ_RMT_FEATURES_COMP_EVT 0x0B 362 #define HCI_READ_RMT_VERSION_COMP_EVT 0x0C 363 #define HCI_QOS_SETUP_COMP_EVT 0x0D 364 #define HCI_COMMAND_COMPLETE_EVT 0x0E 365 #define HCI_COMMAND_STATUS_EVT 0x0F 366 #define HCI_HARDWARE_ERROR_EVT 0x10 367 #define HCI_FLUSH_OCCURED_EVT 0x11 368 #define HCI_ROLE_CHANGE_EVT 0x12 369 #define HCI_NUM_COMPL_DATA_PKTS_EVT 0x13 370 #define HCI_MODE_CHANGE_EVT 0x14 371 #define HCI_RETURN_LINK_KEYS_EVT 0x15 372 #define HCI_PIN_CODE_REQUEST_EVT 0x16 373 #define HCI_LINK_KEY_REQUEST_EVT 0x17 374 #define HCI_LINK_KEY_NOTIFICATION_EVT 0x18 375 #define HCI_LOOPBACK_COMMAND_EVT 0x19 376 #define HCI_DATA_BUF_OVERFLOW_EVT 0x1A 377 #define HCI_MAX_SLOTS_CHANGED_EVT 0x1B 378 #define HCI_READ_CLOCK_OFF_COMP_EVT 0x1C 379 #define HCI_CONN_PKT_TYPE_CHANGE_EVT 0x1D 380 #define HCI_QOS_VIOLATION_EVT 0x1E 381 #define HCI_PAGE_SCAN_MODE_CHANGE_EVT 0x1F 382 #define HCI_PAGE_SCAN_REP_MODE_CHNG_EVT 0x20 383 #define HCI_FLOW_SPECIFICATION_COMP_EVT 0x21 384 #define HCI_INQUIRY_RSSI_RESULT_EVT 0x22 385 #define HCI_READ_RMT_EXT_FEATURES_COMP_EVT 0x23 386 #define HCI_ESCO_CONNECTION_COMP_EVT 0x2C 387 #define HCI_ESCO_CONNECTION_CHANGED_EVT 0x2D 388 #define HCI_SNIFF_SUB_RATE_EVT 0x2E 389 #define HCI_EXTENDED_INQUIRY_RESULT_EVT 0x2F 390 #define HCI_ENCRYPTION_KEY_REFRESH_COMP_EVT 0x30 391 #define HCI_IO_CAPABILITY_REQUEST_EVT 0x31 392 #define HCI_IO_CAPABILITY_RESPONSE_EVT 0x32 393 #define HCI_USER_CONFIRMATION_REQUEST_EVT 0x33 394 #define HCI_USER_PASSKEY_REQUEST_EVT 0x34 395 #define HCI_REMOTE_OOB_DATA_REQUEST_EVT 0x35 396 #define HCI_SIMPLE_PAIRING_COMPLETE_EVT 0x36 397 #define HCI_LINK_SUPER_TOUT_CHANGED_EVT 0x38 398 #define HCI_ENHANCED_FLUSH_COMPLETE_EVT 0x39 399 #define HCI_USER_PASSKEY_NOTIFY_EVT 0x3B 400 #define HCI_KEYPRESS_NOTIFY_EVT 0x3C 401 #define HCI_RMT_HOST_SUP_FEAT_NOTIFY_EVT 0x3D 402 403 /*#define HCI_GENERIC_AMP_LINK_KEY_NOTIF_EVT 0x3E Removed from spec */ 404 #define HCI_PHYSICAL_LINK_COMP_EVT 0x40 405 #define HCI_CHANNEL_SELECTED_EVT 0x41 406 #define HCI_DISC_PHYSICAL_LINK_COMP_EVT 0x42 407 #define HCI_PHY_LINK_LOSS_EARLY_WARNING_EVT 0x43 408 #define HCI_PHY_LINK_RECOVERY_EVT 0x44 409 #define HCI_LOGICAL_LINK_COMP_EVT 0x45 410 #define HCI_DISC_LOGICAL_LINK_COMP_EVT 0x46 411 #define HCI_FLOW_SPEC_MODIFY_COMP_EVT 0x47 412 #define HCI_NUM_COMPL_DATA_BLOCKS_EVT 0x48 413 #define HCI_SHORT_RANGE_MODE_COMPLETE_EVT 0x4C 414 #define HCI_AMP_STATUS_CHANGE_EVT 0x4D 415 #define HCI_SET_TRIGGERED_CLOCK_CAPTURE_EVT 0x4E 416 417 418 419 /* ULP HCI Event */ 420 #define HCI_BLE_EVENT 0x03E 421 /* ULP Event sub code */ 422 #define HCI_BLE_CONN_COMPLETE_EVT 0x01 423 #define HCI_BLE_ADV_PKT_RPT_EVT 0x02 424 #define HCI_BLE_LL_CONN_PARAM_UPD_EVT 0x03 425 #define HCI_BLE_READ_REMOTE_FEAT_CMPL_EVT 0x04 426 #define HCI_BLE_LTK_REQ_EVT 0x05 427 428 /* ConnectionLess Broadcast events */ 429 #define HCI_SYNC_TRAIN_COMP_EVT 0x4F 430 #define HCI_SYNC_TRAIN_RECEIVED_EVT 0x50 431 #define HCI_CLB_RX_DATA_EVT 0x51 432 #define HCI_CLB_RX_TIMEOUT_EVT 0x52 433 #define HCI_TRUNCATED_PAGE_COMP_EVT 0x53 434 #define HCI_SLAVE_PAGE_RESP_TIMEOUT_EVT 0x54 435 #define HCI_CLB_CHANNEL_CHANGE_EVT 0x55 436 #define HCI_INQUIRY_RESPONSE_NOTIF 0x56 437 438 #define HCI_EVENT_RSP_FIRST HCI_INQUIRY_COMP_EVT 439 #define HCI_EVENT_RSP_LAST HCI_CLB_CHANNEL_CHANGE_EVT 440 441 #define HCI_VENDOR_SPECIFIC_EVT 0xFF /* Vendor specific events */ 442 #define HCI_NAP_TRACE_EVT 0xFF /* was define 0xFE, 0xFD, change to 0xFF 443 because conflict w/ TCI_EVT and per 444 specification compliant */ 445 446 /* 447 ** Defentions for HCI Error Codes that are past in the events 448 */ 449 #define HCI_SUCCESS 0x00 450 #define HCI_PENDING 0x00 451 #define HCI_ERR_ILLEGAL_COMMAND 0x01 452 #define HCI_ERR_NO_CONNECTION 0x02 453 #define HCI_ERR_HW_FAILURE 0x03 454 #define HCI_ERR_PAGE_TIMEOUT 0x04 455 #define HCI_ERR_AUTH_FAILURE 0x05 456 #define HCI_ERR_KEY_MISSING 0x06 457 #define HCI_ERR_MEMORY_FULL 0x07 458 #define HCI_ERR_CONNECTION_TOUT 0x08 459 #define HCI_ERR_MAX_NUM_OF_CONNECTIONS 0x09 460 #define HCI_ERR_MAX_NUM_OF_SCOS 0x0A 461 #define HCI_ERR_CONNECTION_EXISTS 0x0B 462 #define HCI_ERR_COMMAND_DISALLOWED 0x0C 463 #define HCI_ERR_HOST_REJECT_RESOURCES 0x0D 464 #define HCI_ERR_HOST_REJECT_SECURITY 0x0E 465 #define HCI_ERR_HOST_REJECT_DEVICE 0x0F 466 #define HCI_ERR_HOST_TIMEOUT 0x10 467 #define HCI_ERR_UNSUPPORTED_VALUE 0x11 468 #define HCI_ERR_ILLEGAL_PARAMETER_FMT 0x12 469 #define HCI_ERR_PEER_USER 0x13 470 #define HCI_ERR_PEER_LOW_RESOURCES 0x14 471 #define HCI_ERR_PEER_POWER_OFF 0x15 472 #define HCI_ERR_CONN_CAUSE_LOCAL_HOST 0x16 473 #define HCI_ERR_REPEATED_ATTEMPTS 0x17 474 #define HCI_ERR_PAIRING_NOT_ALLOWED 0x18 475 #define HCI_ERR_UNKNOWN_LMP_PDU 0x19 476 #define HCI_ERR_UNSUPPORTED_REM_FEATURE 0x1A 477 #define HCI_ERR_SCO_OFFSET_REJECTED 0x1B 478 #define HCI_ERR_SCO_INTERVAL_REJECTED 0x1C 479 #define HCI_ERR_SCO_AIR_MODE 0x1D 480 #define HCI_ERR_INVALID_LMP_PARAM 0x1E 481 #define HCI_ERR_UNSPECIFIED 0x1F 482 #define HCI_ERR_UNSUPPORTED_LMP_FEATURE 0x20 483 #define HCI_ERR_ROLE_CHANGE_NOT_ALLOWED 0x21 484 #define HCI_ERR_LMP_RESPONSE_TIMEOUT 0x22 485 #define HCI_ERR_LMP_ERR_TRANS_COLLISION 0x23 486 #define HCI_ERR_LMP_PDU_NOT_ALLOWED 0x24 487 #define HCI_ERR_ENCRY_MODE_NOT_ACCEPTABLE 0x25 488 #define HCI_ERR_UNIT_KEY_USED 0x26 489 #define HCI_ERR_QOS_NOT_SUPPORTED 0x27 490 #define HCI_ERR_INSTANT_PASSED 0x28 491 #define HCI_ERR_PAIRING_WITH_UNIT_KEY_NOT_SUPPORTED 0x29 492 #define HCI_ERR_DIFF_TRANSACTION_COLLISION 0x2A 493 #define HCI_ERR_UNDEFINED_0x2B 0x2B 494 #define HCI_ERR_QOS_UNACCEPTABLE_PARAM 0x2C 495 #define HCI_ERR_QOS_REJECTED 0x2D 496 #define HCI_ERR_CHAN_CLASSIF_NOT_SUPPORTED 0x2E 497 #define HCI_ERR_INSUFFCIENT_SECURITY 0x2F 498 #define HCI_ERR_PARAM_OUT_OF_RANGE 0x30 499 #define HCI_ERR_UNDEFINED_0x31 0x31 500 #define HCI_ERR_ROLE_SWITCH_PENDING 0x32 501 #define HCI_ERR_UNDEFINED_0x33 0x33 502 #define HCI_ERR_RESERVED_SLOT_VIOLATION 0x34 503 #define HCI_ERR_ROLE_SWITCH_FAILED 0x35 504 #define HCI_ERR_INQ_RSP_DATA_TOO_LARGE 0x36 505 #define HCI_ERR_SIMPLE_PAIRING_NOT_SUPPORTED 0x37 506 #define HCI_ERR_HOST_BUSY_PAIRING 0x38 507 #define HCI_ERR_REJ_NO_SUITABLE_CHANNEL 0x39 508 #define HCI_ERR_CONTROLLER_BUSY 0x3A 509 #define HCI_ERR_UNACCEPT_CONN_INTERVAL 0x3B 510 #define HCI_ERR_DIRECTED_ADVERTISING_TIMEOUT 0x3C 511 #define HCI_ERR_CONN_TOUT_DUE_TO_MIC_FAILURE 0x3D 512 #define HCI_ERR_CONN_FAILED_ESTABLISHMENT 0x3E 513 #define HCI_ERR_MAC_CONNECTION_FAILED 0x3F 514 515 /* ConnectionLess Broadcast errors */ 516 #define HCI_ERR_LT_ADDR_ALREADY_IN_USE 0x40 517 #define HCI_ERR_LT_ADDR_NOT_ALLOCATED 0x41 518 #define HCI_ERR_CLB_NOT_ENABLED 0x42 519 #define HCI_ERR_CLB_DATA_TOO_BIG 0x43 520 521 #define HCI_ERR_MAX_ERR 0x43 522 523 #define HCI_HINT_TO_RECREATE_AMP_PHYS_LINK 0xFF 524 525 /* 526 ** Definitions for HCI enable event 527 */ 528 #define HCI_INQUIRY_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000001) 529 #define HCI_INQUIRY_RESULT_EV(p) (*((UINT32 *)(p)) & 0x00000002) 530 #define HCI_CONNECTION_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000004) 531 #define HCI_CONNECTION_REQUEST_EV(p) (*((UINT32 *)(p)) & 0x00000008) 532 #define HCI_DISCONNECTION_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000010) 533 #define HCI_AUTHENTICATION_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000020) 534 #define HCI_RMT_NAME_REQUEST_COMPL_EV(p) (*((UINT32 *)(p)) & 0x00000040) 535 #define HCI_CHANGE_CONN_ENCRPT_ENABLE_EV(p) (*((UINT32 *)(p)) & 0x00000080) 536 #define HCI_CHANGE_CONN_LINK_KEY_EV(p) (*((UINT32 *)(p)) & 0x00000100) 537 #define HCI_MASTER_LINK_KEY_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00000200) 538 #define HCI_READ_RMT_FEATURES_COMPL_EV(p) (*((UINT32 *)(p)) & 0x00000400) 539 #define HCI_READ_RMT_VERSION_COMPL_EV(p) (*((UINT32 *)(p)) & 0x00000800) 540 #define HCI_QOS_SETUP_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00001000) 541 #define HCI_COMMAND_COMPLETE_EV(p) (*((UINT32 *)(p)) & 0x00002000) 542 #define HCI_COMMAND_STATUS_EV(p) (*((UINT32 *)(p)) & 0x00004000) 543 #define HCI_HARDWARE_ERROR_EV(p) (*((UINT32 *)(p)) & 0x00008000) 544 #define HCI_FLASH_OCCURED_EV(p) (*((UINT32 *)(p)) & 0x00010000) 545 #define HCI_ROLE_CHANGE_EV(p) (*((UINT32 *)(p)) & 0x00020000) 546 #define HCI_NUM_COMPLETED_PKTS_EV(p) (*((UINT32 *)(p)) & 0x00040000) 547 #define HCI_MODE_CHANGE_EV(p) (*((UINT32 *)(p)) & 0x00080000) 548 #define HCI_RETURN_LINK_KEYS_EV(p) (*((UINT32 *)(p)) & 0x00100000) 549 #define HCI_PIN_CODE_REQUEST_EV(p) (*((UINT32 *)(p)) & 0x00200000) 550 #define HCI_LINK_KEY_REQUEST_EV(p) (*((UINT32 *)(p)) & 0x00400000) 551 #define HCI_LINK_KEY_NOTIFICATION_EV(p) (*((UINT32 *)(p)) & 0x00800000) 552 #define HCI_LOOPBACK_COMMAND_EV(p) (*((UINT32 *)(p)) & 0x01000000) 553 #define HCI_DATA_BUF_OVERFLOW_EV(p) (*((UINT32 *)(p)) & 0x02000000) 554 #define HCI_MAX_SLOTS_CHANGE_EV(p) (*((UINT32 *)(p)) & 0x04000000) 555 #define HCI_READ_CLOCK_OFFSET_COMP_EV(p) (*((UINT32 *)(p)) & 0x08000000) 556 #define HCI_CONN_PKT_TYPE_CHANGED_EV(p) (*((UINT32 *)(p)) & 0x10000000) 557 #define HCI_QOS_VIOLATION_EV(p) (*((UINT32 *)(p)) & 0x20000000) 558 #define HCI_PAGE_SCAN_MODE_CHANGED_EV(p) (*((UINT32 *)(p)) & 0x40000000) 559 #define HCI_PAGE_SCAN_REP_MODE_CHNG_EV(p) (*((UINT32 *)(p)) & 0x80000000) 560 561 /* the default event mask for 2.1+EDR (Lisbon) does not include Lisbon events */ 562 #define HCI_DEFAULT_EVENT_MASK_0 0xFFFFFFFF 563 #define HCI_DEFAULT_EVENT_MASK_1 0x00001FFF 564 565 /* the event mask for 2.0 + EDR and later (includes Lisbon events) */ 566 #define HCI_LISBON_EVENT_MASK_0 0xFFFFFFFF 567 #define HCI_LISBON_EVENT_MASK_1 0x1DBFFFFF 568 #define HCI_LISBON_EVENT_MASK "\x0D\xBF\xFF\xFF\xFF\xFF\xFF\xFF" 569 #define HCI_LISBON_EVENT_MASK_EXT "\x1D\xBF\xFF\xFF\xFF\xFF\xFF\xFF" 570 #define HCI_DUMO_EVENT_MASK_EXT "\x3D\xBF\xFF\xFF\xFF\xFF\xFF\xFF" 571 /* 0x00001FFF FFFFFFFF Default - no Lisbon events 572 0x00000800 00000000 Synchronous Connection Complete Event 573 0x00001000 00000000 Synchronous Connection Changed Event 574 0x00002000 00000000 Sniff Subrate Event 575 0x00004000 00000000 Extended Inquiry Result Event 576 0x00008000 00000000 Encryption Key Refresh Complete Event 577 0x00010000 00000000 IO Capability Request Event 578 0x00020000 00000000 IO Capability Response Event 579 0x00040000 00000000 User Confirmation Request Event 580 0x00080000 00000000 User Passkey Request Event 581 0x00100000 00000000 Remote OOB Data Request Event 582 0x00200000 00000000 Simple Pairing Complete Event 583 0x00400000 00000000 Generic AMP Link Key Notification Event 584 0x00800000 00000000 Link Supervision Timeout Changed Event 585 0x01000000 00000000 Enhanced Flush Complete Event 586 0x04000000 00000000 User Passkey Notification Event 587 0x08000000 00000000 Keypress Notification Event 588 0x10000000 00000000 Remote Host Supported Features Notification Event 589 0x20000000 00000000 LE Meta Event 590 */ 591 592 593 /* the event mask for AMP controllers */ 594 #define HCI_AMP_EVENT_MASK_3_0 "\x00\x00\x00\x00\x00\x00\x3F\xFF" 595 596 /* 0x0000000000000000 No events specified (default) 597 0x0000000000000001 Physical Link Complete Event 598 0x0000000000000002 Channel Selected Event 599 0x0000000000000004 Disconnection Physical Link Event 600 0x0000000000000008 Physical Link Loss Early Warning Event 601 0x0000000000000010 Physical Link Recovery Event 602 0x0000000000000020 Logical Link Complete Event 603 0x0000000000000040 Disconnection Logical Link Complete Event 604 0x0000000000000080 Flow Spec Modify Complete Event 605 0x0000000000000100 Number of Completed Data Blocks Event 606 0x0000000000000200 AMP Start Test Event 607 0x0000000000000400 AMP Test End Event 608 0x0000000000000800 AMP Receiver Report Event 609 0x0000000000001000 Short Range Mode Change Complete Event 610 0x0000000000002000 AMP Status Change Event 611 */ 612 613 /* the event mask page 2 (CLB + CSA4) for BR/EDR controller */ 614 #define HCI_PAGE_2_EVENT_MASK "\x00\x00\x00\x00\x00\x7F\xC0\x00" 615 /* 0x0000000000004000 Triggered Clock Capture Event 616 0x0000000000008000 Sync Train Complete Event 617 0x0000000000010000 Sync Train Received Event 618 0x0000000000020000 Connectionless Broadcast Receive Event 619 0x0000000000040000 Connectionless Broadcast Timeout Event 620 0x0000000000080000 Truncated Page Complete Event 621 0x0000000000100000 Salve Page Response Timeout Event 622 0x0000000000200000 Connectionless Broadcast Channel Map Change Event 623 0x0000000000400000 Inquiry Response Notification Event 624 */ 625 626 /* 627 ** Definitions for packet type masks (BT1.2 and BT2.0 definitions) 628 */ 629 #define HCI_PKT_TYPES_MASK_NO_2_DH1 0x0002 630 #define HCI_PKT_TYPES_MASK_NO_3_DH1 0x0004 631 #define HCI_PKT_TYPES_MASK_DM1 0x0008 632 #define HCI_PKT_TYPES_MASK_DH1 0x0010 633 #define HCI_PKT_TYPES_MASK_HV1 0x0020 634 #define HCI_PKT_TYPES_MASK_HV2 0x0040 635 #define HCI_PKT_TYPES_MASK_HV3 0x0080 636 #define HCI_PKT_TYPES_MASK_NO_2_DH3 0x0100 637 #define HCI_PKT_TYPES_MASK_NO_3_DH3 0x0200 638 #define HCI_PKT_TYPES_MASK_DM3 0x0400 639 #define HCI_PKT_TYPES_MASK_DH3 0x0800 640 #define HCI_PKT_TYPES_MASK_NO_2_DH5 0x1000 641 #define HCI_PKT_TYPES_MASK_NO_3_DH5 0x2000 642 #define HCI_PKT_TYPES_MASK_DM5 0x4000 643 #define HCI_PKT_TYPES_MASK_DH5 0x8000 644 645 /* Packet type should be one of valid but at least one should be specified */ 646 #define HCI_VALID_SCO_PKT_TYPE(t) (((((t) & ~(HCI_PKT_TYPES_MASK_HV1 \ 647 | HCI_PKT_TYPES_MASK_HV2 \ 648 | HCI_PKT_TYPES_MASK_HV3)) == 0)) \ 649 && ((t) != 0)) 650 651 652 653 654 655 /* Packet type should not be invalid and at least one should be specified */ 656 #define HCI_VALID_ACL_PKT_TYPE(t) (((((t) & ~(HCI_PKT_TYPES_MASK_DM1 \ 657 | HCI_PKT_TYPES_MASK_DH1 \ 658 | HCI_PKT_TYPES_MASK_DM3 \ 659 | HCI_PKT_TYPES_MASK_DH3 \ 660 | HCI_PKT_TYPES_MASK_DM5 \ 661 | HCI_PKT_TYPES_MASK_DH5 \ 662 | HCI_PKT_TYPES_MASK_NO_2_DH1 \ 663 | HCI_PKT_TYPES_MASK_NO_3_DH1 \ 664 | HCI_PKT_TYPES_MASK_NO_2_DH3 \ 665 | HCI_PKT_TYPES_MASK_NO_3_DH3 \ 666 | HCI_PKT_TYPES_MASK_NO_2_DH5 \ 667 | HCI_PKT_TYPES_MASK_NO_3_DH5 )) == 0)) \ 668 && (((t) & (HCI_PKT_TYPES_MASK_DM1 \ 669 | HCI_PKT_TYPES_MASK_DH1 \ 670 | HCI_PKT_TYPES_MASK_DM3 \ 671 | HCI_PKT_TYPES_MASK_DH3 \ 672 | HCI_PKT_TYPES_MASK_DM5 \ 673 | HCI_PKT_TYPES_MASK_DH5)) != 0)) 674 675 /* 676 ** Definitions for eSCO packet type masks (BT1.2 and BT2.0 definitions) 677 */ 678 #define HCI_ESCO_PKT_TYPES_MASK_HV1 0x0001 679 #define HCI_ESCO_PKT_TYPES_MASK_HV2 0x0002 680 #define HCI_ESCO_PKT_TYPES_MASK_HV3 0x0004 681 #define HCI_ESCO_PKT_TYPES_MASK_EV3 0x0008 682 #define HCI_ESCO_PKT_TYPES_MASK_EV4 0x0010 683 #define HCI_ESCO_PKT_TYPES_MASK_EV5 0x0020 684 #define HCI_ESCO_PKT_TYPES_MASK_NO_2_EV3 0x0040 685 #define HCI_ESCO_PKT_TYPES_MASK_NO_3_EV3 0x0080 686 #define HCI_ESCO_PKT_TYPES_MASK_NO_2_EV5 0x0100 687 #define HCI_ESCO_PKT_TYPES_MASK_NO_3_EV5 0x0200 688 689 /* Packet type should be one of valid but at least one should be specified for 1.2 */ 690 #define HCI_VALID_ESCO_PKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_EV3 \ 691 | HCI_ESCO_PKT_TYPES_MASK_EV4 \ 692 | HCI_ESCO_PKT_TYPES_MASK_EV5)) == 0)) \ 693 && ((t) != 0))/* Packet type should be one of valid but at least one should be specified */ 694 695 #define HCI_VALID_ESCO_SCOPKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_HV1 \ 696 | HCI_ESCO_PKT_TYPES_MASK_HV2 \ 697 | HCI_ESCO_PKT_TYPES_MASK_HV3)) == 0)) \ 698 && ((t) != 0)) 699 700 #define HCI_VALID_SCO_ALL_PKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_HV1 \ 701 | HCI_ESCO_PKT_TYPES_MASK_HV2 \ 702 | HCI_ESCO_PKT_TYPES_MASK_HV3 \ 703 | HCI_ESCO_PKT_TYPES_MASK_EV3 \ 704 | HCI_ESCO_PKT_TYPES_MASK_EV4 \ 705 | HCI_ESCO_PKT_TYPES_MASK_EV5)) == 0)) \ 706 && ((t) != 0)) 707 708 /* 709 ** Define parameters to allow role switch during create connection 710 */ 711 #define HCI_CR_CONN_NOT_ALLOW_SWITCH 0x00 712 #define HCI_CR_CONN_ALLOW_SWITCH 0x01 713 714 /* 715 ** Hold Mode command destination 716 */ 717 #define HOLD_MODE_DEST_LOCAL_DEVICE 0x00 718 #define HOLD_MODE_DEST_RMT_DEVICE 0x01 719 720 /* 721 ** Definitions for different HCI parameters 722 */ 723 #define HCI_PER_INQ_MIN_MAX_PERIOD 0x0003 724 #define HCI_PER_INQ_MAX_MAX_PERIOD 0xFFFF 725 #define HCI_PER_INQ_MIN_MIN_PERIOD 0x0002 726 #define HCI_PER_INQ_MAX_MIN_PERIOD 0xFFFE 727 728 #define HCI_MAX_INQUIRY_LENGTH 0x30 729 730 #define HCI_MIN_INQ_LAP 0x9E8B00 731 #define HCI_MAX_INQ_LAP 0x9E8B3F 732 733 /* HCI role defenitions */ 734 #define HCI_ROLE_MASTER 0x00 735 #define HCI_ROLE_SLAVE 0x01 736 #define HCI_ROLE_UNKNOWN 0xff 737 738 /* HCI mode defenitions */ 739 #define HCI_MODE_ACTIVE 0x00 740 #define HCI_MODE_HOLD 0x01 741 #define HCI_MODE_SNIFF 0x02 742 #define HCI_MODE_PARK 0x03 743 744 /* HCI Flow Control Mode defenitions */ 745 #define HCI_PACKET_BASED_FC_MODE 0x00 746 #define HCI_BLOCK_BASED_FC_MODE 0x01 747 748 /* Define Packet types as requested by the Host */ 749 #define HCI_ACL_PKT_TYPE_NONE 0x0000 750 #define HCI_ACL_PKT_TYPE_DM1 0x0008 751 #define HCI_ACL_PKT_TYPE_DH1 0x0010 752 #define HCI_ACL_PKT_TYPE_AUX1 0x0200 753 #define HCI_ACL_PKT_TYPE_DM3 0x0400 754 #define HCI_ACL_PKT_TYPE_DH3 0x0800 755 #define HCI_ACL_PKT_TYPE_DM5 0x4000 756 #define HCI_ACL_PKT_TYPE_DH5 0x8000 757 758 /* Define key type in the Master Link Key command */ 759 #define HCI_USE_SEMI_PERMANENT_KEY 0x00 760 #define HCI_USE_TEMPORARY_KEY 0x01 761 762 /* Page scan period modes */ 763 #define HCI_PAGE_SCAN_REP_MODE_R0 0x00 764 #define HCI_PAGE_SCAN_REP_MODE_R1 0x01 765 #define HCI_PAGE_SCAN_REP_MODE_R2 0x02 766 767 /* Define limits for page scan repetition modes */ 768 #define HCI_PAGE_SCAN_R1_LIMIT 0x0800 769 #define HCI_PAGE_SCAN_R2_LIMIT 0x1000 770 771 /* Page scan period modes */ 772 #define HCI_PAGE_SCAN_PER_MODE_P0 0x00 773 #define HCI_PAGE_SCAN_PER_MODE_P1 0x01 774 #define HCI_PAGE_SCAN_PER_MODE_P2 0x02 775 776 /* Page scan modes */ 777 #define HCI_MANDATARY_PAGE_SCAN_MODE 0x00 778 #define HCI_OPTIONAL_PAGE_SCAN_MODE1 0x01 779 #define HCI_OPTIONAL_PAGE_SCAN_MODE2 0x02 780 #define HCI_OPTIONAL_PAGE_SCAN_MODE3 0x03 781 782 /* Page and inquiry scan types */ 783 #define HCI_SCAN_TYPE_STANDARD 0x00 784 #define HCI_SCAN_TYPE_INTERLACED 0x01 /* 1.2 devices or later */ 785 #define HCI_DEF_SCAN_TYPE HCI_SCAN_TYPE_STANDARD 786 787 /* Definitions for quality of service service types */ 788 #define HCI_SERVICE_NO_TRAFFIC 0x00 789 #define HCI_SERVICE_BEST_EFFORT 0x01 790 #define HCI_SERVICE_GUARANTEED 0x02 791 792 #define HCI_QOS_LATENCY_DO_NOT_CARE 0xFFFFFFFF 793 #define HCI_QOS_DELAY_DO_NOT_CARE 0xFFFFFFFF 794 795 /* Definitions for Flow Specification */ 796 #define HCI_FLOW_SPEC_LATENCY_DO_NOT_CARE 0xFFFFFFFF 797 798 /* Definitions for AFH Channel Map */ 799 #define HCI_AFH_CHANNEL_MAP_LEN 10 800 801 /* Definitions for Extended Inquiry Response */ 802 #define HCI_EXT_INQ_RESPONSE_LEN 240 803 #define HCI_EIR_FLAGS_TYPE BT_EIR_FLAGS_TYPE 804 #define HCI_EIR_MORE_16BITS_UUID_TYPE BT_EIR_MORE_16BITS_UUID_TYPE 805 #define HCI_EIR_COMPLETE_16BITS_UUID_TYPE BT_EIR_COMPLETE_16BITS_UUID_TYPE 806 #define HCI_EIR_MORE_32BITS_UUID_TYPE BT_EIR_MORE_32BITS_UUID_TYPE 807 #define HCI_EIR_COMPLETE_32BITS_UUID_TYPE BT_EIR_COMPLETE_32BITS_UUID_TYPE 808 #define HCI_EIR_MORE_128BITS_UUID_TYPE BT_EIR_MORE_128BITS_UUID_TYPE 809 #define HCI_EIR_COMPLETE_128BITS_UUID_TYPE BT_EIR_COMPLETE_128BITS_UUID_TYPE 810 #define HCI_EIR_SHORTENED_LOCAL_NAME_TYPE BT_EIR_SHORTENED_LOCAL_NAME_TYPE 811 #define HCI_EIR_COMPLETE_LOCAL_NAME_TYPE BT_EIR_COMPLETE_LOCAL_NAME_TYPE 812 #define HCI_EIR_TX_POWER_LEVEL_TYPE BT_EIR_TX_POWER_LEVEL_TYPE 813 #define HCI_EIR_MANUFACTURER_SPECIFIC_TYPE BT_EIR_MANUFACTURER_SPECIFIC_TYPE 814 #define HCI_EIR_OOB_BD_ADDR_TYPE BT_EIR_OOB_BD_ADDR_TYPE 815 #define HCI_EIR_OOB_COD_TYPE BT_EIR_OOB_COD_TYPE 816 #define HCI_EIR_OOB_SSP_HASH_C_TYPE BT_EIR_OOB_SSP_HASH_C_TYPE 817 #define HCI_EIR_OOB_SSP_RAND_R_TYPE BT_EIR_OOB_SSP_RAND_R_TYPE 818 #define HCI_EIR_3D_SYNC_TYPE BT_EIR_3D_SYNC_TYPE 819 820 /* Definitions for Write Simple Pairing Mode */ 821 #define HCI_SP_MODE_UNDEFINED 0x00 822 #define HCI_SP_MODE_ENABLED 0x01 823 824 /* Definitions for Write Simple Pairing Debug Mode */ 825 #define HCI_SPD_MODE_DISABLED 0x00 826 #define HCI_SPD_MODE_ENABLED 0x01 827 828 /* Definitions for IO Capability Response/Command */ 829 #define HCI_IO_CAP_DISPLAY_ONLY 0x00 830 #define HCI_IO_CAP_DISPLAY_YESNO 0x01 831 #define HCI_IO_CAP_KEYBOARD_ONLY 0x02 832 #define HCI_IO_CAP_NO_IO 0x03 833 834 #define HCI_OOB_AUTH_DATA_NOT_PRESENT 0x00 835 #define HCI_OOB_REM_AUTH_DATA_PRESENT 0x01 836 837 #define HCI_MITM_PROTECT_NOT_REQUIRED 0x00 838 #define HCI_MITM_PROTECT_REQUIRED 0x01 839 840 841 /* Policy settings status */ 842 #define HCI_DISABLE_ALL_LM_MODES 0x0000 843 #define HCI_ENABLE_MASTER_SLAVE_SWITCH 0x0001 844 #define HCI_ENABLE_HOLD_MODE 0x0002 845 #define HCI_ENABLE_SNIFF_MODE 0x0004 846 #define HCI_ENABLE_PARK_MODE 0x0008 847 848 /* By default allow switch, because host can not allow that */ 849 /* that until he created the connection */ 850 #define HCI_DEFAULT_POLICY_SETTINGS HCI_DISABLE_ALL_LM_MODES 851 852 /* Filters that are sent in set filter command */ 853 #define HCI_FILTER_TYPE_CLEAR_ALL 0x00 854 #define HCI_FILTER_INQUIRY_RESULT 0x01 855 #define HCI_FILTER_CONNECTION_SETUP 0x02 856 857 #define HCI_FILTER_COND_NEW_DEVICE 0x00 858 #define HCI_FILTER_COND_DEVICE_CLASS 0x01 859 #define HCI_FILTER_COND_BD_ADDR 0x02 860 861 #define HCI_DO_NOT_AUTO_ACCEPT_CONNECT 1 862 #define HCI_DO_AUTO_ACCEPT_CONNECT 2 /* role switch disabled */ 863 #define HCI_DO_AUTO_ACCEPT_CONNECT_RS 3 /* role switch enabled (1.1 errata 1115) */ 864 865 /* Auto accept flags */ 866 #define HCI_AUTO_ACCEPT_OFF 0x00 867 #define HCI_AUTO_ACCEPT_ACL_CONNECTIONS 0x01 868 #define HCI_AUTO_ACCEPT_SCO_CONNECTIONS 0x02 869 870 /* PIN type */ 871 #define HCI_PIN_TYPE_VARIABLE 0 872 #define HCI_PIN_TYPE_FIXED 1 873 874 /* Loopback Modes */ 875 #define HCI_LOOPBACK_MODE_DISABLED 0 876 #define HCI_LOOPBACK_MODE_LOCAL 1 877 #define HCI_LOOPBACK_MODE_REMOTE 2 878 879 #define SLOTS_PER_10MS 16 /* 0.625 ms slots in a 10 ms tick */ 880 881 /* Maximum connection accept timeout in 0.625msec */ 882 #define HCI_MAX_CONN_ACCEPT_TOUT 0xB540 /* 29 sec */ 883 #define HCI_DEF_CONN_ACCEPT_TOUT 0x1F40 /* 5 sec */ 884 885 /* Page timeout is used in LC only and LC is counting down slots not using OS */ 886 #define HCI_DEFAULT_PAGE_TOUT 0x2000 /* 5.12 sec (in slots) */ 887 888 /* Scan enable flags */ 889 #define HCI_NO_SCAN_ENABLED 0x00 890 #define HCI_INQUIRY_SCAN_ENABLED 0x01 891 #define HCI_PAGE_SCAN_ENABLED 0x02 892 893 /* Pagescan timer definitions in 0.625 ms */ 894 #define HCI_MIN_PAGESCAN_INTERVAL 0x12 /* 11.25 ms */ 895 #define HCI_MAX_PAGESCAN_INTERVAL 0x1000 /* 2.56 sec */ 896 #define HCI_DEF_PAGESCAN_INTERVAL 0x0800 /* 1.28 sec */ 897 898 /* Parameter for pagescan window is passed to LC and is kept in slots */ 899 #define HCI_MIN_PAGESCAN_WINDOW 0x11 /* 10.625 ms */ 900 #define HCI_MAX_PAGESCAN_WINDOW 0x1000 /* 2.56 sec */ 901 #define HCI_DEF_PAGESCAN_WINDOW 0x12 /* 11.25 ms */ 902 903 /* Inquiryscan timer definitions in 0.625 ms */ 904 #define HCI_MIN_INQUIRYSCAN_INTERVAL 0x12 /* 11.25 ms */ 905 #define HCI_MAX_INQUIRYSCAN_INTERVAL 0x1000 /* 2.56 sec */ 906 #define HCI_DEF_INQUIRYSCAN_INTERVAL 0x1000 /* 2.56 sec */ 907 908 /* Parameter for inquiryscan window is passed to LC and is kept in slots */ 909 #define HCI_MIN_INQUIRYSCAN_WINDOW 0x11 /* 10.625 ms */ 910 #define HCI_MAX_INQUIRYSCAN_WINDOW 0x1000 /* 2.56 sec */ 911 #define HCI_DEF_INQUIRYSCAN_WINDOW 0x12 /* 11.25 ms */ 912 913 /* Encryption modes */ 914 #define HCI_ENCRYPT_MODE_DISABLED 0x00 915 #define HCI_ENCRYPT_MODE_POINT_TO_POINT 0x01 916 #define HCI_ENCRYPT_MODE_ALL 0x02 917 918 /* Voice settings */ 919 #define HCI_INP_CODING_LINEAR 0x0000 /* 0000000000 */ 920 #define HCI_INP_CODING_U_LAW 0x0100 /* 0100000000 */ 921 #define HCI_INP_CODING_A_LAW 0x0200 /* 1000000000 */ 922 #define HCI_INP_CODING_MASK 0x0300 /* 1100000000 */ 923 924 #define HCI_INP_DATA_FMT_1S_COMPLEMENT 0x0000 /* 0000000000 */ 925 #define HCI_INP_DATA_FMT_2S_COMPLEMENT 0x0040 /* 0001000000 */ 926 #define HCI_INP_DATA_FMT_SIGN_MAGNITUDE 0x0080 /* 0010000000 */ 927 #define HCI_INP_DATA_FMT_UNSIGNED 0x00c0 /* 0011000000 */ 928 #define HCI_INP_DATA_FMT_MASK 0x00c0 /* 0011000000 */ 929 930 #define HCI_INP_SAMPLE_SIZE_8BIT 0x0000 /* 0000000000 */ 931 #define HCI_INP_SAMPLE_SIZE_16BIT 0x0020 /* 0000100000 */ 932 #define HCI_INP_SAMPLE_SIZE_MASK 0x0020 /* 0000100000 */ 933 934 #define HCI_INP_LINEAR_PCM_BIT_POS_MASK 0x001c /* 0000011100 */ 935 #define HCI_INP_LINEAR_PCM_BIT_POS_OFFS 2 936 937 #define HCI_AIR_CODING_FORMAT_CVSD 0x0000 /* 0000000000 */ 938 #define HCI_AIR_CODING_FORMAT_U_LAW 0x0001 /* 0000000001 */ 939 #define HCI_AIR_CODING_FORMAT_A_LAW 0x0002 /* 0000000010 */ 940 #define HCI_AIR_CODING_FORMAT_TRANSPNT 0x0003 /* 0000000011 */ 941 #define HCI_AIR_CODING_FORMAT_MASK 0x0003 /* 0000000011 */ 942 943 /* default 0001100000 */ 944 #define HCI_DEFAULT_VOICE_SETTINGS (HCI_INP_CODING_LINEAR \ 945 | HCI_INP_DATA_FMT_2S_COMPLEMENT \ 946 | HCI_INP_SAMPLE_SIZE_16BIT \ 947 | HCI_AIR_CODING_FORMAT_CVSD) 948 949 #define HCI_CVSD_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_CVSD) 950 #define HCI_U_LAW_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_U_LAW) 951 #define HCI_A_LAW_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_A_LAW) 952 #define HCI_TRANSPNT_SUPPORTED(x) (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_TRANSPNT) 953 954 /* Retransmit timer definitions in 0.625 */ 955 #define HCI_MAX_AUTO_FLUSH_TOUT 0x07FF 956 #define HCI_DEFAULT_AUTO_FLUSH_TOUT 0 /* No auto flush */ 957 958 /* Broadcast retransmitions */ 959 #define HCI_DEFAULT_NUM_BCAST_RETRAN 1 960 961 /* Define broadcast data types as passed in the hci data packet */ 962 #define HCI_DATA_POINT_TO_POINT 0x00 963 #define HCI_DATA_ACTIVE_BCAST 0x01 964 #define HCI_DATA_PICONET_BCAST 0x02 965 966 /* Hold mode activity */ 967 #define HCI_MAINTAIN_CUR_POWER_STATE 0x00 968 #define HCI_SUSPEND_PAGE_SCAN 0x01 969 #define HCI_SUSPEND_INQUIRY_SCAN 0x02 970 #define HCI_SUSPEND_PERIODIC_INQUIRIES 0x04 971 972 /* Default Link Supervision timeoout */ 973 #define HCI_DEFAULT_INACT_TOUT 0x7D00 /* BR/EDR (20 seconds) */ 974 #define HCI_DEFAULT_AMP_INACT_TOUT 0x3E80 /* AMP (10 seconds) */ 975 976 /* Read transmit power level parameter */ 977 #define HCI_READ_CURRENT 0x00 978 #define HCI_READ_MAXIMUM 0x01 979 980 /* Link types for connection complete event */ 981 #define HCI_LINK_TYPE_SCO 0x00 982 #define HCI_LINK_TYPE_ACL 0x01 983 #define HCI_LINK_TYPE_ESCO 0x02 984 985 /* Link Key Notification Event (Key Type) definitions */ 986 #define HCI_LKEY_TYPE_COMBINATION 0x00 987 #define HCI_LKEY_TYPE_LOCAL_UNIT 0x01 988 #define HCI_LKEY_TYPE_REMOTE_UNIT 0x02 989 #define HCI_LKEY_TYPE_DEBUG_COMB 0x03 990 #define HCI_LKEY_TYPE_UNAUTH_COMB 0x04 991 #define HCI_LKEY_TYPE_AUTH_COMB 0x05 992 #define HCI_LKEY_TYPE_CHANGED_COMB 0x06 993 994 /* Internal definitions - not used over HCI */ 995 #define HCI_LKEY_TYPE_AMP_WIFI 0x80 996 #define HCI_LKEY_TYPE_AMP_UWB 0x81 997 #define HCI_LKEY_TYPE_UNKNOWN 0xff 998 999 /* Read Local Version HCI Version return values (Command Complete Event) */ 1000 #define HCI_VERSION_1_0B 0x00 1001 #define HCI_VERSION_1_1 0x01 1002 1003 /* Define an invalid value for a handle */ 1004 #define HCI_INVALID_HANDLE 0xFFFF 1005 1006 /* Define max ammount of data in the HCI command */ 1007 #define HCI_COMMAND_SIZE 255 1008 1009 /* Define the preamble length for all HCI Commands. 1010 ** This is 2-bytes for opcode and 1 byte for length 1011 */ 1012 #define HCIC_PREAMBLE_SIZE 3 1013 1014 /* Define the preamble length for all HCI Events 1015 ** This is 1-byte for opcode and 1 byte for length 1016 */ 1017 #define HCIE_PREAMBLE_SIZE 2 1018 #define HCI_SCO_PREAMBLE_SIZE 3 1019 #define HCI_DATA_PREAMBLE_SIZE 4 1020 1021 /* local Bluetooth controller id for AMP HCI */ 1022 #define LOCAL_BR_EDR_CONTROLLER_ID 0 1023 1024 /* controller id types for AMP HCI */ 1025 #define HCI_CONTROLLER_TYPE_BR_EDR 0 1026 #define HCI_CONTROLLER_TYPE_802_11 1 1027 #define HCI_CONTROLLER_TYPE_ECMA 2 1028 #define HCI_MAX_CONTROLLER_TYPES 3 1029 1030 /* ConnectionLess Broadcast */ 1031 #define HCI_CLB_DISABLE 0x00 1032 #define HCI_CLB_ENABLE 0x01 1033 1034 /* ConnectionLess Broadcast Data fragment */ 1035 #define HCI_CLB_FRAGMENT_CONT 0x00 1036 #define HCI_CLB_FRAGMENT_START 0x01 1037 #define HCI_CLB_FRAGMENT_END 0x02 1038 #define HCI_CLB_FRAGMENT_SINGLE 0x03 1039 1040 /* AMP Controller Status codes 1041 */ 1042 #define HCI_AMP_CTRLR_PHYSICALLY_DOWN 0 1043 #define HCI_AMP_CTRLR_USABLE_BY_BT 1 1044 #define HCI_AMP_CTRLR_UNUSABLE_FOR_BT 2 1045 #define HCI_AMP_CTRLR_LOW_CAP_FOR_BT 3 1046 #define HCI_AMP_CTRLR_MED_CAP_FOR_BT 4 1047 #define HCI_AMP_CTRLR_HIGH_CAP_FOR_BT 5 1048 #define HCI_AMP_CTRLR_FULL_CAP_FOR_BT 6 1049 1050 #define HCI_MAX_AMP_STATUS_TYPES 7 1051 1052 1053 /* Define the extended flow specification fields used by AMP */ 1054 typedef struct 1055 { 1056 UINT8 id; 1057 UINT8 stype; 1058 UINT16 max_sdu_size; 1059 UINT32 sdu_inter_time; 1060 UINT32 access_latency; 1061 UINT32 flush_timeout; 1062 } tHCI_EXT_FLOW_SPEC; 1063 1064 1065 /* HCI message type definitions (for H4 messages) */ 1066 #define HCIT_TYPE_COMMAND 1 1067 #define HCIT_TYPE_ACL_DATA 2 1068 #define HCIT_TYPE_SCO_DATA 3 1069 #define HCIT_TYPE_EVENT 4 1070 #define HCIT_TYPE_LM_DIAG 7 1071 #define HCIT_TYPE_NFC 16 1072 1073 #define HCIT_LM_DIAG_LENGTH 63 1074 1075 /* Define values for LMP Test Control parameters 1076 ** Test Scenario, Hopping Mode, Power Control Mode 1077 */ 1078 #define LMP_TESTCTL_TESTSC_PAUSE 0 1079 #define LMP_TESTCTL_TESTSC_TXTEST_0 1 1080 #define LMP_TESTCTL_TESTSC_TXTEST_1 2 1081 #define LMP_TESTCTL_TESTSC_TXTEST_1010 3 1082 #define LMP_TESTCTL_TESTSC_PSRND_BITSEQ 4 1083 #define LMP_TESTCTL_TESTSC_CLOSEDLB_ACL 5 1084 #define LMP_TESTCTL_TESTSC_CLOSEDLB_SCO 6 1085 #define LMP_TESTCTL_TESTSC_ACL_NOWHIT 7 1086 #define LMP_TESTCTL_TESTSC_SCO_NOWHIT 8 1087 #define LMP_TESTCTL_TESTSC_TXTEST_11110000 9 1088 #define LMP_TESTCTL_TESTSC_EXITTESTMODE 255 1089 1090 #define LMP_TESTCTL_HOPMOD_RXTX1FREQ 0 1091 #define LMP_TESTCTL_HOPMOD_HOP_EURUSA 1 1092 #define LMP_TESTCTL_HOPMOD_HOP_JAPAN 2 1093 #define LMP_TESTCTL_HOPMOD_HOP_FRANCE 3 1094 #define LMP_TESTCTL_HOPMOD_HOP_SPAIN 4 1095 #define LMP_TESTCTL_HOPMOD_REDUCED_HOP 5 1096 1097 #define LMP_TESTCTL_POWCTL_FIXEDTX_OP 0 1098 #define LMP_TESTCTL_POWCTL_ADAPTIVE 1 1099 1100 1101 /* 1102 ** Define company IDs (from Bluetooth Assigned Numbers v1.1, section 2.2) 1103 */ 1104 #define LMP_COMPID_ERICSSON 0 1105 #define LMP_COMPID_NOKIA 1 1106 #define LMP_COMPID_INTEL 2 1107 #define LMP_COMPID_IBM 3 1108 #define LMP_COMPID_TOSHIBA 4 1109 #define LMP_COMPID_3COM 5 1110 #define LMP_COMPID_MICROSOFT 6 1111 #define LMP_COMPID_LUCENT 7 1112 #define LMP_COMPID_MOTOROLA 8 1113 #define LMP_COMPID_INFINEON 9 1114 #define LMP_COMPID_CSR 10 1115 #define LMP_COMPID_SILICON_WAVE 11 1116 #define LMP_COMPID_DIGIANSWER 12 1117 #define LMP_COMPID_TEXAS_INSTRUMENTS 13 1118 #define LMP_COMPID_PARTHUS 14 1119 #define LMP_COMPID_BROADCOM 15 1120 #define LMP_COMPID_MITEL_SEMI 16 1121 #define LMP_COMPID_WIDCOMM 17 1122 #define LMP_COMPID_ZEEVO 18 1123 #define LMP_COMPID_ATMEL 19 1124 #define LMP_COMPID_MITSUBISHI 20 1125 #define LMP_COMPID_RTX_TELECOM 21 1126 #define LMP_COMPID_KC_TECH 22 1127 #define LMP_COMPID_NEWLOGIC 23 1128 #define LMP_COMPID_TRANSILICA 24 1129 #define LMP_COMPID_ROHDE_SCHWARZ 25 1130 #define LMP_COMPID_TTPCOM 26 1131 #define LMP_COMPID_SIGNIA 27 1132 #define LMP_COMPID_CONEXANT 28 1133 #define LMP_COMPID_QUALCOMM 29 1134 #define LMP_COMPID_INVENTEL 30 1135 #define LMP_COMPID_AVM 31 1136 #define LMP_COMPID_BANDSPEED 32 1137 #define LMP_COMPID_MANSELLA 33 1138 #define LMP_COMPID_NEC_CORP 34 1139 #define LMP_COMPID_WAVEPLUS 35 1140 #define LMP_COMPID_ALCATEL 36 1141 #define LMP_COMPID_PHILIPS 37 1142 #define LMP_COMPID_C_TECHNOLOGIES 38 1143 #define LMP_COMPID_OPEN_INTERFACE 39 1144 #define LMP_COMPID_RF_MICRO 40 1145 #define LMP_COMPID_HITACHI 41 1146 #define LMP_COMPID_SYMBOL_TECH 42 1147 #define LMP_COMPID_TENOVIS 43 1148 #define LMP_COMPID_MACRONIX 44 1149 #define LMP_COMPID_GCT_SEMI 45 1150 #define LMP_COMPID_NORWOOD_SYSTEMS 46 1151 #define LMP_COMPID_MEWTEL_TECH 47 1152 #define LMP_COMPID_STM 48 1153 #define LMP_COMPID_SYNOPSYS 49 1154 #define LMP_COMPID_RED_M_LTD 50 1155 #define LMP_COMPID_COMMIL_LTD 51 1156 #define LMP_COMPID_CATC 52 1157 #define LMP_COMPID_ECLIPSE 53 1158 #define LMP_COMPID_RENESAS_TECH 54 1159 #define LMP_COMPID_MOBILIAN_CORP 55 1160 #define LMP_COMPID_TERAX 56 1161 #define LMP_COMPID_ISSC 57 1162 #define LMP_COMPID_MATSUSHITA 58 1163 #define LMP_COMPID_GENNUM_CORP 59 1164 #define LMP_COMPID_RESEARCH_IN_MOTION 60 1165 #define LMP_COMPID_IPEXTREME 61 1166 #define LMP_COMPID_SYSTEMS_AND_CHIPS 62 1167 #define LMP_COMPID_BLUETOOTH_SIG 63 1168 #define LMP_COMPID_SEIKO_EPSON_CORP 64 1169 #define LMP_COMPID_ISS_TAIWAN 65 1170 #define LMP_COMPID_CONWISE_TECHNOLOGIES 66 1171 #define LMP_COMPID_PARROT_SA 67 1172 #define LMP_COMPID_SOCKET_COMM 68 1173 #define LMP_COMPID_ALTHEROS 69 1174 #define LMP_COMPID_MEDIATEK 70 1175 #define LMP_COMPID_BLUEGIGA 71 1176 #define LMP_COMPID_MARVELL 72 1177 #define LMP_COMPID_3DSP_CORP 73 1178 #define LMP_COMPID_ACCEL_SEMICONDUCTOR 74 1179 #define LMP_COMPID_CONTINENTAL_AUTO 75 1180 #define LMP_COMPID_APPLE 76 1181 #define LMP_COMPID_STACCATO 77 1182 #define LMP_COMPID_AVAGO_TECHNOLOGIES 78 1183 #define LMP_COMPID_APT_LTD 79 1184 #define LMP_COMPID_SIRF_TECHNOLOGY 80 1185 #define LMP_COMPID_TZERO_TECHNOLOGY 81 1186 #define LMP_COMPID_J_AND_M_CORP 82 1187 #define LMP_COMPID_FREE_2_MOVE 83 1188 #define LMP_COMPID_3DIJOY_CORP 84 1189 #define LMP_COMPID_PLANTRONICS 85 1190 #define LMP_COMPID_SONY_ERICSSON_MOBILE 86 1191 #define LMP_COMPID_HARMON_INTL_IND 87 1192 #define LMP_COMPID_VIZIO 88 1193 #define LMP_COMPID_NORDIC SEMI 89 1194 #define LMP_COMPID_EM_MICRO 90 1195 #define LMP_COMPID_RALINK_TECH 91 1196 #define LMP_COMPID_BELKIN_INC 92 1197 #define LMP_COMPID_REALTEK_SEMI 93 1198 #define LMP_COMPID_STONESTREET_ONE 94 1199 #define LMP_COMPID_WICENTRIC 95 1200 #define LMP_COMPID_RIVIERAWAVES 96 1201 #define LMP_COMPID_RDA_MICRO 97 1202 #define LMP_COMPID_GIBSON_GUITARS 98 1203 #define LMP_COMPID_MICOMMAND_INC 99 1204 #define LMP_COMPID_BAND_XI 100 1205 #define LMP_COMPID_HP_COMPANY 101 1206 #define LMP_COMPID_9SOLUTIONS_OY 102 1207 #define LMP_COMPID_GN_NETCOM 103 1208 #define LMP_COMPID_GENERAL_MOTORS 104 1209 #define LMP_COMPID_AD_ENGINEERING 105 1210 #define LMP_COMPID_MINDTREE_LTD 106 1211 #define LMP_COMPID_POLAR_ELECTRO 107 1212 #define LMP_COMPID_BEAUTIFUL_ENTERPRISE 108 1213 #define LMP_COMPID_BRIARTEK 109 1214 #define LMP_COMPID_SUMMIT_DATA_COMM 110 1215 #define LMP_COMPID_SOUND_ID 111 1216 #define LMP_COMPID_MONSTER LLC 112 1217 #define LMP_COMPID_CONNECTBLU 113 1218 1219 #define LMP_COMPID_SHANGHAI_SSE 114 1220 #define LMP_COMPID_GROUP_SENSE 115 1221 #define LMP_COMPID_ZOMM 116 1222 #define LMP_COMPID_SAMSUNG 117 1223 #define LMP_COMPID_CREATIVE_TECH 118 1224 #define LMP_COMPID_LAIRD_TECH 119 1225 #define LMP_COMPID_NIKE 120 1226 #define LMP_COMPID_LESSWIRE 121 1227 #define LMP_COMPID_MSTAR_SEMI 122 1228 #define LMP_COMPID_HANLYNN_TECH 123 1229 #define LMP_COMPID_AR_CAMBRIDGE 124 1230 #define LMP_COMPID_SEERS_TECH 125 1231 #define LMP_COMPID_SPORTS_TRACKING 126 1232 #define LMP_COMPID_AUTONET_MOBILE 127 1233 #define LMP_COMPID_DELORME_PUBLISH 128 1234 #define LMP_COMPID_WUXI_VIMICRO 129 1235 #define LMP_COMPID_SENNHEISER 130 1236 #define LMP_COMPID_TIME_KEEPING_SYS 131 1237 #define LMP_COMPID_LUDUS_HELSINKI 132 1238 #define LMP_COMPID_BLUE_RADIOS 133 1239 #define LMP_COMPID_EQUINUX 134 1240 #define LMP_COMPID_GARMIN_INTL 135 1241 #define LMP_COMPID_ECOTEST 136 1242 #define LMP_COMPID_GN_RESOUND 137 1243 #define LMP_COMPID_JAWBONE 138 1244 #define LMP_COMPID_TOPCON_POSITIONING 139 1245 #define LMP_COMPID_QUALCOMM_LABS 140 1246 #define LMP_COMPID_ZSCAN_SOFTWARE 141 1247 #define LMP_COMPID_QUINTIC 142 1248 #define LMP_COMPID_STOLLMAN_EV 143 1249 #define LMP_COMPID_FUNAI_ELECTRONIC 144 1250 #define LMP_COMPID_ADV_PANMOBILE 145 1251 #define LMP_COMPID_THINK_OPTICS 146 1252 #define LMP_COMPID_UNIVERSAL_ELEC 147 1253 #define LMP_COMPID_AIROHA_TECH 148 1254 #define LMP_COMPID_MAX_ID 149 /* this is a place holder */ 1255 #define LMP_COMPID_INTERNAL 65535 1256 1257 #define MAX_LMP_COMPID (LMP_COMPID_MAX_ID) 1258 /* 1259 ** Define the packet types in the packet header, and a couple extra 1260 */ 1261 #define PKT_TYPE_NULL 0x00 1262 #define PKT_TYPE_POLL 0x01 1263 #define PKT_TYPE_FHS 0x02 1264 #define PKT_TYPE_DM1 0x03 1265 1266 #define PKT_TYPE_DH1 0x04 1267 #define PKT_TYPE_HV1 0x05 1268 #define PKT_TYPE_HV2 0x06 1269 #define PKT_TYPE_HV3 0x07 1270 #define PKT_TYPE_DV 0x08 1271 #define PKT_TYPE_AUX1 0x09 1272 1273 #define PKT_TYPE_DM3 0x0a 1274 #define PKT_TYPE_DH3 0x0b 1275 1276 #define PKT_TYPE_DM5 0x0e 1277 #define PKT_TYPE_DH5 0x0f 1278 1279 1280 #define PKT_TYPE_ID 0x10 /* Internally used packet types */ 1281 #define PKT_TYPE_BAD 0x11 1282 #define PKT_TYPE_NONE 0x12 1283 1284 /* 1285 ** Define packet size 1286 */ 1287 #define HCI_DM1_PACKET_SIZE 17 1288 #define HCI_DH1_PACKET_SIZE 27 1289 #define HCI_DM3_PACKET_SIZE 121 1290 #define HCI_DH3_PACKET_SIZE 183 1291 #define HCI_DM5_PACKET_SIZE 224 1292 #define HCI_DH5_PACKET_SIZE 339 1293 #define HCI_AUX1_PACKET_SIZE 29 1294 #define HCI_HV1_PACKET_SIZE 10 1295 #define HCI_HV2_PACKET_SIZE 20 1296 #define HCI_HV3_PACKET_SIZE 30 1297 #define HCI_DV_PACKET_SIZE 9 1298 #define HCI_EDR2_DH1_PACKET_SIZE 54 1299 #define HCI_EDR2_DH3_PACKET_SIZE 367 1300 #define HCI_EDR2_DH5_PACKET_SIZE 679 1301 #define HCI_EDR3_DH1_PACKET_SIZE 83 1302 #define HCI_EDR3_DH3_PACKET_SIZE 552 1303 #define HCI_EDR3_DH5_PACKET_SIZE 1021 1304 1305 /* Feature Pages */ 1306 #define HCI_EXT_FEATURES_PAGE_0 0 /* Extended Feature Page 0 (regular features) */ 1307 #define HCI_EXT_FEATURES_PAGE_1 1 /* Extended Feature Page 1 */ 1308 #define HCI_EXT_FEATURES_PAGE_2 2 /* Extended Feature Page 2 */ 1309 #define HCI_EXT_FEATURES_PAGE_MAX HCI_EXT_FEATURES_PAGE_2 1310 1311 #define HCI_FEATURE_BYTES_PER_PAGE 8 1312 1313 #define HCI_FEATURES_KNOWN(x) ((x[0] | x[1] | x[2] | x[3] | x[4] | x[5] | x[6] | x[7]) != 0) 1314 1315 /* 1316 ** LMP features encoding - page 0 1317 */ 1318 #define HCI_FEATURE_3_SLOT_PACKETS_MASK 0x01 1319 #define HCI_FEATURE_3_SLOT_PACKETS_OFF 0 1320 #define HCI_3_SLOT_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_PACKETS_OFF] & HCI_FEATURE_3_SLOT_PACKETS_MASK) 1321 1322 #define HCI_FEATURE_5_SLOT_PACKETS_MASK 0x02 1323 #define HCI_FEATURE_5_SLOT_PACKETS_OFF 0 1324 #define HCI_5_SLOT_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_5_SLOT_PACKETS_OFF] & HCI_FEATURE_5_SLOT_PACKETS_MASK) 1325 1326 #define HCI_FEATURE_ENCRYPTION_MASK 0x04 1327 #define HCI_FEATURE_ENCRYPTION_OFF 0 1328 #define HCI_ENCRYPTION_SUPPORTED(x) ((x)[HCI_FEATURE_ENCRYPTION_OFF] & HCI_FEATURE_ENCRYPTION_MASK) 1329 1330 #define HCI_FEATURE_SLOT_OFFSET_MASK 0x08 1331 #define HCI_FEATURE_SLOT_OFFSET_OFF 0 1332 #define HCI_SLOT_OFFSET_SUPPORTED(x) ((x)[HCI_FEATURE_SLOT_OFFSET_OFF] & HCI_FEATURE_SLOT_OFFSET_MASK) 1333 1334 #define HCI_FEATURE_TIMING_ACC_MASK 0x10 1335 #define HCI_FEATURE_TIMING_ACC_OFF 0 1336 #define HCI_TIMING_ACC_SUPPORTED(x) ((x)[HCI_FEATURE_TIMING_ACC_OFF] & HCI_FEATURE_TIMING_ACC_MASK) 1337 1338 #define HCI_FEATURE_SWITCH_MASK 0x20 1339 #define HCI_FEATURE_SWITCH_OFF 0 1340 #define HCI_SWITCH_SUPPORTED(x) ((x)[HCI_FEATURE_SWITCH_OFF] & HCI_FEATURE_SWITCH_MASK) 1341 1342 #define HCI_FEATURE_HOLD_MODE_MASK 0x40 1343 #define HCI_FEATURE_HOLD_MODE_OFF 0 1344 #define HCI_HOLD_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_HOLD_MODE_OFF] & HCI_FEATURE_HOLD_MODE_MASK) 1345 1346 #define HCI_FEATURE_SNIFF_MODE_MASK 0x80 1347 #define HCI_FEATURE_SNIFF_MODE_OFF 0 1348 #define HCI_SNIFF_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_SNIFF_MODE_OFF] & HCI_FEATURE_SNIFF_MODE_MASK) 1349 1350 #define HCI_FEATURE_PARK_MODE_MASK 0x01 1351 #define HCI_FEATURE_PARK_MODE_OFF 1 1352 #define HCI_PARK_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_PARK_MODE_OFF] & HCI_FEATURE_PARK_MODE_MASK) 1353 1354 #define HCI_FEATURE_RSSI_MASK 0x02 1355 #define HCI_FEATURE_RSSI_OFF 1 1356 #define HCI_RSSI_SUPPORTED(x) ((x)[HCI_FEATURE_RSSI_OFF] & HCI_FEATURE_RSSI_MASK) 1357 1358 #define HCI_FEATURE_CQM_DATA_RATE_MASK 0x04 1359 #define HCI_FEATURE_CQM_DATA_RATE_OFF 1 1360 #define HCI_CQM_DATA_RATE_SUPPORTED(x) ((x)[HCI_FEATURE_CQM_DATA_RATE_OFF] & HCI_FEATURE_CQM_DATA_RATE_MASK) 1361 1362 #define HCI_FEATURE_SCO_LINK_MASK 0x08 1363 #define HCI_FEATURE_SCO_LINK_OFF 1 1364 #define HCI_SCO_LINK_SUPPORTED(x) ((x)[HCI_FEATURE_SCO_LINK_OFF] & HCI_FEATURE_SCO_LINK_MASK) 1365 1366 #define HCI_FEATURE_HV2_PACKETS_MASK 0x10 1367 #define HCI_FEATURE_HV2_PACKETS_OFF 1 1368 #define HCI_HV2_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_HV2_PACKETS_OFF] & HCI_FEATURE_HV2_PACKETS_MASK) 1369 1370 #define HCI_FEATURE_HV3_PACKETS_MASK 0x20 1371 #define HCI_FEATURE_HV3_PACKETS_OFF 1 1372 #define HCI_HV3_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_HV3_PACKETS_OFF] & HCI_FEATURE_HV3_PACKETS_MASK) 1373 1374 #define HCI_FEATURE_U_LAW_MASK 0x40 1375 #define HCI_FEATURE_U_LAW_OFF 1 1376 #define HCI_LMP_U_LAW_SUPPORTED(x) ((x)[HCI_FEATURE_U_LAW_OFF] & HCI_FEATURE_U_LAW_MASK) 1377 1378 #define HCI_FEATURE_A_LAW_MASK 0x80 1379 #define HCI_FEATURE_A_LAW_OFF 1 1380 #define HCI_LMP_A_LAW_SUPPORTED(x) ((x)[HCI_FEATURE_A_LAW_OFF] & HCI_FEATURE_A_LAW_MASK) 1381 1382 #define HCI_FEATURE_CVSD_MASK 0x01 1383 #define HCI_FEATURE_CVSD_OFF 2 1384 #define HCI_LMP_CVSD_SUPPORTED(x) ((x)[HCI_FEATURE_CVSD_OFF] & HCI_FEATURE_CVSD_MASK) 1385 1386 #define HCI_FEATURE_PAGING_SCHEME_MASK 0x02 1387 #define HCI_FEATURE_PAGING_SCHEME_OFF 2 1388 #define HCI_PAGING_SCHEME_SUPPORTED(x) ((x)[HCI_FEATURE_PAGING_SCHEME_OFF] & HCI_FEATURE_PAGING_SCHEME_MASK) 1389 1390 #define HCI_FEATURE_POWER_CTRL_MASK 0x04 1391 #define HCI_FEATURE_POWER_CTRL_OFF 2 1392 #define HCI_POWER_CTRL_SUPPORTED(x) ((x)[HCI_FEATURE_POWER_CTRL_OFF] & HCI_FEATURE_POWER_CTRL_MASK) 1393 1394 #define HCI_FEATURE_TRANSPNT_MASK 0x08 1395 #define HCI_FEATURE_TRANSPNT_OFF 2 1396 #define HCI_LMP_TRANSPNT_SUPPORTED(x) ((x)[HCI_FEATURE_TRANSPNT_OFF] & HCI_FEATURE_TRANSPNT_MASK) 1397 1398 #define HCI_FEATURE_FLOW_CTRL_LAG_MASK 0x70 1399 #define HCI_FEATURE_FLOW_CTRL_LAG_OFF 2 1400 #define HCI_FLOW_CTRL_LAG_VALUE(x) (((x)[HCI_FEATURE_FLOW_CTRL_LAG_OFF] & HCI_FEATURE_FLOW_CTRL_LAG_MASK) >> 4) 1401 1402 #define HCI_FEATURE_BROADCAST_ENC_MASK 0x80 1403 #define HCI_FEATURE_BROADCAST_ENC_OFF 2 1404 #define HCI_LMP_BCAST_ENC_SUPPORTED(x) ((x)[HCI_FEATURE_BROADCAST_ENC_OFF] & HCI_FEATURE_BROADCAST_ENC_MASK) 1405 1406 #define HCI_FEATURE_SCATTER_MODE_MASK 0x01 1407 #define HCI_FEATURE_SCATTER_MODE_OFF 3 1408 #define HCI_LMP_SCATTER_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_SCATTER_MODE_OFF] & HCI_FEATURE_SCATTER_MODE_MASK) 1409 1410 #define HCI_FEATURE_EDR_ACL_2MPS_MASK 0x02 1411 #define HCI_FEATURE_EDR_ACL_2MPS_OFF 3 1412 #define HCI_EDR_ACL_2MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ACL_2MPS_OFF] & HCI_FEATURE_EDR_ACL_2MPS_MASK) 1413 1414 #define HCI_FEATURE_EDR_ACL_3MPS_MASK 0x04 1415 #define HCI_FEATURE_EDR_ACL_3MPS_OFF 3 1416 #define HCI_EDR_ACL_3MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ACL_3MPS_OFF] & HCI_FEATURE_EDR_ACL_3MPS_MASK) 1417 1418 #define HCI_FEATURE_ENHANCED_INQ_MASK 0x08 1419 #define HCI_FEATURE_ENHANCED_INQ_OFF 3 1420 #define HCI_ENHANCED_INQ_SUPPORTED(x) ((x)[HCI_FEATURE_ENHANCED_INQ_OFF] & HCI_FEATURE_ENHANCED_INQ_MASK) 1421 1422 #define HCI_FEATURE_INTERLACED_INQ_SCAN_MASK 0x10 1423 #define HCI_FEATURE_INTERLACED_INQ_SCAN_OFF 3 1424 #define HCI_LMP_INTERLACED_INQ_SCAN_SUPPORTED(x) ((x)[HCI_FEATURE_INTERLACED_INQ_SCAN_OFF] & HCI_FEATURE_INTERLACED_INQ_SCAN_MASK) 1425 1426 #define HCI_FEATURE_INTERLACED_PAGE_SCAN_MASK 0x20 1427 #define HCI_FEATURE_INTERLACED_PAGE_SCAN_OFF 3 1428 #define HCI_LMP_INTERLACED_PAGE_SCAN_SUPPORTED(x) ((x)[HCI_FEATURE_INTERLACED_PAGE_SCAN_OFF] & HCI_FEATURE_INTERLACED_PAGE_SCAN_MASK) 1429 1430 #define HCI_FEATURE_INQ_RSSI_MASK 0x40 1431 #define HCI_FEATURE_INQ_RSSI_OFF 3 1432 #define HCI_LMP_INQ_RSSI_SUPPORTED(x) ((x)[HCI_FEATURE_INQ_RSSI_OFF] & HCI_FEATURE_INQ_RSSI_MASK) 1433 1434 #define HCI_FEATURE_ESCO_EV3_MASK 0x80 1435 #define HCI_FEATURE_ESCO_EV3_OFF 3 1436 #define HCI_ESCO_EV3_SUPPORTED(x) ((x)[HCI_FEATURE_ESCO_EV3_OFF] & HCI_FEATURE_ESCO_EV3_MASK) 1437 1438 #define HCI_FEATURE_ESCO_EV4_MASK 0x01 1439 #define HCI_FEATURE_ESCO_EV4_OFF 4 1440 #define HCI_ESCO_EV4_SUPPORTED(x) ((x)[HCI_FEATURE_ESCO_EV4_OFF] & HCI_FEATURE_ESCO_EV4_MASK) 1441 1442 #define HCI_FEATURE_ESCO_EV5_MASK 0x02 1443 #define HCI_FEATURE_ESCO_EV5_OFF 4 1444 #define HCI_ESCO_EV5_SUPPORTED(x) ((x)[HCI_FEATURE_ESCO_EV5_OFF] & HCI_FEATURE_ESCO_EV5_MASK) 1445 1446 #define HCI_FEATURE_ABSENCE_MASKS_MASK 0x04 1447 #define HCI_FEATURE_ABSENCE_MASKS_OFF 4 1448 #define HCI_LMP_ABSENCE_MASKS_SUPPORTED(x) ((x)[HCI_FEATURE_ABSENCE_MASKS_OFF] & HCI_FEATURE_ABSENCE_MASKS_MASK) 1449 1450 #define HCI_FEATURE_AFH_CAP_SLAVE_MASK 0x08 1451 #define HCI_FEATURE_AFH_CAP_SLAVE_OFF 4 1452 #define HCI_LMP_AFH_CAP_SLAVE_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CAP_SLAVE_OFF] & HCI_FEATURE_AFH_CAP_SLAVE_MASK) 1453 1454 #define HCI_FEATURE_AFH_CLASS_SLAVE_MASK 0x10 1455 #define HCI_FEATURE_AFH_CLASS_SLAVE_OFF 4 1456 #define HCI_LMP_AFH_CLASS_SLAVE_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CLASS_SLAVE_OFF] & HCI_FEATURE_AFH_CLASS_SLAVE_MASK) 1457 1458 #if 1 1459 #define HCI_FEATURE_BREDR_NOT_SPT_MASK 0x20 1460 #define HCI_FEATURE_BREDR_NOT_SPT_OFF 4 1461 #define HCI_BREDR_NOT_SPT_SUPPORTED(x) ((x)[HCI_FEATURE_BREDR_NOT_SPT_OFF] & HCI_FEATURE_BREDR_NOT_SPT_MASK) 1462 1463 #define HCI_FEATURE_LE_SPT_MASK 0x40 1464 #define HCI_FEATURE_LE_SPT_OFF 4 1465 #define HCI_LE_SPT_SUPPORTED(x) ((x)[HCI_FEATURE_LE_SPT_OFF] & HCI_FEATURE_LE_SPT_MASK) 1466 #else 1467 1468 #define HCI_FEATURE_ALIAS_AUTH_MASK 0x20 1469 #define HCI_FEATURE_ALIAS_AUTH_OFF 4 1470 #define HCI_LMP_ALIAS_AUTH_SUPPORTED(x) ((x)[HCI_FEATURE_ALIAS_AUTH_OFF] & HCI_FEATURE_ALIAS_AUTH_MASK) 1471 1472 #define HCI_FEATURE_ANON_MODE_MASK 0x40 1473 #define HCI_FEATURE_ANON_MODE_OFF 4 1474 #define HCI_LMP_ANON_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_ANON_MODE_OFF] & HCI_FEATURE_ANON_MODE_MASK) 1475 #endif 1476 1477 #define HCI_FEATURE_3_SLOT_EDR_ACL_MASK 0x80 1478 #define HCI_FEATURE_3_SLOT_EDR_ACL_OFF 4 1479 #define HCI_3_SLOT_EDR_ACL_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_EDR_ACL_OFF] & HCI_FEATURE_3_SLOT_EDR_ACL_MASK) 1480 1481 #define HCI_FEATURE_5_SLOT_EDR_ACL_MASK 0x01 1482 #define HCI_FEATURE_5_SLOT_EDR_ACL_OFF 5 1483 #define HCI_5_SLOT_EDR_ACL_SUPPORTED(x) ((x)[HCI_FEATURE_5_SLOT_EDR_ACL_OFF] & HCI_FEATURE_5_SLOT_EDR_ACL_MASK) 1484 1485 #define HCI_FEATURE_SNIFF_SUB_RATE_MASK 0x02 1486 #define HCI_FEATURE_SNIFF_SUB_RATE_OFF 5 1487 #define HCI_SNIFF_SUB_RATE_SUPPORTED(x) ((x)[HCI_FEATURE_SNIFF_SUB_RATE_OFF] & HCI_FEATURE_SNIFF_SUB_RATE_MASK) 1488 1489 #define HCI_FEATURE_ATOMIC_ENCRYPT_MASK 0x04 1490 #define HCI_FEATURE_ATOMIC_ENCRYPT_OFF 5 1491 #define HCI_ATOMIC_ENCRYPT_SUPPORTED(x) ((x)[HCI_FEATURE_ATOMIC_ENCRYPT_OFF] & HCI_FEATURE_ATOMIC_ENCRYPT_MASK) 1492 1493 #define HCI_FEATURE_AFH_CAP_MASTR_MASK 0x08 1494 #define HCI_FEATURE_AFH_CAP_MASTR_OFF 5 1495 #define HCI_LMP_AFH_CAP_MASTR_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CAP_MASTR_OFF] & HCI_FEATURE_AFH_CAP_MASTR_MASK) 1496 1497 #define HCI_FEATURE_AFH_CLASS_MASTR_MASK 0x10 1498 #define HCI_FEATURE_AFH_CLASS_MASTR_OFF 5 1499 #define HCI_LMP_AFH_CLASS_MASTR_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CLASS_MASTR_OFF] & HCI_FEATURE_AFH_CLASS_MASTR_MASK) 1500 1501 #define HCI_FEATURE_EDR_ESCO_2MPS_MASK 0x20 1502 #define HCI_FEATURE_EDR_ESCO_2MPS_OFF 5 1503 #define HCI_EDR_ESCO_2MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ESCO_2MPS_OFF] & HCI_FEATURE_EDR_ESCO_2MPS_MASK) 1504 1505 #define HCI_FEATURE_EDR_ESCO_3MPS_MASK 0x40 1506 #define HCI_FEATURE_EDR_ESCO_3MPS_OFF 5 1507 #define HCI_EDR_ESCO_3MPS_SUPPORTED(x) ((x)[HCI_FEATURE_EDR_ESCO_3MPS_OFF] & HCI_FEATURE_EDR_ESCO_3MPS_MASK) 1508 1509 #define HCI_FEATURE_3_SLOT_EDR_ESCO_MASK 0x80 1510 #define HCI_FEATURE_3_SLOT_EDR_ESCO_OFF 5 1511 #define HCI_3_SLOT_EDR_ESCO_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_EDR_ESCO_OFF] & HCI_FEATURE_3_SLOT_EDR_ESCO_MASK) 1512 1513 #define HCI_FEATURE_EXT_INQ_RSP_MASK 0x01 1514 #define HCI_FEATURE_EXT_INQ_RSP_OFF 6 1515 #define HCI_EXT_INQ_RSP_SUPPORTED(x) ((x)[HCI_FEATURE_EXT_INQ_RSP_OFF] & HCI_FEATURE_EXT_INQ_RSP_MASK) 1516 1517 #if 1 /* TOKYO spec definition */ 1518 #define HCI_FEATURE_SIMUL_LE_BREDR_MASK 0x02 1519 #define HCI_FEATURE_SIMUL_LE_BREDR_OFF 6 1520 #define HCI_SIMUL_LE_BREDR_SUPPORTED(x) ((x)[HCI_FEATURE_SIMUL_LE_BREDR_OFF] & HCI_FEATURE_SIMUL_LE_BREDR_MASK) 1521 1522 #else 1523 #define HCI_FEATURE_ANUM_PIN_AWARE_MASK 0x02 1524 #define HCI_FEATURE_ANUM_PIN_AWARE_OFF 6 1525 #define HCI_ANUM_PIN_AWARE_SUPPORTED(x) ((x)[HCI_FEATURE_ANUM_PIN_AWARE_OFF] & HCI_FEATURE_ANUM_PIN_AWARE_MASK) 1526 #endif 1527 1528 #define HCI_FEATURE_ANUM_PIN_CAP_MASK 0x04 1529 #define HCI_FEATURE_ANUM_PIN_CAP_OFF 6 1530 #define HCI_ANUM_PIN_CAP_SUPPORTED(x) ((x)[HCI_FEATURE_ANUM_PIN_CAP_OFF] & HCI_FEATURE_ANUM_PIN_CAP_MASK) 1531 1532 #define HCI_FEATURE_SIMPLE_PAIRING_MASK 0x08 1533 #define HCI_FEATURE_SIMPLE_PAIRING_OFF 6 1534 #define HCI_SIMPLE_PAIRING_SUPPORTED(x) ((x)[HCI_FEATURE_SIMPLE_PAIRING_OFF] & HCI_FEATURE_SIMPLE_PAIRING_MASK) 1535 1536 #define HCI_FEATURE_ENCAP_PDU_MASK 0x10 1537 #define HCI_FEATURE_ENCAP_PDU_OFF 6 1538 #define HCI_ENCAP_PDU_SUPPORTED(x) ((x)[HCI_FEATURE_ENCAP_PDU_OFF] & HCI_FEATURE_ENCAP_PDU_MASK) 1539 1540 #define HCI_FEATURE_ERROR_DATA_MASK 0x20 1541 #define HCI_FEATURE_ERROR_DATA_OFF 6 1542 #define HCI_ERROR_DATA_SUPPORTED(x) ((x)[HCI_FEATURE_ERROR_DATA_OFF] & HCI_FEATURE_ERROR_DATA_MASK) 1543 1544 #define HCI_FEATURE_NON_FLUSHABLE_PB_MASK 0x40 1545 #define HCI_FEATURE_NON_FLUSHABLE_PB_OFF 6 1546 #define HCI_NON_FLUSHABLE_PB_SUPPORTED(x) ((x)[HCI_FEATURE_NON_FLUSHABLE_PB_OFF] & HCI_FEATURE_NON_FLUSHABLE_PB_MASK) 1547 1548 #define HCI_FEATURE_LINK_SUP_TO_EVT_MASK 0x01 1549 #define HCI_FEATURE_LINK_SUP_TO_EVT_OFF 7 1550 #define HCI_LINK_SUP_TO_EVT_SUPPORTED(x) ((x)[HCI_FEATURE_LINK_SUP_TO_EVT_OFF] & HCI_FEATURE_LINK_SUP_TO_EVT_MASK) 1551 1552 #define HCI_FEATURE_INQ_RESP_TX_MASK 0x02 1553 #define HCI_FEATURE_INQ_RESP_TX_OFF 7 1554 #define HCI_INQ_RESP_TX_SUPPORTED(x) ((x)[HCI_FEATURE_INQ_RESP_TX_OFF] & HCI_FEATURE_INQ_RESP_TX_MASK) 1555 1556 #define HCI_FEATURE_EXTENDED_MASK 0x80 1557 #define HCI_FEATURE_EXTENDED_OFF 7 1558 #define HCI_LMP_EXTENDED_SUPPORTED(x) ((x)[HCI_FEATURE_EXTENDED_OFF] & HCI_FEATURE_EXTENDED_MASK) 1559 1560 /* 1561 ** LMP features encoding - page 1 1562 */ 1563 #define HCI_EXT_FEATURE_SSP_HOST_MASK 0x01 1564 #define HCI_EXT_FEATURE_SSP_HOST_OFF 0 1565 #define HCI_SSP_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SSP_HOST_OFF] & HCI_EXT_FEATURE_SSP_HOST_MASK) 1566 1567 #define HCI_EXT_FEATURE_LE_HOST_MASK 0x02 1568 #define HCI_EXT_FEATURE_LE_HOST_OFF 0 1569 #define HCI_LE_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_LE_HOST_OFF] & HCI_EXT_FEATURE_LE_HOST_MASK) 1570 1571 #define HCI_EXT_FEATURE_SIMUL_DUMO_HOST_MASK 0x04 1572 #define HCI_EXT_FEATURE_SIMUL_DUMO_HOST_OFF 0 1573 #define HCI_SIMUL_DUMO_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SIMUL_DUMO_HOST_OFF] & HCI_EXT_FEATURE_SIMUL_DUMO_HOST_MASK) 1574 1575 /* 1576 ** LMP features encoding - page 2 1577 */ 1578 #define HCI_EXT_FEATURE_CSB_MASTER_MASK 0x01 1579 #define HCI_EXT_FEATURE_CSB_MASTER_OFF 0 1580 #define HCI_CSB_MASTER_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_CSB_MASTER_OFF] & HCI_EXT_FEATURE_CSB_MASTER_MASK) 1581 1582 #define HCI_EXT_FEATURE_CSB_SLAVE_MASK 0x02 1583 #define HCI_EXT_FEATURE_CSB_SLAVE_OFF 0 1584 #define HCI_CSB_SLAVE_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_CSB_SLAVE_OFF] & HCI_EXT_FEATURE_CSB_SLAVE_MASK) 1585 1586 #define HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_MASK 0x04 1587 #define HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_OFF 0 1588 #define HCI_SYNC_TRAIN_MASTER_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_OFF] & HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_MASK) 1589 1590 #define HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_MASK 0x08 1591 #define HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_OFF 0 1592 #define HCI_SYNC_SCAN_SLAVE_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_OFF] & HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_MASK) 1593 1594 #define HCI_EXT_FEATURE_INQ_RESP_NOTIF_MASK 0x10 1595 #define HCI_EXT_FEATURE_INQ_RESP_NOTIF_OFF 0 1596 #define HCI_INQ_RESP_NOTIF_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_INQ_RESP_NOTIF_OFF] & HCI_EXT_FEATURE_INQ_RESP_NOTIF_MASK) 1597 1598 /* 1599 ** LE features encoding - page 0 (the only page for now) 1600 */ 1601 #define HCI_LE_FEATURE_LE_ENCRYPTION_MASK 0x01 1602 #define HCI_LE_FEATURE_LE_ENCRYPTION_OFF 0 1603 #define HCI_LE_ENCRYPTION_SUPPORTED(x) ((x)[HCI_LE_FEATURE_LE_ENCRYPTION_OFF] & HCI_LE_FEATURE_LE_ENCRYPTION_MASK) 1604 1605 1606 /* 1607 ** Local Supported Commands encoding 1608 */ 1609 #define HCI_NUM_SUPP_COMMANDS_BYTES 64 1610 1611 /* Supported Commands Byte 0 */ 1612 #define HCI_SUPP_COMMANDS_INQUIRY_MASK 0x01 1613 #define HCI_SUPP_COMMANDS_INQUIRY_OFF 0 1614 #define HCI_INQUIRY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_INQUIRY_OFF] & HCI_SUPP_COMMANDS_INQUIRY_MASK) 1615 1616 #define HCI_SUPP_COMMANDS_INQUIRY_CANCEL_MASK 0x02 1617 #define HCI_SUPP_COMMANDS_INQUIRY_CANCEL_OFF 0 1618 #define HCI_INQUIRY_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_INQUIRY_CANCEL_OFF] & HCI_SUPP_COMMANDS_INQUIRY_CANCEL_MASK) 1619 1620 #define HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_MASK 0x04 1621 #define HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_OFF 0 1622 #define HCI_PERIODIC_INQUIRY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_OFF] & HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_MASK) 1623 1624 #define HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_MASK 0x08 1625 #define HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_OFF 0 1626 #define HCI_EXIT_PERIODIC_INQUIRY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_OFF] & HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_MASK) 1627 1628 #define HCI_SUPP_COMMANDS_CREATE_CONN_MASK 0x10 1629 #define HCI_SUPP_COMMANDS_CREATE_CONN_OFF 0 1630 #define HCI_CREATE_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_CONN_OFF] & HCI_SUPP_COMMANDS_CREATE_CONN_MASK) 1631 1632 #define HCI_SUPP_COMMANDS_DISCONNECT_MASK 0x20 1633 #define HCI_SUPP_COMMANDS_DISCONNECT_OFF 0 1634 #define HCI_DISCONNECT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DISCONNECT_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_MASK) 1635 1636 #define HCI_SUPP_COMMANDS_ADD_SCO_CONN_MASK 0x40 1637 #define HCI_SUPP_COMMANDS_ADD_SCO_CONN_OFF 0 1638 #define HCI_ADD_SCO_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ADD_SCO_CONN_OFF] & HCI_SUPP_COMMANDS_ADD_SCO_CONN_MASK) 1639 1640 #define HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_MASK 0x80 1641 #define HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_OFF 0 1642 #define HCI_CANCEL_CREATE_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_OFF] & HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_MASK) 1643 1644 /* Supported Commands Byte 1 */ 1645 #define HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_MASK 0x01 1646 #define HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_OFF 1 1647 #define HCI_ACCEPT_CONN_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_OFF] & HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_MASK) 1648 1649 #define HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_MASK 0x02 1650 #define HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_OFF 1 1651 #define HCI_REJECT_CONN_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_OFF] & HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_MASK) 1652 1653 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_MASK 0x04 1654 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_OFF 1 1655 #define HCI_LINK_KEY_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_MASK) 1656 1657 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_MASK 0x08 1658 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_OFF 1 1659 #define HCI_LINK_KEY_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_MASK) 1660 1661 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_MASK 0x10 1662 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_OFF 1 1663 #define HCI_PIN_CODE_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_MASK) 1664 1665 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_MASK 0x20 1666 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_OFF 1 1667 #define HCI_PIN_CODE_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_MASK) 1668 1669 #define HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_MASK 0x40 1670 #define HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_OFF 1 1671 #define HCI_CHANGE_CONN_PKT_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_OFF] & HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_MASK) 1672 1673 #define HCI_SUPP_COMMANDS_AUTH_REQUEST_MASK 0x80 1674 #define HCI_SUPP_COMMANDS_AUTH_REQUEST_OFF 1 1675 #define HCI_AUTH_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_AUTH_REQUEST_OFF] & HCI_SUPP_COMMANDS_AUTH_REQUEST_MASK) 1676 1677 /* Supported Commands Byte 2 */ 1678 #define HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_MASK 0x01 1679 #define HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_OFF 2 1680 #define HCI_SET_CONN_ENCRYPTION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_OFF] & HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_MASK) 1681 1682 #define HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_MASK 0x02 1683 #define HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_OFF 2 1684 #define HCI_CHANGE_CONN_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_MASK) 1685 1686 #define HCI_SUPP_COMMANDS_MASTER_LINK_KEY_MASK 0x04 1687 #define HCI_SUPP_COMMANDS_MASTER_LINK_KEY_OFF 2 1688 #define HCI_MASTER_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_MASTER_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_MASTER_LINK_KEY_MASK) 1689 1690 #define HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_MASK 0x08 1691 #define HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_OFF 2 1692 #define HCI_REMOTE_NAME_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_OFF] & HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_MASK) 1693 1694 #define HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_MASK 0x10 1695 #define HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_OFF 2 1696 #define HCI_CANCEL_REMOTE_NAME_REQUEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_OFF] & HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_MASK) 1697 1698 #define HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_MASK 0x20 1699 #define HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_OFF 2 1700 #define HCI_READ_REMOTE_SUPP_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_MASK) 1701 1702 #define HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_MASK 0x40 1703 #define HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_OFF 2 1704 #define HCI_READ_REMOTE_EXT_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_MASK) 1705 1706 #define HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_MASK 0x80 1707 #define HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_OFF 2 1708 #define HCI_READ_REMOTE_VER_INFO_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_MASK) 1709 1710 /* Supported Commands Byte 3, bits 2-7 reserved */ 1711 #define HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_MASK 0x01 1712 #define HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_OFF 3 1713 #define HCI_READ_CLOCK_OFFSET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_OFF] & HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_MASK) 1714 1715 #define HCI_SUPP_COMMANDS_READ_LMP_HANDLE_MASK 0x02 1716 #define HCI_SUPP_COMMANDS_READ_LMP_HANDLE_OFF 3 1717 #define HCI_READ_LMP_HANDLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LMP_HANDLE_OFF] & HCI_SUPP_COMMANDS_READ_LMP_HANDLE_MASK) 1718 1719 /* Supported Commands Byte 4, bit 0 reserved */ 1720 #define HCI_SUPP_COMMANDS_HOLD_MODE_CMD_MASK 0x02 1721 #define HCI_SUPP_COMMANDS_HOLD_MODE_CMD_OFF 4 1722 #define HCI_HOLD_MODE_CMD_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_HOLD_MODE_CMD_OFF] & HCI_SUPP_COMMANDS_HOLD_MODE_CMD_MASK) 1723 1724 #define HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_MASK 0x04 1725 #define HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_OFF 4 1726 #define HCI_SNIFF_MODE_CMD_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_OFF] & HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_MASK) 1727 1728 #define HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_MASK 0x08 1729 #define HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_OFF 4 1730 #define HCI_EXIT_SNIFF_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_OFF] & HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_MASK) 1731 1732 #define HCI_SUPP_COMMANDS_PARK_STATE_MASK 0x10 1733 #define HCI_SUPP_COMMANDS_PARK_STATE_OFF 4 1734 #define HCI_PARK_STATE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_PARK_STATE_OFF] & HCI_SUPP_COMMANDS_PARK_STATE_MASK) 1735 1736 #define HCI_SUPP_COMMANDS_EXIT_PARK_STATE_MASK 0x20 1737 #define HCI_SUPP_COMMANDS_EXIT_PARK_STATE_OFF 4 1738 #define HCI_EXIT_PARK_STATE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_EXIT_PARK_STATE_OFF] & HCI_SUPP_COMMANDS_EXIT_PARK_STATE_MASK) 1739 1740 #define HCI_SUPP_COMMANDS_QOS_SETUP_MASK 0x40 1741 #define HCI_SUPP_COMMANDS_QOS_SETUP_OFF 4 1742 #define HCI_QOS_SETUP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_QOS_SETUP_OFF] & HCI_SUPP_COMMANDS_QOS_SETUP_MASK) 1743 1744 #define HCI_SUPP_COMMANDS_ROLE_DISCOVERY_MASK 0x80 1745 #define HCI_SUPP_COMMANDS_ROLE_DISCOVERY_OFF 4 1746 #define HCI_ROLE_DISCOVERY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ROLE_DISCOVERY_OFF] & HCI_SUPP_COMMANDS_ROLE_DISCOVERY_MASK) 1747 1748 /* Supported Commands Byte 5 */ 1749 #define HCI_SUPP_COMMANDS_SWITCH_ROLE_MASK 0x01 1750 #define HCI_SUPP_COMMANDS_SWITCH_ROLE_OFF 5 1751 #define HCI_SWITCH_ROLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SWITCH_ROLE_OFF] & HCI_SUPP_COMMANDS_SWITCH_ROLE_MASK) 1752 1753 #define HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_MASK 0x02 1754 #define HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_OFF 5 1755 #define HCI_READ_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_MASK) 1756 1757 #define HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_MASK 0x04 1758 #define HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_OFF 5 1759 #define HCI_WRITE_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_MASK) 1760 1761 #define HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_MASK 0x08 1762 #define HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_OFF 5 1763 #define HCI_READ_DEF_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_MASK) 1764 1765 #define HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_MASK 0x10 1766 #define HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_OFF 5 1767 #define HCI_WRITE_DEF_LINK_POLICY_SET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_MASK) 1768 1769 #define HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_MASK 0x20 1770 #define HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_OFF 5 1771 #define HCI_FLOW_SPECIFICATION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_OFF] & HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_MASK) 1772 1773 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_MASK 0x40 1774 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_OFF 5 1775 #define HCI_SET_EVENT_MASK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EVENT_MASK_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_MASK_MASK) 1776 1777 #define HCI_SUPP_COMMANDS_RESET_MASK 0x80 1778 #define HCI_SUPP_COMMANDS_RESET_OFF 5 1779 #define HCI_RESET_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_RESET_OFF] & HCI_SUPP_COMMANDS_RESET_MASK) 1780 1781 /* Supported Commands Byte 6 */ 1782 #define HCI_SUPP_COMMANDS_SET_EVENT_FILTER_MASK 0x01 1783 #define HCI_SUPP_COMMANDS_SET_EVENT_FILTER_OFF 6 1784 #define HCI_SET_EVENT_FILTER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EVENT_FILTER_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_FILTER_MASK) 1785 1786 #define HCI_SUPP_COMMANDS_FLUSH_MASK 0x02 1787 #define HCI_SUPP_COMMANDS_FLUSH_OFF 6 1788 #define HCI_FLUSH_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_FLUSH_OFF] & HCI_SUPP_COMMANDS_FLUSH_MASK) 1789 1790 #define HCI_SUPP_COMMANDS_READ_PIN_TYPE_MASK 0x04 1791 #define HCI_SUPP_COMMANDS_READ_PIN_TYPE_OFF 6 1792 #define HCI_READ_PIN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PIN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_PIN_TYPE_MASK) 1793 1794 #define HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_MASK 0x08 1795 #define HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_OFF 6 1796 #define HCI_WRITE_PIN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_MASK) 1797 1798 #define HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_MASK 0x10 1799 #define HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_OFF 6 1800 #define HCI_CREATE_NEW_UNIT_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_OFF] & HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_MASK) 1801 1802 #define HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_MASK 0x20 1803 #define HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_OFF 6 1804 #define HCI_READ_STORED_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_MASK) 1805 1806 #define HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_MASK 0x40 1807 #define HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_OFF 6 1808 #define HCI_WRITE_STORED_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_MASK) 1809 1810 #define HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_MASK 0x80 1811 #define HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_OFF 6 1812 #define HCI_DELETE_STORED_LINK_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_MASK) 1813 1814 /* Supported Commands Byte 7 */ 1815 #define HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_MASK 0x01 1816 #define HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_OFF 7 1817 #define HCI_WRITE_LOCAL_NAME_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_OFF] & HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_MASK) 1818 1819 #define HCI_SUPP_COMMANDS_READ_LOCAL_NAME_MASK 0x02 1820 #define HCI_SUPP_COMMANDS_READ_LOCAL_NAME_OFF 7 1821 #define HCI_READ_LOCAL_NAME_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_NAME_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_NAME_MASK) 1822 1823 #define HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_MASK 0x04 1824 #define HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_OFF 7 1825 #define HCI_READ_CONN_ACCEPT_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_MASK) 1826 1827 #define HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_MASK 0x08 1828 #define HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_OFF 7 1829 #define HCI_WRITE_CONN_ACCEPT_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_MASK) 1830 1831 #define HCI_SUPP_COMMANDS_READ_PAGE_TOUT_MASK 0x10 1832 #define HCI_SUPP_COMMANDS_READ_PAGE_TOUT_OFF 7 1833 #define HCI_READ_PAGE_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_TOUT_MASK) 1834 1835 #define HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_MASK 0x20 1836 #define HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_OFF 7 1837 #define HCI_WRITE_PAGE_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_MASK) 1838 1839 #define HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_MASK 0x40 1840 #define HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_OFF 7 1841 #define HCI_READ_SCAN_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_MASK) 1842 1843 #define HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_MASK 0x80 1844 #define HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_OFF 7 1845 #define HCI_WRITE_SCAN_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_MASK) 1846 1847 /* Supported Commands Byte 8, bits 4-5 are reserved in the specs but are successfully used in our host/controller */ 1848 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_MASK 0x01 1849 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_OFF 8 1850 #define HCI_READ_PAGE_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_MASK) 1851 1852 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_MASK 0x02 1853 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_OFF 8 1854 #define HCI_WRITE_PAGE_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_MASK) 1855 1856 #define HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_MASK 0x04 1857 #define HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_OFF 8 1858 #define HCI_READ_INQURIY_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_MASK) 1859 1860 #define HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_MASK 0x08 1861 #define HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_OFF 8 1862 #define HCI_WRITE_INQURIY_SCAN_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_MASK) 1863 1864 #define HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_MASK 0x10 1865 #define HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_OFF 8 1866 #define HCI_READ_AUTH_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_MASK) 1867 1868 #define HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_MASK 0x20 1869 #define HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_OFF 8 1870 #define HCI_WRITE_AUTH_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_MASK) 1871 1872 #define HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_MASK 0x40 1873 #define HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_OFF 8 1874 #define HCI_READ_ENCRYPT_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_MASK) 1875 1876 #define HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_MASK 0x80 1877 #define HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_OFF 8 1878 #define HCI_WRITE_ENCRYPT_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_MASK) 1879 1880 /* Supported Commands Byte 9 */ 1881 #define HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_MASK 0x01 1882 #define HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_OFF 9 1883 #define HCI_READ_CLASS_DEVICE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_OFF] & HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_MASK) 1884 1885 #define HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_MASK 0x02 1886 #define HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_OFF 9 1887 #define HCI_WRITE_CLASS_DEVICE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_OFF] & HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_MASK) 1888 1889 #define HCI_SUPP_COMMANDS_READ_VOICE_SETTING_MASK 0x04 1890 #define HCI_SUPP_COMMANDS_READ_VOICE_SETTING_OFF 9 1891 #define HCI_READ_VOICE_SETTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_VOICE_SETTING_OFF] & HCI_SUPP_COMMANDS_READ_VOICE_SETTING_MASK) 1892 1893 #define HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_MASK 0x08 1894 #define HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_OFF 9 1895 #define HCI_WRITE_VOICE_SETTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_OFF] & HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_MASK) 1896 1897 #define HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_MASK 0x10 1898 #define HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_OFF 9 1899 #define HCI_READ_AUTO_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_MASK) 1900 1901 #define HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_MASK 0x20 1902 #define HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_OFF 9 1903 #define HCI_WRITE_AUTO_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_MASK) 1904 1905 #define HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_MASK 0x40 1906 #define HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_OFF 9 1907 #define HCI_READ_NUM_BROAD_RETRANS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_OFF] & HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_MASK) 1908 1909 #define HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_MASK 0x80 1910 #define HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_OFF 9 1911 #define HCI_WRITE_NUM_BROAD_RETRANS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_OFF] & HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_MASK) 1912 1913 /* Supported Commands Byte 10 */ 1914 #define HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_MASK 0x01 1915 #define HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_OFF 10 1916 #define HCI_READ_HOLD_MODE_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_MASK) 1917 1918 #define HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_MASK 0x02 1919 #define HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_OFF 10 1920 #define HCI_WRITE_HOLD_MODE_ACTIVITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_MASK) 1921 1922 #define HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_MASK 0x04 1923 #define HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_OFF 10 1924 #define HCI_READ_TRANS_PWR_LEVEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_OFF] & HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_MASK) 1925 1926 #define HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_MASK 0x08 1927 #define HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_OFF 10 1928 #define HCI_READ_SYNCH_FLOW_CTRL_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_MASK) 1929 1930 #define HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_MASK 0x10 1931 #define HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_OFF 10 1932 #define HCI_WRITE_SYNCH_FLOW_CTRL_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_MASK) 1933 1934 #define HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_MASK 0x20 1935 #define HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_OFF 10 1936 #define HCI_SET_HOST_CTRLR_TO_HOST_FC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_OFF] & HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_MASK) 1937 1938 #define HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_MASK 0x40 1939 #define HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_OFF 10 1940 #define HCI_HOST_BUFFER_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_OFF] & HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_MASK) 1941 1942 #define HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_MASK 0x80 1943 #define HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_OFF 10 1944 #define HCI_HOST_NUM_COMPLETED_PKTS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_OFF] & HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_MASK) 1945 1946 /* Supported Commands Byte 11 */ 1947 #define HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_MASK 0x01 1948 #define HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_OFF 11 1949 #define HCI_READ_LINK_SUP_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_MASK) 1950 1951 #define HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_MASK 0x02 1952 #define HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_OFF 11 1953 #define HCI_WRITE_LINK_SUP_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_MASK) 1954 1955 #define HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_MASK 0x04 1956 #define HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_OFF 11 1957 #define HCI_READ_NUM_SUPP_IAC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_OFF] & HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_MASK) 1958 1959 #define HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_MASK 0x08 1960 #define HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_OFF 11 1961 #define HCI_READ_CURRENT_IAC_LAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_OFF] & HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_MASK) 1962 1963 #define HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_MASK 0x10 1964 #define HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_OFF 11 1965 #define HCI_WRITE_CURRENT_IAC_LAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_OFF] & HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_MASK) 1966 1967 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_MASK 0x20 1968 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_OFF 11 1969 #define HCI_READ_PAGE_SCAN_PER_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_MASK) 1970 1971 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_MASK 0x40 1972 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_OFF 11 1973 #define HCI_WRITE_PAGE_SCAN_PER_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_MASK) 1974 1975 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_MASK 0x80 1976 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_OFF 11 1977 #define HCI_READ_PAGE_SCAN_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_MASK) 1978 1979 /* Supported Commands Byte 12, bits 2-3 reserved */ 1980 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_MASK 0x01 1981 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_OFF 12 1982 #define HCI_WRITE_PAGE_SCAN_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_MASK) 1983 1984 #define HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_MASK 0x02 1985 #define HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_OFF 12 1986 #define HCI_SET_AFH_CHNL_CLASS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_OFF] & HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_MASK) 1987 1988 #define HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_MASK 0x10 1989 #define HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_OFF 12 1990 #define HCI_READ_INQUIRY_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_MASK) 1991 1992 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_MASK 0x20 1993 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_OFF 12 1994 #define HCI_WRITE_INQUIRY_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_MASK) 1995 1996 #define HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_MASK 0x40 1997 #define HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_OFF 12 1998 #define HCI_READ_INQUIRY_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_MASK) 1999 2000 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_MASK 0x80 2001 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_OFF 12 2002 #define HCI_WRITE_INQUIRY_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_MASK) 2003 2004 /* Supported Commands Byte 13, bits 4-7 reserved */ 2005 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_MASK 0x01 2006 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_OFF 13 2007 #define HCI_READ_PAGE_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_MASK) 2008 2009 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_MASK 0x02 2010 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_OFF 13 2011 #define HCI_WRITE_PAGE_SCAN_TYPE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_MASK) 2012 2013 #define HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_MASK 0x04 2014 #define HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_OFF 13 2015 #define HCI_READ_AFH_CHNL_ASSESS_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_OFF] & HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_MASK) 2016 2017 #define HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_MASK 0x08 2018 #define HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_OFF 13 2019 #define HCI_WRITE_AFH_CHNL_ASSESS_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_MASK) 2020 2021 /* Supported Commands Byte 14, bits 0-2 and 4 reserved */ 2022 #define HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_MASK 0x08 2023 #define HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_OFF 14 2024 #define HCI_READ_LOCAL_VER_INFO_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_MASK) 2025 2026 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_MASK 0x10 2027 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_OFF 14 2028 #define HCI_READ_LOCAL_SUP_CMDS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_MASK) 2029 2030 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_MASK 0x20 2031 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_OFF 14 2032 #define HCI_READ_LOCAL_SUPP_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_MASK) 2033 2034 #define HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_MASK 0x40 2035 #define HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_OFF 14 2036 #define HCI_READ_LOCAL_EXT_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_MASK) 2037 2038 #define HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_MASK 0x80 2039 #define HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_OFF 14 2040 #define HCI_READ_BUFFER_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_MASK) 2041 2042 /* Supported Commands Byte 15 */ 2043 #define HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_MASK 0x01 2044 #define HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_OFF 15 2045 #define HCI_READ_COUNTRY_CODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_OFF] & HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_MASK) 2046 2047 #define HCI_SUPP_COMMANDS_READ_BD_ADDR_MASK 0x02 2048 #define HCI_SUPP_COMMANDS_READ_BD_ADDR_OFF 15 2049 #define HCI_READ_BD_ADDR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BD_ADDR_OFF] & HCI_SUPP_COMMANDS_READ_BD_ADDR_MASK) 2050 2051 #define HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_MASK 0x04 2052 #define HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_OFF 15 2053 #define HCI_READ_FAIL_CONTACT_CNTR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_OFF] & HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_MASK) 2054 2055 #define HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_MASK 0x08 2056 #define HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_OFF 15 2057 #define HCI_RESET_FAIL_CONTACT_CNTR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_OFF] & HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_MASK) 2058 2059 #define HCI_SUPP_COMMANDS_GET_LINK_QUALITY_MASK 0x10 2060 #define HCI_SUPP_COMMANDS_GET_LINK_QUALITY_OFF 15 2061 #define HCI_GET_LINK_QUALITY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_GET_LINK_QUALITY_OFF] & HCI_SUPP_COMMANDS_GET_LINK_QUALITY_MASK) 2062 2063 #define HCI_SUPP_COMMANDS_READ_RSSI_MASK 0x20 2064 #define HCI_SUPP_COMMANDS_READ_RSSI_OFF 15 2065 #define HCI_READ_RSSI_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_RSSI_OFF] & HCI_SUPP_COMMANDS_READ_RSSI_MASK) 2066 2067 #define HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_MASK 0x40 2068 #define HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_OFF 15 2069 #define HCI_READ_AFH_CH_MAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_OFF] & HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_MASK) 2070 2071 #define HCI_SUPP_COMMANDS_READ_BD_CLOCK_MASK 0x80 2072 #define HCI_SUPP_COMMANDS_READ_BD_CLOCK_OFF 15 2073 #define HCI_READ_BD_CLOCK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BD_CLOCK_OFF] & HCI_SUPP_COMMANDS_READ_BD_CLOCK_MASK) 2074 2075 /* Supported Commands Byte 16, bits 6-7 reserved */ 2076 #define HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_MASK 0x01 2077 #define HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_OFF 16 2078 #define HCI_READ_LOOPBACK_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_OFF] & HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_MASK) 2079 2080 #define HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_MASK 0x02 2081 #define HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_OFF 16 2082 #define HCI_WRITE_LOOPBACK_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_MASK) 2083 2084 #define HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_MASK 0x04 2085 #define HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_OFF 16 2086 #define HCI_ENABLE_DEV_UNDER_TEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_OFF] & HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_MASK) 2087 2088 #define HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_MASK 0x08 2089 #define HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_OFF 16 2090 #define HCI_SETUP_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_MASK) 2091 2092 #define HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_MASK 0x10 2093 #define HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_OFF 16 2094 #define HCI_ACCEPT_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_MASK) 2095 2096 #define HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_MASK 0x20 2097 #define HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_OFF 16 2098 #define HCI_REJECT_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_MASK) 2099 2100 #define HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_MASK 0x01 2101 #define HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_OFF 17 2102 #define HCI_READ_EXT_INQUIRY_RESP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_OFF] & HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_MASK) 2103 2104 #define HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_MASK 0x02 2105 #define HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_OFF 17 2106 #define HCI_WRITE_EXT_INQUIRY_RESP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_OFF] & HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_MASK) 2107 2108 #define HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_MASK 0x04 2109 #define HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_OFF 17 2110 #define HCI_REFRESH_ENCRYPTION_KEY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_OFF] & HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_MASK) 2111 2112 /* Supported Commands Byte 17, bit 3 reserved */ 2113 #define HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_MASK 0x10 2114 #define HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_OFF 17 2115 #define HCI_SNIFF_SUB_RATE_CMD_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_OFF] & HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_MASK) 2116 2117 #define HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_MASK 0x20 2118 #define HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_OFF 17 2119 #define HCI_READ_SIMPLE_PAIRING_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_OFF] & HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_MASK) 2120 2121 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_MASK 0x40 2122 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_OFF 17 2123 #define HCI_WRITE_SIMPLE_PAIRING_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_MASK) 2124 2125 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_MASK 0x80 2126 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_OFF 17 2127 #define HCI_READ_LOCAL_OOB_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_MASK) 2128 2129 /* Supported Commands Byte 18, bits 4-7 reserved */ 2130 #define HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_MASK 0x01 2131 #define HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_OFF 18 2132 #define HCI_READ_INQUIRY_RESPONSE_TX_POWER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_MASK) 2133 2134 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_MASK 0x02 2135 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_OFF 18 2136 #define HCI_WRITE_INQUIRY_RESPONSE_TX_POWER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_MASK) 2137 2138 #define HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK 0x04 2139 #define HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF 18 2140 #define HCI_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF] & HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK) 2141 2142 #define HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK 0x08 2143 #define HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF 18 2144 #define HCI_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF] & HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK) 2145 2146 #define HCI_SUPP_COMMANDS_IO_CAPABILITY_RESPONSE_MASK 0x80 2147 #define HCI_SUPP_COMMANDS_IO_CAPABILITY_RESPONSE_OFF 18 2148 #define HCI_IO_CAPABILITY_RESPONSE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_IO_CAPABILITY_RESPONSE_OFF] & HCI_SUPP_COMMANDS_IO_CAPABILITY_RESPONSE_MASK) 2149 2150 /* Supported Commands Byte 19 */ 2151 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_MASK 0x01 2152 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_OFF 19 2153 #define HCI_USER_CONFIRMATION_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_MASK) 2154 2155 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_MASK 0x02 2156 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_OFF 19 2157 #define HCI_USER_CONFIRMATION_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_MASK) 2158 2159 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_MASK 0x04 2160 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_OFF 19 2161 #define HCI_USER_PASSKEY_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_MASK) 2162 2163 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_MASK 0x08 2164 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_OFF 19 2165 #define HCI_USER_PASSKEY_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_MASK) 2166 2167 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_MASK 0x10 2168 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_OFF 19 2169 #define HCI_REMOTE_OOB_DATA_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_MASK) 2170 2171 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_MASK 0x20 2172 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_OFF 19 2173 #define HCI_WRITE_SIMPLE_PAIRING_DBG_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_MASK) 2174 2175 #define HCI_SUPP_COMMANDS_ENHANCED_FLUSH_MASK 0x40 2176 #define HCI_SUPP_COMMANDS_ENHANCED_FLUSH_OFF 19 2177 #define HCI_ENHANCED_FLUSH_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENHANCED_FLUSH_OFF] & HCI_SUPP_COMMANDS_ENHANCED_FLUSH_MASK) 2178 2179 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_MASK 0x80 2180 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_OFF 19 2181 #define HCI_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_MASK) 2182 2183 /* Supported Commands Byte 20, bits 0-1 and 5-7 reserved */ 2184 #define HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_MASK 0x04 2185 #define HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_OFF 20 2186 #define HCI_SEND_NOTIF_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_OFF] & HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_MASK) 2187 2188 #define HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_MASK 0x08 2189 #define HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_OFF 20 2190 #define HCI_IO_CAP_REQ_NEG_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_MASK) 2191 2192 #define HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_MASK 0x10 2193 #define HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_OFF 20 2194 #define HCI_READ_ENCR_KEY_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_MASK) 2195 2196 /* Supported Commands Byte 21 */ 2197 #define HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_MASK 0x01 2198 #define HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_OFF 21 2199 #define HCI_CREATE_PHYSICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_MASK) 2200 2201 #define HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_MASK 0x02 2202 #define HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_OFF 21 2203 #define HCI_ACCEPT_PHYSICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_MASK) 2204 2205 #define HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_MASK 0x04 2206 #define HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_OFF 21 2207 #define HCI_DISCONNECT_PHYSICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_MASK) 2208 2209 #define HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_MASK 0x08 2210 #define HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_OFF 21 2211 #define HCI_CREATE_LOGICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_MASK) 2212 2213 #define HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_MASK 0x10 2214 #define HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_OFF 21 2215 #define HCI_ACCEPT_LOGICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_MASK) 2216 2217 #define HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_MASK 0x20 2218 #define HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_OFF 21 2219 #define HCI_DISCONNECT_LOGICAL_LINK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_MASK) 2220 2221 #define HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_MASK 0x40 2222 #define HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_OFF 21 2223 #define HCI_LOGICAL_LINK_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_OFF] & HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_MASK) 2224 2225 #define HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_MASK 0x80 2226 #define HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_OFF 21 2227 #define HCI_FLOW_SPEC_MODIFY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_OFF] & HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_MASK) 2228 2229 /* Supported Commands Byte 22 */ 2230 #define HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK 0x01 2231 #define HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF 22 2232 #define HCI_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF] & HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK) 2233 2234 #define HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK 0x02 2235 #define HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF 22 2236 #define HCI_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK) 2237 2238 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_MASK 0x04 2239 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_OFF 22 2240 #define HCI_SET_EVENT_MASK_PAGE_2_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_MASK) 2241 2242 #define HCI_SUPP_COMMANDS_READ_LOCATION_DATA_MASK 0x08 2243 #define HCI_SUPP_COMMANDS_READ_LOCATION_DATA_OFF 22 2244 #define HCI_READ_LOCATION_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCATION_DATA_OFF] & HCI_SUPP_COMMANDS_READ_LOCATION_DATA_MASK) 2245 2246 #define HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_MASK 0x10 2247 #define HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_OFF 22 2248 #define HCI_WRITE_LOCATION_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_OFF] & HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_MASK) 2249 2250 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_MASK 0x20 2251 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_OFF 22 2252 #define HCI_READ_LOCAL_AMP_INFO_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_MASK) 2253 2254 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_MASK 0x40 2255 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_OFF 22 2256 #define HCI_READ_LOCAL_AMP_ASSOC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_MASK) 2257 2258 #define HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_MASK 0x80 2259 #define HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_OFF 22 2260 #define HCI_WRITE_REMOTE_AMP_ASSOC_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_OFF] & HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_MASK) 2261 2262 /* Supported Commands Byte 23, bits 3-4 reserved */ 2263 #define HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_MASK 0x01 2264 #define HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_OFF 23 2265 #define HCI_READ_FLOW_CONTROL_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_OFF] & HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_MASK) 2266 2267 #define HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_MASK 0x02 2268 #define HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_OFF 23 2269 #define HCI_WRITE_FLOW_CONTROL_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_MASK) 2270 2271 #define HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_MASK 0x04 2272 #define HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_OFF 23 2273 #define HCI_READ_DATA_BLOCK_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_MASK) 2274 2275 #define HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_MASK 0x20 2276 #define HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_OFF 23 2277 #define HCI_ENABLE_AMP_RCVR_REPORTS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_OFF] & HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_MASK) 2278 2279 #define HCI_SUPP_COMMANDS_AMP_TEST_END_MASK 0x40 2280 #define HCI_SUPP_COMMANDS_AMP_TEST_END_OFF 23 2281 #define HCI_AMP_TEST_END_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_AMP_TEST_END_OFF] & HCI_SUPP_COMMANDS_AMP_TEST_END_MASK) 2282 2283 #define HCI_SUPP_COMMANDS_AMP_TEST_MASK 0x80 2284 #define HCI_SUPP_COMMANDS_AMP_TEST_OFF 23 2285 #define HCI_AMP_TEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_AMP_TEST_OFF] & HCI_SUPP_COMMANDS_AMP_TEST_MASK) 2286 2287 /* Supported Commands Byte 24, bits 1, 7 reserved */ 2288 #define HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_MASK 0x01 2289 #define HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_OFF 24 2290 #define HCI_READ_TRANSMIT_POWER_LEVEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_OFF] & HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_MASK) 2291 2292 #define HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_MASK 0x04 2293 #define HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_OFF 24 2294 #define HCI_READ_BE_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_MASK) 2295 2296 #define HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_MASK 0x08 2297 #define HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_OFF 24 2298 #define HCI_WRITE_BE_FLUSH_TOUT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_MASK) 2299 2300 #define HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_MASK 0x10 2301 #define HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_OFF 24 2302 #define HCI_SHORT_RANGE_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_OFF] & HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_MASK) 2303 2304 #define HCI_SUPP_COMMANDS_READ_LE_HOST_SUPPORT_MASK 0x20 2305 #define HCI_SUPP_COMMANDS_READ_LE_HOST_SUPPORT_OFF 24 2306 #define HCI_READ_LE_HOST_SUPPORT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LE_HOST_SUPPORT_OFF] & HCI_SUPP_COMMANDS_READ_LE_HOST_SUPPORT_MASK) 2307 2308 #define HCI_SUPP_COMMANDS_WRITE_LE_HOST_SUPPORT_MASK 0x20 2309 #define HCI_SUPP_COMMANDS_WRITE_LE_HOST_SUPPORT_OFF 24 2310 #define HCI_WRITE_LE_HOST_SUPPORT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_LE_HOST_SUPPORT_OFF] & HCI_SUPP_COMMANDS_WRITE_LE_HOST_SUPPORT_MASK) 2311 2312 /* Supported Commands Byte 25, bit 3 reserved */ 2313 #define HCI_SUPP_COMMANDS_LE_SET_EVENT_MASK_MASK 0x01 2314 #define HCI_SUPP_COMMANDS_LE_SET_EVENT_MASK_OFF 25 2315 #define HCI_LE_SET_EVENT_MASK_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_SET_EVENT_MASK_OFF] & HCI_SUPP_COMMANDS_LE_SET_EVENT_MASK_MASK) 2316 2317 #define HCI_SUPP_COMMANDS_LE_READ_BUFFER_SIZE_MASK 0x02 2318 #define HCI_SUPP_COMMANDS_LE_READ_BUFFER_SIZE_OFF 25 2319 #define HCI_LE_READ_BUFFER_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_READ_BUFFER_SIZE_OFF] & HCI_SUPP_COMMANDS_LE_READ_BUFFER_SIZE_MASK) 2320 2321 #define HCI_SUPP_COMMANDS_LE_READ_LOCAL_SUPPORTED_FEATURES_MASK 0x04 2322 #define HCI_SUPP_COMMANDS_LE_READ_LOCAL_SUPPORTED_FEATURES_OFF 25 2323 #define HCI_LE_READ_LOCAL_SUPPORTED_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_READ_LOCAL_SUPPORTED_FEATURES_OFF] & HCI_SUPP_COMMANDS_LE_READ_LOCAL_SUPPORTED_FEATURES_MASK) 2324 2325 #define HCI_SUPP_COMMANDS_LE_SET_RANDOM_ADDRESS_MASK 0x10 2326 #define HCI_SUPP_COMMANDS_LE_SET_RANDOM_ADDRESS_OFF 25 2327 #define HCI_LE_SET_RANDOM_ADDRESS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_SET_RANDOM_ADDRESS_OFF] & HCI_SUPP_COMMANDS_LE_SET_RANDOM_ADDRESS_MASK) 2328 2329 #define HCI_SUPP_COMMANDS_LE_SET_ADVERTISING_PARAMETERS_MASK 0x20 2330 #define HCI_SUPP_COMMANDS_LE_SET_ADVERTISING_PARAMETERS_OFF 25 2331 #define HCI_LE_SET_ADVERTISING_PARAMETERS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_SET_ADVERTISING_PARAMETERS_OFF] & HCI_SUPP_COMMANDS_LE_SET_ADVERTISING_PARAMETERS_MASK) 2332 2333 #define HCI_SUPP_COMMANDS_LE_READ_ADVERTISING_CHANNEL_TX_POWER_MASK 0x40 2334 #define HCI_SUPP_COMMANDS_LE_READ_ADVERTISING_CHANNEL_TX_POWER_OFF 25 2335 #define HCI_LE_READ_ADVERTISING_CHANNEL_TX_POWER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_READ_ADVERTISING_CHANNEL_TX_POWER_OFF] & HCI_SUPP_COMMANDS_LE_READ_ADVERTISING_CHANNEL_TX_POWER_MASK) 2336 2337 #define HCI_SUPP_COMMANDS_LE_SET_ADVERTISING_DATA_MASK 0x80 2338 #define HCI_SUPP_COMMANDS_LE_SET_ADVERTISING_DATA_OFF 25 2339 #define HCI_LE_SET_ADVERTISING_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_SET_ADVERTISING_DATA_OFF] & HCI_SUPP_COMMANDS_LE_SET_ADVERTISING_DATA_MASK) 2340 2341 /* Supported Commands Byte 26 */ 2342 #define HCI_SUPP_COMMANDS_LE_SET_SCAN_RESPONSE_DATA_MASK 0x01 2343 #define HCI_SUPP_COMMANDS_LE_SET_SCAN_RESPONSE_DATA_OFF 26 2344 #define HCI_LE_SET_SCAN_RESPONSE_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_SET_SCAN_RESPONSE_DATA_OFF] & HCI_SUPP_COMMANDS_LE_SET_SCAN_RESPONSE_DATA_MASK) 2345 2346 #define HCI_SUPP_COMMANDS_LE_SET_ADVERTISE_ENABLE_MASK 0x02 2347 #define HCI_SUPP_COMMANDS_LE_SET_ADVERTISE_ENABLE_OFF 26 2348 #define HCI_LE_SET_ADVERTISE_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_SET_ADVERTISE_ENABLE_OFF] & HCI_SUPP_COMMANDS_LE_SET_ADVERTISE_ENABLE_MASK) 2349 2350 #define HCI_SUPP_COMMANDS_LE_SET_SCAN_PARAMETERS_MASK 0x04 2351 #define HCI_SUPP_COMMANDS_LE_SET_SCAN_PARAMETERS_OFF 26 2352 #define HCI_LE_SET_SCAN_PARAMETERS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_SET_SCAN_PARAMETERS_OFF] & HCI_SUPP_COMMANDS_LE_SET_SCAN_PARAMETERS_MASK) 2353 2354 #define HCI_SUPP_COMMANDS_LE_SET_SCAN_ENABLE_MASK 0x08 2355 #define HCI_SUPP_COMMANDS_LE_SET_SCAN_ENABLE_OFF 26 2356 #define HCI_LE_SET_SCAN_ENABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_SET_SCAN_ENABLE_OFF] & HCI_SUPP_COMMANDS_LE_SET_SCAN_ENABLE_MASK) 2357 2358 #define HCI_SUPP_COMMANDS_LE_CREATE_CONNECTION_MASK 0x10 2359 #define HCI_SUPP_COMMANDS_LE_CREATE_CONNECTION_OFF 26 2360 #define HCI_LE_CREATE_CONNECTION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_CREATE_CONNECTION_OFF] & HCI_SUPP_COMMANDS_LE_CREATE_CONNECTION_MASK) 2361 2362 #define HCI_SUPP_COMMANDS_LE_CREATE_CONNECTION_CANCEL_MASK 0x20 2363 #define HCI_SUPP_COMMANDS_LE_CREATE_CONNECTION_CANCEL_OFF 26 2364 #define HCI_LE_CREATE_CONNECTION_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_CREATE_CONNECTION_CANCEL_OFF] & HCI_SUPP_COMMANDS_LE_CREATE_CONNECTION_CANCEL_MASK) 2365 2366 #define HCI_SUPP_COMMANDS_LE_READ_WHITE_LIST_SIZE_MASK 0x40 2367 #define HCI_SUPP_COMMANDS_LE_READ_WHITE_LIST_SIZE_OFF 26 2368 #define HCI_LE_READ_WHITE_LIST_SIZE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_READ_WHITE_LIST_SIZE_OFF] & HCI_SUPP_COMMANDS_LE_READ_WHITE_LIST_SIZE_MASK) 2369 2370 #define HCI_SUPP_COMMANDS_LE_CLEAR_WHITE_LIST_MASK 0x80 2371 #define HCI_SUPP_COMMANDS_LE_CLEAR_WHITE_LIST_OFF 26 2372 #define HCI_LE_CLEAR_WHITE_LIST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_CLEAR_WHITE_LIST_OFF] & HCI_SUPP_COMMANDS_LE_CLEAR_WHITE_LIST_MASK) 2373 2374 /* Supported Commands Byte 27 */ 2375 #define HCI_SUPP_COMMANDS_LE_ADD_DEVICE_TO_WHITE_LIST_MASK 0x01 2376 #define HCI_SUPP_COMMANDS_LE_ADD_DEVICE_TO_WHITE_LIST_OFF 27 2377 #define HCI_LE_ADD_DEVICE_TO_WHITE_LIST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_ADD_DEVICE_TO_WHITE_LIST_OFF] & HCI_SUPP_COMMANDS_LE_ADD_DEVICE_TO_WHITE_LIST_MASK) 2378 2379 #define HCI_SUPP_COMMANDS_LE_REMOVE_DEVICE_FROM_WHITE_LIST_MASK 0x02 2380 #define HCI_SUPP_COMMANDS_LE_REMOVE_DEVICE_FROM_WHITE_LIST_OFF 27 2381 #define HCI_LE_REMOVE_DEVICE_FROM_WHITE_LIST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_REMOVE_DEVICE_FROM_WHITE_LIST_OFF] & HCI_SUPP_COMMANDS_LE_REMOVE_DEVICE_FROM_WHITE_LIST_MASK) 2382 2383 #define HCI_SUPP_COMMANDS_LE_CONNECTION_UPDATE_MASK 0x04 2384 #define HCI_SUPP_COMMANDS_LE_CONNECTION_UPDATE_OFF 27 2385 #define HCI_LE_CONNECTION_UPDATE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_CONNECTION_UPDATE_OFF] & HCI_SUPP_COMMANDS_LE_CONNECTION_UPDATE_MASK) 2386 2387 #define HCI_SUPP_COMMANDS_LE_SET_HOST_CHANNEL_CLASSIFICATION_MASK 0x08 2388 #define HCI_SUPP_COMMANDS_LE_SET_HOST_CHANNEL_CLASSIFICATION_OFF 27 2389 #define HCI_LE_SET_HOST_CHANNEL_CLASSIFICATION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_SET_HOST_CHANNEL_CLASSIFICATION_OFF] & HCI_SUPP_COMMANDS_LE_SET_HOST_CHANNEL_CLASSIFICATION_MASK) 2390 2391 #define HCI_SUPP_COMMANDS_LE_READ_CHANNEL_MAP_MASK 0x10 2392 #define HCI_SUPP_COMMANDS_LE_READ_CHANNEL_MAP_OFF 27 2393 #define HCI_LE_READ_CHANNEL_MAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_READ_CHANNEL_MAP_OFF] & HCI_SUPP_COMMANDS_LE_READ_CHANNEL_MAP_MASK) 2394 2395 #define HCI_SUPP_COMMANDS_LE_READ_REMOTE_USED_FEATURES_MASK 0x20 2396 #define HCI_SUPP_COMMANDS_LE_READ_REMOTE_USED_FEATURES_OFF 27 2397 #define HCI_LE_READ_REMOTE_USED_FEATURES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_READ_REMOTE_USED_FEATURES_OFF] & HCI_SUPP_COMMANDS_LE_READ_REMOTE_USED_FEATURES_MASK) 2398 2399 #define HCI_SUPP_COMMANDS_LE_ENCRYPT_MASK 0x40 2400 #define HCI_SUPP_COMMANDS_LE_ENCRYPT_OFF 27 2401 #define HCI_LE_ENCRYPT_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_ENCRYPT_OFF] & HCI_SUPP_COMMANDS_LE_ENCRYPT_MASK) 2402 2403 #define HCI_SUPP_COMMANDS_LE_RAND_MASK 0x80 2404 #define HCI_SUPP_COMMANDS_LE_RAND_OFF 27 2405 #define HCI_LE_RAND_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_RAND_OFF] & HCI_SUPP_COMMANDS_LE_RAND_MASK) 2406 2407 2408 /* Supported Commands Byte 28, bit 7 reserved */ 2409 #define HCI_SUPP_COMMANDS_LE_START_ENCRYPTION_MASK 0x01 2410 #define HCI_SUPP_COMMANDS_LE_START_ENCRYPTION_OFF 28 2411 #define HCI_LE_START_ENCRYPTION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_START_ENCRYPTION_OFF] & HCI_SUPP_COMMANDS_LE_START_ENCRYPTION_MASK) 2412 2413 #define HCI_SUPP_COMMANDS_LE_LONG_TERM_KEY_REQUEST_REPLY_MASK 0x02 2414 #define HCI_SUPP_COMMANDS_LE_LONG_TERM_KEY_REQUEST_REPLY_OFF 28 2415 #define HCI_LE_LONG_TERM_KEY_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_LONG_TERM_KEY_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_LE_LONG_TERM_KEY_REQUEST_REPLY_MASK) 2416 2417 #define HCI_SUPP_COMMANDS_LE_LONG_TERM_KEY_REQUEST_NEGATIVE_REPLY_MASK 0x04 2418 #define HCI_SUPP_COMMANDS_LE_LONG_TERM_KEY_REQUEST_NEGATIVE_REPLY_OFF 28 2419 #define HCI_LE_LONG_TERM_KEY_REQUEST_NEGATIVE_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_LONG_TERM_KEY_REQUEST_NEGATIVE_REPLY_OFF] & HCI_SUPP_COMMANDS_LE_LONG_TERM_KEY_REQUEST_NEGATIVE_REPLY_MASK) 2420 2421 #define HCI_SUPP_COMMANDS_LE_READ_SUPPORTED_STATES_MASK 0x08 2422 #define HCI_SUPP_COMMANDS_LE_READ_SUPPORTED_STATES_OFF 28 2423 #define HCI_LE_READ_SUPPORTED_STATES_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_READ_SUPPORTED_STATES_OFF] & HCI_SUPP_COMMANDS_LE_READ_SUPPORTED_STATES_MASK) 2424 2425 #define HCI_SUPP_COMMANDS_LE_RECEIVER_TEST_MASK 0x10 2426 #define HCI_SUPP_COMMANDS_LE_RECEIVER_TEST_OFF 28 2427 #define HCI_LE_RECEIVER_TEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_RECEIVER_TEST_OFF] & HCI_SUPP_COMMANDS_LE_RECEIVER_TEST_MASK) 2428 2429 #define HCI_SUPP_COMMANDS_LE_TRANSMITTER_TEST_MASK 0x20 2430 #define HCI_SUPP_COMMANDS_LE_TRANSMITTER_TEST_OFF 28 2431 #define HCI_LE_TRANSMITTER_TEST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_TRANSMITTER_TEST_OFF] & HCI_SUPP_COMMANDS_LE_TRANSMITTER_TEST_MASK) 2432 2433 #define HCI_SUPP_COMMANDS_LE_TEST_END_MASK 0x40 2434 #define HCI_SUPP_COMMANDS_LE_TEST_END_OFF 28 2435 #define HCI_LE_TEST_END_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_LE_TEST_END_OFF] & HCI_SUPP_COMMANDS_LE_TEST_END_MASK) 2436 2437 /* Supported Commands Byte 29, bits 0-2 reserved */ 2438 #define HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_MASK 0x08 2439 #define HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_OFF 29 2440 #define HCI_READ_ENH_SETUP_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_MASK) 2441 2442 #define HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_MASK 0x10 2443 #define HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_OFF 29 2444 #define HCI_READ_ENH_ACCEPT_SYNCH_CONN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_MASK) 2445 2446 #define HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_MASK 0x20 2447 #define HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_OFF 29 2448 #define HCI_READ_LOCAL_CODECS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_MASK) 2449 2450 #define HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_MASK 0x40 2451 #define HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_OFF 29 2452 #define HCI_SET_MWS_CHANNEL_PARAMETERS_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_OFF] & HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_MASK) 2453 2454 #define HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_MASK 0x80 2455 #define HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_OFF 29 2456 #define HCI_SET_EXTERNAL_FRAME_CONFIGURATION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_OFF] & HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_MASK) 2457 2458 2459 /* Supported Commands Byte 30 */ 2460 #define HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_MASK 0x01 2461 #define HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_OFF 30 2462 #define HCI_SET_MWS_SIGNALING_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_OFF] & HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_MASK) 2463 2464 #define HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_MASK 0x02 2465 #define HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_OFF 30 2466 #define HCI_SET_MWS_TRANSPORT_LAYER_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_OFF] & HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_MASK) 2467 2468 #define HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_MASK 0x04 2469 #define HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_OFF 30 2470 #define HCI_SET_MWS_SCAN_FREQUENCY_TABLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_OFF] & HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_MASK) 2471 2472 #define HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_MASK 0x08 2473 #define HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_OFF 30 2474 #define HCI_GET_MWS_TRANS_LAYER_CFG_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_OFF] & HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_MASK) 2475 2476 #define HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_MASK 0x10 2477 #define HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_OFF 30 2478 #define HCI_SET_MWS_PATTERN_CONFIGURATION_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_OFF] & HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_MASK) 2479 2480 /* Supported Commands (Byte 30 bit 5) */ 2481 #define HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_MASK 0x20 2482 #define HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_OFF 30 2483 #define HCI_SET_TRIG_CLK_CAP_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_OFF] & HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_MASK) 2484 2485 2486 /* Supported Commands (Byte 30 bit 6-7) */ 2487 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE 0x06 2488 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE_OFF 30 2489 #define HCI_TRUNCATED_PAGE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_TRUNCATED_PAGE_OFF] & HCI_SUPP_COMMANDS_TRUNCATED_PAGE) 2490 2491 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL 0x07 2492 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL_OFF 30 2493 #define HCI_TRUNCATED_PAGE_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL_OFF] & HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL) 2494 2495 /* Supported Commands Byte 31 */ 2496 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST 0x00 2497 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_OFF 31 2498 #define HCI_SET_CONLESS_SLAVE_BRCST_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_OFF] & HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST) 2499 2500 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE 0x01 2501 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE_OFF 31 2502 #define HCI_SET_CONLESS_SLAVE_BRCST_RECEIVE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE_OFF] & HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE) 2503 2504 #define HCI_SUPP_COMMANDS_START_SYNC_TRAIN 0x02 2505 #define HCI_SUPP_COMMANDS_START_SYNC_TRAIN_OFF 31 2506 #define HCI_START_SYNC_TRAIN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_START_SYNC_TRAIN_OFF] & HCI_SUPP_COMMANDS_START_SYNC_TRAIN) 2507 2508 #define HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN 0x03 2509 #define HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN_OFF 31 2510 #define HCI_RECEIVE_SYNC_TRAIN_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN_OFF] & HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN) 2511 2512 #define HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR 0x04 2513 #define HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR_OFF 31 2514 #define HCI_SET_RESERVED_LT_ADDR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR_OFF] & HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR) 2515 2516 #define HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR 0x05 2517 #define HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR_OFF 31 2518 #define HCI_DELETE_RESERVED_LT_ADDR_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR_OFF] & HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR) 2519 2520 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA 0x06 2521 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA_OFF 31 2522 #define HCI_SET_CONLESS_SLAVE_BRCST_DATA_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA_OFF] & HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA) 2523 2524 #define HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM 0x07 2525 #define HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM_OFF 31 2526 #define HCI_READ_SYNC_TRAIN_PARAM_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM_OFF] & HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM) 2527 2528 /* Supported Commands Byte 32 bit 0 */ 2529 #define HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM 0x00 2530 #define HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM_OFF 32 2531 #define HCI_WRITE_SYNC_TRAIN_PARAM_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM_OFF] & HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM) 2532 2533 2534 /* 2535 Commands of HCI_GRP_VENDOR_SPECIFIC group for WIDCOMM SW LM Simulator 2536 */ 2537 #ifdef _WIDCOMM 2538 2539 #define HCI_SET_HCI_TRACE (0x0001 | HCI_GRP_VENDOR_SPECIFIC) 2540 #define HCI_SET_LM_TRACE (0x0002 | HCI_GRP_VENDOR_SPECIFIC) 2541 #define HCI_WRITE_COUNTRY_CODE (0x0004 | HCI_GRP_VENDOR_SPECIFIC) 2542 #define HCI_READ_LM_HISTORY (0x0005 | HCI_GRP_VENDOR_SPECIFIC) 2543 #define HCI_WRITE_BD_ADDR (0x0006 | HCI_GRP_VENDOR_SPECIFIC) 2544 #define HCI_DISABLE_ENCRYPTION (0x0007 | HCI_GRP_VENDOR_SPECIFIC) 2545 #define HCI_DISABLE_AUTHENTICATION (0x0008 | HCI_GRP_VENDOR_SPECIFIC) 2546 #define HCI_GENERIC_LC_CMD (0x000A | HCI_GRP_VENDOR_SPECIFIC) 2547 #define HCI_INCR_POWER (0x000B | HCI_GRP_VENDOR_SPECIFIC) 2548 #define HCI_DECR_POWER (0x000C | HCI_GRP_VENDOR_SPECIFIC) 2549 2550 /* Definitions for the local transactions */ 2551 #define LM_DISCONNECT (0x00D0 | HCI_GRP_VENDOR_SPECIFIC) 2552 #define LM_AUTHENTICATION_REQUESTED (0x00D1 | HCI_GRP_VENDOR_SPECIFIC) 2553 #define LM_SET_CONN_ENCRYPTION (0x00D2 | HCI_GRP_VENDOR_SPECIFIC) 2554 #define LM_START_ENCRYPT_KEY_SIZE (0x00D3 | HCI_GRP_VENDOR_SPECIFIC) 2555 #define LM_START_ENCRYPTION (0x00D4 | HCI_GRP_VENDOR_SPECIFIC) 2556 #define LM_STOP_ENCRYPTION (0x00D5 | HCI_GRP_VENDOR_SPECIFIC) 2557 #define LM_CHANGE_CONN_PACKET_TYPE (0x00D6 | HCI_GRP_VENDOR_SPECIFIC) 2558 #define LM_RMT_NAME_REQUEST (0x00D7 | HCI_GRP_VENDOR_SPECIFIC) 2559 #define LM_READ_RMT_FEATURES (0x00D8 | HCI_GRP_VENDOR_SPECIFIC) 2560 #define LM_READ_RMT_VERSION_INFO (0x00D9 | HCI_GRP_VENDOR_SPECIFIC) 2561 #define LM_READ_RMT_TIMING_INFO (0x00DA | HCI_GRP_VENDOR_SPECIFIC) 2562 #define LM_READ_RMT_CLOCK_OFFSET (0x00DB | HCI_GRP_VENDOR_SPECIFIC) 2563 #define LM_HOLD_MODE (0x00DC | HCI_GRP_VENDOR_SPECIFIC) 2564 #define LM_EXIT_PARK_MODE (0x00DD | HCI_GRP_VENDOR_SPECIFIC) 2565 2566 #define LM_SCO_LINK_REQUEST (0x00E0 | HCI_GRP_VENDOR_SPECIFIC) 2567 #define LM_SCO_CHANGE (0x00E4 | HCI_GRP_VENDOR_SPECIFIC) 2568 #define LM_SCO_REMOVE (0x00E8 | HCI_GRP_VENDOR_SPECIFIC) 2569 #define LM_MAX_SLOTS (0x00F1 | HCI_GRP_VENDOR_SPECIFIC) 2570 #define LM_MAX_SLOTS_REQUEST (0x00F2 | HCI_GRP_VENDOR_SPECIFIC) 2571 2572 #ifdef INCLUDE_OPTIONAL_PAGING_SCHEME 2573 #define LM_OPTIONAL_PAGE_REQUEST (0x00F3 | HCI_GRP_VENDOR_SPECIFIC) 2574 #define LM_OPTIONAL_PAGESCAN_REQUEST (0x00F4 | HCI_GRP_VENDOR_SPECIFIC) 2575 #endif 2576 2577 #define LM_SETUP_COMPLETE (0x00FF | HCI_GRP_VENDOR_SPECIFIC) 2578 2579 #define LM_HIST_SEND_LMP_FRAME (0x0100 | HCI_GRP_VENDOR_SPECIFIC) 2580 #define LM_HIST_RECV_LMP_FRAME (0x0101 | HCI_GRP_VENDOR_SPECIFIC) 2581 #define LM_HIST_HCIT_ERROR (0x0102 | HCI_GRP_VENDOR_SPECIFIC) 2582 #define LM_HIST_PER_INQ_TOUT (0x0103 | HCI_GRP_VENDOR_SPECIFIC) 2583 #define LM_HIST_INQ_SCAN_TOUT (0x0104 | HCI_GRP_VENDOR_SPECIFIC) 2584 #define LM_HIST_PAGE_SCAN_TOUT (0x0105 | HCI_GRP_VENDOR_SPECIFIC) 2585 #define LM_HIST_RESET_TOUT (0x0106 | HCI_GRP_VENDOR_SPECIFIC) 2586 #define LM_HIST_MANDAT_PSCAN_TOUT (0x0107 | HCI_GRP_VENDOR_SPECIFIC) 2587 #define LM_HIST_ACL_START_TRANS (0x0108 | HCI_GRP_VENDOR_SPECIFIC) 2588 #define LM_HIST_ACL_HOST_REPLY (0x0109 | HCI_GRP_VENDOR_SPECIFIC) 2589 #define LM_HIST_ACL_TIMEOUT (0x010A | HCI_GRP_VENDOR_SPECIFIC) 2590 #define LM_HIST_ACL_TX_COMP (0x010B | HCI_GRP_VENDOR_SPECIFIC) 2591 #define LM_HIST_ACL_HCID_SUSPENDED (0x010C | HCI_GRP_VENDOR_SPECIFIC) 2592 #define LM_HIST_ACL_FAILED (0x010D | HCI_GRP_VENDOR_SPECIFIC) 2593 #define LM_HIST_HCI_COMMAND (0x010E | HCI_GRP_VENDOR_SPECIFIC) 2594 2595 #define LM_HIST_HCI_EVENT (0x010F | HCI_GRP_VENDOR_SPECIFIC) 2596 #define LM_HIST_HCI_UPDATA (0x0110 | HCI_GRP_VENDOR_SPECIFIC) 2597 #define LM_HIST_HCI_DNDATA (0x0111 | HCI_GRP_VENDOR_SPECIFIC) 2598 2599 #define HCI_ENTER_TEST_MODE (0x0300 | HCI_GRP_VENDOR_SPECIFIC) 2600 #define HCI_LMP_TEST_CNTRL (0x0301 | HCI_GRP_VENDOR_SPECIFIC) 2601 #define HCI_DEBUG_LC_CMD_MIN (0x0300 | HCI_GRP_VENDOR_SPECIFIC) 2602 #define HCI_DEBUG_LC_CMD_MAX (0x03FF | HCI_GRP_VENDOR_SPECIFIC) 2603 #define HCI_DEBUG_LC_COMMAND HCI_DEBUG_LC_CMD_MAX 2604 #endif 2605 2606 #endif 2607 2608