| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeTypesGeneric.cpp | 36 SDValue &Lo, SDValue &Hi) { in ExpandRes_MERGE_VALUES()
41 void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) { in ExpandRes_BITCAST()
190 SDValue &Hi) { in ExpandRes_BUILD_PAIR()
197 SDValue &Hi) { in ExpandRes_EXTRACT_ELEMENT()
209 SDValue &Hi) { in ExpandRes_EXTRACT_VECTOR_ELT()
249 SDValue &Hi) { in ExpandRes_NormalLoad()
293 void DAGTypeLegalizer::ExpandRes_VAARG(SDNode *N, SDValue &Lo, SDValue &Hi) { in ExpandRes_VAARG()
390 SDValue Lo, Hi; in ExpandOp_BUILD_VECTOR() local
408 SDValue Lo, Hi; in ExpandOp_EXTRACT_ELEMENT() local
432 SDValue Lo, Hi; in ExpandOp_INSERT_VECTOR_ELT() local
[all …]
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| D | LegalizeFloatTypes.cpp | 859 SDValue Lo, Hi; in ExpandFloatResult() local
925 SDValue &Hi) { in ExpandFloatRes_ConstantFP()
939 SDValue &Hi) { in ExpandFloatRes_FABS()
953 SDValue &Hi) { in ExpandFloatRes_FMINNUM()
963 SDValue &Hi) { in ExpandFloatRes_FMAXNUM()
973 SDValue &Hi) { in ExpandFloatRes_FADD()
983 SDValue &Lo, SDValue &Hi) { in ExpandFloatRes_FCEIL()
993 SDValue &Lo, SDValue &Hi) { in ExpandFloatRes_FCOPYSIGN()
1005 SDValue &Lo, SDValue &Hi) { in ExpandFloatRes_FCOS()
1015 SDValue &Hi) { in ExpandFloatRes_FDIV()
[all …]
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| D | LegalizeIntegerTypes.cpp | 276 SDValue Lo, Hi; in PromoteIntRes_BITCAST() local
735 SDValue Hi = DAG.getNode(ISD::SRL, DL, Mul.getValueType(), Mul, in PromoteIntRes_XMULO() local
985 SDValue Hi = GetPromotedInteger(N->getOperand(1)); in PromoteIntOp_BUILD_PAIR() local
1214 SDValue Lo, Hi; in ExpandIntegerResult() local
1345 SDValue &Lo, SDValue &Hi) { in ExpandShiftByConstant()
1444 ExpandShiftWithKnownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi) { in ExpandShiftWithKnownAmountBit()
1532 ExpandShiftWithUnknownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi) { in ExpandShiftWithUnknownAmountBit()
1607 SDValue &Lo, SDValue &Hi) { in ExpandIntRes_ADDSUB()
1669 SDValue &Lo, SDValue &Hi) { in ExpandIntRes_ADDSUBC()
1695 SDValue &Lo, SDValue &Hi) { in ExpandIntRes_ADDSUBE()
[all …]
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| D | LegalizeTypes.cpp | 790 SDValue &Hi) { in GetExpandedInteger()
800 SDValue Hi) { in SetExpandedInteger()
817 SDValue &Hi) { in GetExpandedFloat()
827 SDValue Hi) { in SetExpandedFloat()
844 SDValue &Hi) { in GetSplitVector()
854 SDValue Hi) { in SetSplitVector()
996 SDValue &Lo, SDValue &Hi) { in GetPairElements()
1020 SDValue DAGTypeLegalizer::JoinIntegers(SDValue Lo, SDValue Hi) { in JoinIntegers()
1112 SDValue &Lo, SDValue &Hi) { in SplitInteger()
1125 SDValue &Lo, SDValue &Hi) { in SplitInteger()
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| D | LegalizeVectorTypes.cpp | 566 SDValue Lo, Hi; in SplitVectorResult() local
684 SDValue &Hi) { in SplitVecRes_BinOp()
696 SDValue &Hi) { in SplitVecRes_TernaryOp()
712 SDValue &Hi) { in SplitVecRes_BITCAST()
769 SDValue &Hi) { in SplitVecRes_BUILD_VECTOR()
782 SDValue &Hi) { in SplitVecRes_CONCAT_VECTORS()
803 SDValue &Hi) { in SplitVecRes_EXTRACT_SUBVECTOR()
819 SDValue &Hi) { in SplitVecRes_INSERT_SUBVECTOR()
856 SDValue &Hi) { in SplitVecRes_FPOWI()
864 SDValue &Hi) { in SplitVecRes_InregOp()
[all …]
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| D | LegalizeTypes.h | 755 void GetSplitOp(SDValue Op, SDValue &Lo, SDValue &Hi) { in GetSplitOp()
784 void GetExpandedOp(SDValue Op, SDValue &Lo, SDValue &Hi) { in GetExpandedOp()
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| D | LegalizeDAG.cpp | 391 SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount); in ExpandUnalignedStore() local
524 SDValue Lo, Hi; in ExpandUnalignedLoad() local
678 SDValue Hi = DAG.getConstant(IntVal.lshr(32).trunc(32), MVT::i32); in OptimizeFloatStore() local
781 SDValue Lo, Hi; in LegalizeStoreOps() local
993 SDValue Lo, Hi, Ch; in LegalizeLoadOps() local
2423 SDValue Hi = StackSlot; in ExpandLegalINT_TO_FP() local
2489 SDValue Hi = DAG.getNode(ISD::SRL, dl, MVT::i64, Op0, in ExpandLegalINT_TO_FP() local
3598 SDValue Lo, Hi; in ExpandNode() local
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| /external/llvm/lib/IR/ |
| D | MDBuilder.cpp | 56 MDNode *MDBuilder::createRange(const APInt &Lo, const APInt &Hi) { in createRange()
63 MDNode *MDBuilder::createRange(Constant *Lo, Constant *Hi) { in createRange()
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcISelLowering.h | 36 Hi, Lo, // Hi/Lo operations, typically on a global address. enumerator
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| D | SparcISelLowering.cpp | 810 SDValue Hi = DAG.getLoad(MVT::i32, dl, Store, StackPtr, in LowerCall_32() local
1796 SDValue Hi = DAG.getNode(SPISD::Hi, DL, VT, withTargetFlags(Op, HiTF, DAG)); in makeHiLoPair() local
1841 SDValue Hi = makeHiLoPair(Op, SparcMCExpr::VK_Sparc_HH, in makeAddress() local
1925 SDValue Hi = DAG.getNode(SPISD::Hi, DL, PtrVT, in LowerGlobalTLSAddress() local
1959 SDValue Hi = DAG.getNode(SPISD::Hi, DL, PtrVT, in LowerGlobalTLSAddress() local
2708 SDValue Hi = DAG.getNode(hiOpc, dl, VTs, Src1Hi, Src2Hi, Lo.getValue(1)); in LowerADDC_ADDE_SUBC_SUBE() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.h | 42 Hi, enumerator
312 SDValue Hi = in getAddrGlobalLargeGOT() local
328 SDValue Hi = getTargetNode(N, Ty, DAG, MipsII::MO_ABS_HI); in getAddrNonPIC() local
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| D | Mips16ISelDAGToDAG.cpp | 49 SDNode *Lo = nullptr, *Hi = nullptr; in selectMULT() local
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| D | MipsSEISelLowering.cpp | 1216 SDValue Hi = DAG.getLoad(MVT::i32, DL, Lo.getValue(1), Ptr, in lowerLOAD() local
1241 SDValue Hi = DAG.getNode(MipsISD::ExtractElementF64, DL, MVT::i32, in lowerSTORE() local
1269 SDValue Lo, Hi; in lowerMulDiv() local
1294 SDValue Hi = DAG.getNode(MipsISD::MFHI, DL, MVT::i32, Op); in extractLOHI() local
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 577 SDValue Hi = DAG.getNode(XCoreISD::MACCS, dl, in LowerSMUL_LOHI() local
594 SDValue Hi = DAG.getNode(XCoreISD::LMUL, dl, in LowerUMUL_LOHI() local
691 SDValue Hi = DAG.getNode(XCoreISD::MACCU, dl, in TryExpandADDWithMul() local
699 SDValue Hi = DAG.getNode(XCoreISD::MACCS, dl, in TryExpandADDWithMul() local
710 SDValue Hi = DAG.getNode(XCoreISD::MACCU, dl, in TryExpandADDWithMul() local
754 SDValue Hi = DAG.getNode(Opcode, dl, DAG.getVTList(MVT::i32, MVT::i32), in ExpandADDSUB() local
1801 SDValue Hi = DAG.getNode(XCoreISD::LMUL, dl, in PerformDAGCombine() local
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| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsELFObjectWriter.cpp | 319 static void setMatch(MipsRelocationEntry &Hi, MipsRelocationEntry &Lo) { in setMatch()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonISelLowering.h | 51 Hi, Lo, // Hi/Lo operations, typically on a global address. enumerator
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| /external/llvm/lib/Target/R600/ |
| D | AMDGPUISelLowering.cpp | 1244 SDValue Lo, Hi; in SplitVectorLoad() local
1383 SDValue Lo, Hi; in SplitVectorStore() local
1931 static SDValue extractF64Exponent(SDValue Hi, SDLoc SL, SelectionDAG &DAG) { in extractF64Exponent()
1958 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, VecSrc, One); in LowerFTRUNC() local
2066 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, BC, One); in LowerFROUND64() local
2150 SDValue Hi = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SL, MVT::i32, BC, in LowerINT_TO_FP64() local
2182 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, S0, in LowerUINT_TO_FP() local
2219 SDValue Hi = DAG.getNode(Signed ? ISD::FP_TO_SINT : ISD::FP_TO_UINT, SL, in LowerFP64_TO_INT() local
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| D | SIISelLowering.cpp | 835 SDValue Hi = DAG.getNode(ISD::ADDE, DL, DAG.getVTList(MVT::i32, MVT::Glue), in LowerGlobalAddress() local
1035 SDValue Hi = DAG.getSelect(DL, MVT::i32, Cond, Hi0, Hi1); in LowerSELECT() local
1157 const SDValue Hi = DAG.getConstant(1, MVT::i32); in LowerFDIV64() local
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| D | SIInstrInfo.cpp | 1556 MachineInstr *Hi = BuildMI(*MBB, MI, DL, get(AMDGPU::S_MOV_B32), in split64BitImm() local
2082 MachineInstr *Lo, *Hi; in moveSMRDToVALU() local
2093 MachineInstr *Lo, *Hi; in moveSMRDToVALU() local
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelLowering.h | 72 Hi, Lo, enumerator
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| /external/llvm/include/llvm/CodeGen/ |
| D | DIE.h | 361 DIEDelta(const MCSymbol *Hi, const MCSymbol *Lo) in DIEDelta()
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 1676 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); in LowerShiftRightParts() local
1704 SDValue Hi = DAG.getNode(Opc, dl, VT, ShOpHi, ShAmt); in LowerShiftRightParts() local
1736 SDValue Hi = DAG.getNode(NVPTXISD::FUN_SHFL_CLAMP, dl, VT, ShOpLo, ShOpHi, in LowerShiftLeftParts() local
1765 SDValue Hi = DAG.getNode(ISD::SELECT, dl, VT, Cmp, TrueVal, FalseVal); in LowerShiftLeftParts() local
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| /external/valgrind/VEX/priv/ |
| D | host_mips_isel.c | 3048 HReg Hi, Lo; in iselFltExpr_wrk() local
3248 HReg Hi, Lo; in iselFltExpr_wrk() local
3281 HReg Hi, Lo; in iselFltExpr_wrk() local
3470 HReg Hi, Lo; in iselDblExpr_wrk() local
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| /external/llvm/include/llvm/Support/ |
| D | GCOV.h | 193 uint32_t Lo, Hi; in readInt64() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 2985 SDValue Hi = DAG.getTargetConstantPool(GV, PtrVT, 0, 0, AArch64II::MO_PAGE); in LowerGlobalAddress() local
3012 SDValue Hi = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, in LowerGlobalAddress() local
3822 SDValue Hi = in LowerJumpTable() local
3859 SDValue Hi = in LowerConstantPool() local
3886 SDValue Hi = DAG.getTargetBlockAddress(BA, PtrVT, 0, AArch64II::MO_PAGE); in LowerBlockAddress() local
4145 SDValue Hi = in LowerShiftRightParts() local
4179 SDValue Hi = in LowerShiftLeftParts() local
7921 SDValue Lo, Hi; in performExtendCombine() local
8974 Value *Hi = Builder.CreateExtractValue(LoHi, 1, "hi"); in emitLoadLinked() local
9007 Value *Hi = Builder.CreateTrunc(Builder.CreateLShr(Val, 64), Int64Ty, "hi"); in emitStoreConditional() local
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