1 //===-- MipsAsmBackend.h - Mips Asm Backend  ------------------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines the MipsAsmBackend class.
11 //
12 //===----------------------------------------------------------------------===//
13 //
14 
15 #ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSASMBACKEND_H
16 #define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSASMBACKEND_H
17 
18 #include "MCTargetDesc/MipsFixupKinds.h"
19 #include "llvm/ADT/Triple.h"
20 #include "llvm/MC/MCAsmBackend.h"
21 
22 namespace llvm {
23 
24 class MCAssembler;
25 struct MCFixupKindInfo;
26 class Target;
27 class MCObjectWriter;
28 
29 class MipsAsmBackend : public MCAsmBackend {
30   Triple::OSType OSType;
31   bool IsLittle; // Big or little endian
32   bool Is64Bit;  // 32 or 64 bit words
33 
34 public:
MipsAsmBackend(const Target & T,Triple::OSType OSType,bool IsLittle,bool Is64Bit)35   MipsAsmBackend(const Target &T, Triple::OSType OSType, bool IsLittle,
36                  bool Is64Bit)
37       : MCAsmBackend(), OSType(OSType), IsLittle(IsLittle), Is64Bit(Is64Bit) {}
38 
39   MCObjectWriter *createObjectWriter(raw_pwrite_stream &OS) const override;
40 
41   void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
42                   uint64_t Value, bool IsPCRel) const override;
43 
44   const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
45 
getNumFixupKinds()46   unsigned getNumFixupKinds() const override {
47     return Mips::NumTargetFixupKinds;
48   }
49 
50   /// @name Target Relaxation Interfaces
51   /// @{
52 
53   /// MayNeedRelaxation - Check whether the given instruction may need
54   /// relaxation.
55   ///
56   /// \param Inst - The instruction to test.
mayNeedRelaxation(const MCInst & Inst)57   bool mayNeedRelaxation(const MCInst &Inst) const override {
58     return false;
59   }
60 
61   /// fixupNeedsRelaxation - Target specific predicate for whether a given
62   /// fixup requires the associated instruction to be relaxed.
fixupNeedsRelaxation(const MCFixup & Fixup,uint64_t Value,const MCRelaxableFragment * DF,const MCAsmLayout & Layout)63    bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
64                              const MCRelaxableFragment *DF,
65                              const MCAsmLayout &Layout) const override {
66     // FIXME.
67     llvm_unreachable("RelaxInstruction() unimplemented");
68     return false;
69   }
70 
71   /// RelaxInstruction - Relax the instruction in the given fragment
72   /// to the next wider instruction.
73   ///
74   /// \param Inst - The instruction to relax, which may be the same
75   /// as the output.
76   /// \param [out] Res On return, the relaxed instruction.
relaxInstruction(const MCInst & Inst,MCInst & Res)77   void relaxInstruction(const MCInst &Inst, MCInst &Res) const override {}
78 
79   /// @}
80 
81   bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override;
82 
83   void processFixupValue(const MCAssembler &Asm, const MCAsmLayout &Layout,
84                          const MCFixup &Fixup, const MCFragment *DF,
85                          const MCValue &Target, uint64_t &Value,
86                          bool &IsResolved) override;
87 
88 }; // class MipsAsmBackend
89 
90 } // namespace
91 
92 #endif
93