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Searched defs:ShiftAmt (Results 1 – 25 of 27) sorted by relevance

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/external/llvm/lib/Transforms/Scalar/
DBDCE.cpp158 uint64_t ShiftAmt = CI->getLimitedValue(BitWidth-1); in determineLiveOperandBits() local
174 uint64_t ShiftAmt = CI->getLimitedValue(BitWidth-1); in determineLiveOperandBits() local
187 uint64_t ShiftAmt = CI->getLimitedValue(BitWidth-1); in determineLiveOperandBits() local
DGVN.cpp1138 unsigned ShiftAmt; in GetStoreValueForLoad() local
/external/llvm/lib/Target/AArch64/
DAArch64ExpandPseudoInsts.cpp76 const unsigned ShiftAmt = ToIdx * 16; in replicateChunk() local
93 const unsigned ShiftAmt = ChunkIdx * 16; in tryOrrMovk() local
174 unsigned ShiftAmt = 0; in tryToreplicateChunks() local
DAArch64ISelDAGToDAG.cpp244 unsigned ShiftAmt; in SelectArithImmed() local
1703 uint64_t ShiftAmt = AArch64_AM::getShiftValue(ShiftTypeAndValue); in getUsefulBitsFromOrWithShiftedReg() local
1711 uint64_t ShiftAmt = AArch64_AM::getShiftValue(ShiftTypeAndValue); in getUsefulBitsFromOrWithShiftedReg() local
/external/llvm/lib/Transforms/InstCombine/
DInstCombineSimplifyDemanded.cpp651 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1); in SimplifyDemandedUseBits() local
675 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1); in SimplifyDemandedUseBits() local
716 uint32_t ShiftAmt = SA->getLimitedValue(BitWidth-1); in SimplifyDemandedUseBits() local
DInstCombineCasts.cpp567 uint32_t ShiftAmt = KnownZeroMask.logBase2(); in transformZExtICmp() local
709 uint64_t ShiftAmt = Amt->getZExtValue(); in CanEvaluateZExtd() local
944 unsigned ShiftAmt = KnownZeroMask.countTrailingZeros(); in transformSExtICmp() local
958 unsigned ShiftAmt = KnownZeroMask.countLeadingZeros(); in transformSExtICmp() local
/external/llvm/lib/Analysis/
DConstantFolding.cpp176 unsigned ShiftAmt = isLittleEndian ? 0 : SrcBitSize*(Ratio-1); in FoldBitCast() local
208 unsigned ShiftAmt = isLittleEndian ? 0 : DstBitSize*(Ratio-1); in FoldBitCast() local
DValueTracking.cpp1197 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth); in computeKnownBits() local
1208 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth); in computeKnownBits() local
1222 uint64_t ShiftAmt = SA->getLimitedValue(BitWidth-1); in computeKnownBits() local
/external/clang/lib/CodeGen/
DCGBuiltin.cpp1940 int ShiftAmt = cast<ConstantInt>(Shift)->getSExtValue(); in EmitNeonRShiftImm() local
2770 Constant *ShiftAmt = ConstantInt::get(SrcTy->getElementType(), in EmitCommonNeonBuiltinExpr() local
3089 Constant *ShiftAmt = ConstantInt::get(SrcTy->getElementType(), in EmitCommonNeonBuiltinExpr() local
4653 uint64_t ShiftAmt = Amt->getZExtValue(); in EmitAArch64BuiltinExpr() local
4670 uint64_t ShiftAmt = Amt->getZExtValue(); in EmitAArch64BuiltinExpr() local
/external/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp814 SDValue ShiftAmt = TLO.DAG.getConstant(BitWidth - ShAmt, ShiftAmtTy); in SimplifyDemandedBits() local
2874 unsigned ShiftAmt = VT.getSizeInBits() - HiLoVT.getSizeInBits(); in expandMUL() local
DDAGCombiner.cpp4393 signed ShiftAmt = N1C->getZExtValue() - N01C->getZExtValue(); in visitSRA() local
4551 uint64_t ShiftAmt = N1C->getZExtValue(); in visitSRL() local
/external/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp880 unsigned ShiftAmt = V.getConstantOperandVal(1); in getValueBits() local
896 unsigned ShiftAmt = V.getConstantOperandVal(1); in getValueBits() local
2399 SDValue ShiftAmt = in Select() local
DPPCISelLowering.cpp1238 unsigned ShiftAmt = SVOp->getMaskElt(i); in isVSLDOIShuffleMask() local
1428 unsigned ShiftAmt = SVOp->getMaskElt(i); in isQVALIGNIShuffleMask() local
10413 SDValue ShiftAmt = DAG.getConstant(Lg2, VT); in BuildSDIVPow2() local
/external/llvm/lib/Target/X86/
DX86ISelDAGToDAG.cpp846 unsigned ShiftAmt = Shift.getConstantOperandVal(1); in FoldMaskedShiftToScaledMask() local
906 unsigned ShiftAmt = Shift.getConstantOperandVal(1); in FoldMaskAndShiftToScale() local
DX86ISelLowering.cpp6694 int ShiftAmt = Shift * VT.getScalarSizeInBits() / (ByteShift ? 8 : 1); in lowerVectorShuffleAsShift() local
14520 SDValue SrcOp, uint64_t ShiftAmt, in getTargetVShiftByConstNode()
16093 uint64_t ShiftAmt = ShiftConst->getZExtValue(); in LowerScalarImmediateShift() local
16167 uint64_t ShiftAmt = 0; in LowerScalarImmediateShift() local
21908 APInt ShiftAmt = AmtSplat->getAPIntValue(); in performShiftToAllZeros() local
/external/llvm/lib/Target/NVPTX/
DNVPTXISelDAGToDAG.cpp4801 uint64_t ShiftAmt = ShiftCnst->getZExtValue(); in SelectBFE() local
DNVPTXISelLowering.cpp4132 APInt ShiftAmt = ShlRHS->getAPIntValue(); in TryMULWIDECombine() local
/external/llvm/lib/ExecutionEngine/Interpreter/
DExecution.cpp1563 unsigned ShiftAmt = isLittleEndian ? 0 : SrcBitSize * (Ratio - 1); in executeBitCastInst() local
1579 unsigned ShiftAmt = isLittleEndian ? 0 : DstBitSize * (Ratio - 1); in executeBitCastInst() local
/external/llvm/lib/Target/Mips/
DMipsFastISel.cpp1316 unsigned ShiftAmt; in emitIntSExt32r1() local
DMipsISelLowering.cpp1160 unsigned ShiftAmt = RegInfo.createVirtualRegister(RC); in emitAtomicBinaryPartword() local
1395 unsigned ShiftAmt = RegInfo.createVirtualRegister(RC); in emitAtomicCmpSwapPartword() local
/external/llvm/lib/Target/R600/
DAMDGPUISelLowering.cpp1457 SDValue ShiftAmt = DAG.getNode(ISD::SHL, DL, MVT::i32, ByteIdx, in LowerLOAD() local
1515 SDValue ShiftAmt = DAG.getNode(ISD::SHL, DL, MVT::i32, ByteIdx, in LowerSTORE() local
/external/llvm/lib/Support/
DAPInt.cpp2246 unsigned ShiftAmt = (Radix == 16 ? 4 : (Radix == 8 ? 3 : 1)); in toString() local
/external/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp2738 SDValue ShiftAmt = DAG.getConstant(63, VT); in LowerUMULO_SMULO() local
/external/llvm/lib/Transforms/Utils/
DSimplifyCFG.cpp3861 Value *ShiftAmt = Builder.CreateZExtOrTrunc(Index, MapTy, "switch.cast"); in BuildLookup() local
/external/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp3122 uint32_t ShiftAmt = 0, MaxShiftAmt = IsXReg ? 48 : 16; in parseOperand() local

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