1 //===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the LLVMTargetMachine class.
11 //
12 //===----------------------------------------------------------------------===//
13 
14 #include "llvm/Target/TargetMachine.h"
15 #include "llvm/Analysis/Passes.h"
16 #include "llvm/CodeGen/AsmPrinter.h"
17 #include "llvm/CodeGen/BasicTTIImpl.h"
18 #include "llvm/CodeGen/MachineFunctionAnalysis.h"
19 #include "llvm/CodeGen/MachineModuleInfo.h"
20 #include "llvm/CodeGen/Passes.h"
21 #include "llvm/IR/IRPrintingPasses.h"
22 #include "llvm/IR/LegacyPassManager.h"
23 #include "llvm/IR/Verifier.h"
24 #include "llvm/MC/MCAsmInfo.h"
25 #include "llvm/MC/MCContext.h"
26 #include "llvm/MC/MCInstrInfo.h"
27 #include "llvm/MC/MCStreamer.h"
28 #include "llvm/MC/MCSubtargetInfo.h"
29 #include "llvm/Support/CommandLine.h"
30 #include "llvm/Support/ErrorHandling.h"
31 #include "llvm/Support/FormattedStream.h"
32 #include "llvm/Support/TargetRegistry.h"
33 #include "llvm/Target/TargetLoweringObjectFile.h"
34 #include "llvm/Target/TargetOptions.h"
35 #include "llvm/Transforms/Scalar.h"
36 using namespace llvm;
37 
38 // Enable or disable FastISel. Both options are needed, because
39 // FastISel is enabled by default with -fast, and we wish to be
40 // able to enable or disable fast-isel independently from -O0.
41 static cl::opt<cl::boolOrDefault>
42 EnableFastISelOption("fast-isel", cl::Hidden,
43   cl::desc("Enable the \"fast\" instruction selector"));
44 
initAsmInfo()45 void LLVMTargetMachine::initAsmInfo() {
46   MRI = TheTarget.createMCRegInfo(getTargetTriple());
47   MII = TheTarget.createMCInstrInfo();
48   // FIXME: Having an MCSubtargetInfo on the target machine is a hack due
49   // to some backends having subtarget feature dependent module level
50   // code generation. This is similar to the hack in the AsmPrinter for
51   // module level assembly etc.
52   STI = TheTarget.createMCSubtargetInfo(getTargetTriple(), getTargetCPU(),
53                                         getTargetFeatureString());
54 
55   MCAsmInfo *TmpAsmInfo = TheTarget.createMCAsmInfo(*MRI, getTargetTriple());
56   // TargetSelect.h moved to a different directory between LLVM 2.9 and 3.0,
57   // and if the old one gets included then MCAsmInfo will be NULL and
58   // we'll crash later.
59   // Provide the user with a useful error message about what's wrong.
60   assert(TmpAsmInfo && "MCAsmInfo not initialized. "
61          "Make sure you include the correct TargetSelect.h"
62          "and that InitializeAllTargetMCs() is being invoked!");
63 
64   if (Options.DisableIntegratedAS)
65     TmpAsmInfo->setUseIntegratedAssembler(false);
66 
67   if (Options.CompressDebugSections)
68     TmpAsmInfo->setCompressDebugSections(true);
69 
70   AsmInfo = TmpAsmInfo;
71 }
72 
LLVMTargetMachine(const Target & T,StringRef DataLayoutString,StringRef Triple,StringRef CPU,StringRef FS,TargetOptions Options,Reloc::Model RM,CodeModel::Model CM,CodeGenOpt::Level OL)73 LLVMTargetMachine::LLVMTargetMachine(const Target &T,
74                                      StringRef DataLayoutString,
75                                      StringRef Triple, StringRef CPU,
76                                      StringRef FS, TargetOptions Options,
77                                      Reloc::Model RM, CodeModel::Model CM,
78                                      CodeGenOpt::Level OL)
79     : TargetMachine(T, DataLayoutString, Triple, CPU, FS, Options) {
80   CodeGenInfo = T.createMCCodeGenInfo(Triple, RM, CM, OL);
81 }
82 
getTargetIRAnalysis()83 TargetIRAnalysis LLVMTargetMachine::getTargetIRAnalysis() {
84   return TargetIRAnalysis([this](Function &F) {
85     return TargetTransformInfo(BasicTTIImpl(this, F));
86   });
87 }
88 
89 /// addPassesToX helper drives creation and initialization of TargetPassConfig.
addPassesToGenerateCode(LLVMTargetMachine * TM,PassManagerBase & PM,bool DisableVerify,AnalysisID StartAfter,AnalysisID StopAfter)90 static MCContext *addPassesToGenerateCode(LLVMTargetMachine *TM,
91                                           PassManagerBase &PM,
92                                           bool DisableVerify,
93                                           AnalysisID StartAfter,
94                                           AnalysisID StopAfter) {
95 
96   // Add internal analysis passes from the target machine.
97   PM.add(createTargetTransformInfoWrapperPass(TM->getTargetIRAnalysis()));
98 
99   // Targets may override createPassConfig to provide a target-specific
100   // subclass.
101   TargetPassConfig *PassConfig = TM->createPassConfig(PM);
102   PassConfig->setStartStopPasses(StartAfter, StopAfter);
103 
104   // Set PassConfig options provided by TargetMachine.
105   PassConfig->setDisableVerify(DisableVerify);
106 
107   PM.add(PassConfig);
108 
109   PassConfig->addIRPasses();
110 
111   PassConfig->addCodeGenPrepare();
112 
113   PassConfig->addPassesToHandleExceptions();
114 
115   PassConfig->addISelPrepare();
116 
117   // Install a MachineModuleInfo class, which is an immutable pass that holds
118   // all the per-module stuff we're generating, including MCContext.
119   MachineModuleInfo *MMI = new MachineModuleInfo(
120       *TM->getMCAsmInfo(), *TM->getMCRegisterInfo(), TM->getObjFileLowering());
121   PM.add(MMI);
122 
123   // Set up a MachineFunction for the rest of CodeGen to work on.
124   PM.add(new MachineFunctionAnalysis(*TM));
125 
126   // Enable FastISel with -fast, but allow that to be overridden.
127   if (EnableFastISelOption == cl::BOU_TRUE ||
128       (TM->getOptLevel() == CodeGenOpt::None &&
129        EnableFastISelOption != cl::BOU_FALSE))
130     TM->setFastISel(true);
131 
132   // Ask the target for an isel.
133   if (PassConfig->addInstSelector())
134     return nullptr;
135 
136   PassConfig->addMachinePasses();
137 
138   PassConfig->setInitialized();
139 
140   return &MMI->getContext();
141 }
142 
addPassesToEmitFile(PassManagerBase & PM,raw_pwrite_stream & Out,CodeGenFileType FileType,bool DisableVerify,AnalysisID StartAfter,AnalysisID StopAfter)143 bool LLVMTargetMachine::addPassesToEmitFile(
144     PassManagerBase &PM, raw_pwrite_stream &Out, CodeGenFileType FileType,
145     bool DisableVerify, AnalysisID StartAfter, AnalysisID StopAfter) {
146   // Add common CodeGen passes.
147   MCContext *Context = addPassesToGenerateCode(this, PM, DisableVerify,
148                                                StartAfter, StopAfter);
149   if (!Context)
150     return true;
151 
152   if (StopAfter) {
153     // FIXME: The intent is that this should eventually write out a YAML file,
154     // containing the LLVM IR, the machine-level IR (when stopping after a
155     // machine-level pass), and whatever other information is needed to
156     // deserialize the code and resume compilation.  For now, just write the
157     // LLVM IR.
158     PM.add(createPrintModulePass(Out));
159     return false;
160   }
161 
162   if (Options.MCOptions.MCSaveTempLabels)
163     Context->setAllowTemporaryLabels(false);
164 
165   const MCSubtargetInfo &STI = *getMCSubtargetInfo();
166   const MCAsmInfo &MAI = *getMCAsmInfo();
167   const MCRegisterInfo &MRI = *getMCRegisterInfo();
168   const MCInstrInfo &MII = *getMCInstrInfo();
169 
170   std::unique_ptr<MCStreamer> AsmStreamer;
171 
172   switch (FileType) {
173   case CGFT_AssemblyFile: {
174     MCInstPrinter *InstPrinter = getTarget().createMCInstPrinter(
175         Triple(getTargetTriple()), MAI.getAssemblerDialect(), MAI, MII, MRI);
176 
177     // Create a code emitter if asked to show the encoding.
178     MCCodeEmitter *MCE = nullptr;
179     if (Options.MCOptions.ShowMCEncoding)
180       MCE = getTarget().createMCCodeEmitter(MII, MRI, *Context);
181 
182     MCAsmBackend *MAB = getTarget().createMCAsmBackend(MRI, getTargetTriple(),
183                                                        TargetCPU);
184     auto FOut = llvm::make_unique<formatted_raw_ostream>(Out);
185     MCStreamer *S = getTarget().createAsmStreamer(
186         *Context, std::move(FOut), Options.MCOptions.AsmVerbose,
187         Options.MCOptions.MCUseDwarfDirectory, InstPrinter, MCE, MAB,
188         Options.MCOptions.ShowMCInst);
189     AsmStreamer.reset(S);
190     break;
191   }
192   case CGFT_ObjectFile: {
193     // Create the code emitter for the target if it exists.  If not, .o file
194     // emission fails.
195     MCCodeEmitter *MCE = getTarget().createMCCodeEmitter(MII, MRI, *Context);
196     MCAsmBackend *MAB = getTarget().createMCAsmBackend(MRI, getTargetTriple(),
197                                                        TargetCPU);
198     if (!MCE || !MAB)
199       return true;
200 
201     Triple T(getTargetTriple());
202     AsmStreamer.reset(getTarget().createMCObjectStreamer(
203         T, *Context, *MAB, Out, MCE, STI, Options.MCOptions.MCRelaxAll,
204         /*DWARFMustBeAtTheEnd*/ true));
205     break;
206   }
207   case CGFT_Null:
208     // The Null output is intended for use for performance analysis and testing,
209     // not real users.
210     AsmStreamer.reset(getTarget().createNullStreamer(*Context));
211     break;
212   }
213 
214   // Create the AsmPrinter, which takes ownership of AsmStreamer if successful.
215   FunctionPass *Printer =
216       getTarget().createAsmPrinter(*this, std::move(AsmStreamer));
217   if (!Printer)
218     return true;
219 
220   PM.add(Printer);
221 
222   return false;
223 }
224 
225 /// addPassesToEmitMC - Add passes to the specified pass manager to get
226 /// machine code emitted with the MCJIT. This method returns true if machine
227 /// code is not supported. It fills the MCContext Ctx pointer which can be
228 /// used to build custom MCStreamer.
229 ///
addPassesToEmitMC(PassManagerBase & PM,MCContext * & Ctx,raw_pwrite_stream & Out,bool DisableVerify)230 bool LLVMTargetMachine::addPassesToEmitMC(PassManagerBase &PM, MCContext *&Ctx,
231                                           raw_pwrite_stream &Out,
232                                           bool DisableVerify) {
233   // Add common CodeGen passes.
234   Ctx = addPassesToGenerateCode(this, PM, DisableVerify, nullptr, nullptr);
235   if (!Ctx)
236     return true;
237 
238   if (Options.MCOptions.MCSaveTempLabels)
239     Ctx->setAllowTemporaryLabels(false);
240 
241   // Create the code emitter for the target if it exists.  If not, .o file
242   // emission fails.
243   const MCRegisterInfo &MRI = *getMCRegisterInfo();
244   MCCodeEmitter *MCE =
245       getTarget().createMCCodeEmitter(*getMCInstrInfo(), MRI, *Ctx);
246   MCAsmBackend *MAB = getTarget().createMCAsmBackend(MRI, getTargetTriple(),
247                                                      TargetCPU);
248   if (!MCE || !MAB)
249     return true;
250 
251   Triple T(getTargetTriple());
252   const MCSubtargetInfo &STI = *getMCSubtargetInfo();
253   std::unique_ptr<MCStreamer> AsmStreamer(getTarget().createMCObjectStreamer(
254       T, *Ctx, *MAB, Out, MCE, STI, Options.MCOptions.MCRelaxAll,
255       /*DWARFMustBeAtTheEnd*/ true));
256 
257   // Create the AsmPrinter, which takes ownership of AsmStreamer if successful.
258   FunctionPass *Printer =
259       getTarget().createAsmPrinter(*this, std::move(AsmStreamer));
260   if (!Printer)
261     return true;
262 
263   PM.add(Printer);
264 
265   return false; // success!
266 }
267