1 /*
2 * Copyright © 2012 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "intel_fbo.h"
25
26 #include "brw_blorp.h"
27 #include "brw_defines.h"
28 #include "gen6_blorp.h"
29 #include "gen7_blorp.h"
30
brw_blorp_mip_info()31 brw_blorp_mip_info::brw_blorp_mip_info()
32 : mt(NULL),
33 width(0),
34 height(0),
35 x_offset(0),
36 y_offset(0)
37 {
38 }
39
brw_blorp_surface_info()40 brw_blorp_surface_info::brw_blorp_surface_info()
41 : map_stencil_as_y_tiled(false),
42 num_samples(0)
43 {
44 }
45
46 void
set(struct intel_mipmap_tree * mt,unsigned int level,unsigned int layer)47 brw_blorp_mip_info::set(struct intel_mipmap_tree *mt,
48 unsigned int level, unsigned int layer)
49 {
50 intel_miptree_check_level_layer(mt, level, layer);
51
52 this->mt = mt;
53 this->width = mt->level[level].width;
54 this->height = mt->level[level].height;
55
56 /* Construct a dummy renderbuffer just to extract tile offsets. */
57 struct intel_renderbuffer rb;
58 rb.mt = mt;
59 rb.mt_level = level;
60 rb.mt_layer = layer;
61 intel_renderbuffer_set_draw_offset(&rb);
62 x_offset = rb.draw_x;
63 y_offset = rb.draw_y;
64 }
65
66 void
set(struct brw_context * brw,struct intel_mipmap_tree * mt,unsigned int level,unsigned int layer)67 brw_blorp_surface_info::set(struct brw_context *brw,
68 struct intel_mipmap_tree *mt,
69 unsigned int level, unsigned int layer)
70 {
71 brw_blorp_mip_info::set(mt, level, layer);
72 this->num_samples = mt->num_samples;
73 this->array_spacing_lod0 = mt->array_spacing_lod0;
74 this->map_stencil_as_y_tiled = false;
75 this->msaa_layout = mt->msaa_layout;
76
77 switch (mt->format) {
78 case MESA_FORMAT_S8:
79 /* The miptree is a W-tiled stencil buffer. Surface states can't be set
80 * up for W tiling, so we'll need to use Y tiling and have the WM
81 * program swizzle the coordinates.
82 */
83 this->map_stencil_as_y_tiled = true;
84 this->brw_surfaceformat = BRW_SURFACEFORMAT_R8_UNORM;
85 break;
86 case MESA_FORMAT_X8_Z24:
87 case MESA_FORMAT_Z32_FLOAT:
88 /* The miptree consists of 32 bits per pixel, arranged either as 24-bit
89 * depth values interleaved with 8 "don't care" bits, or as 32-bit
90 * floating point depth values. Since depth values don't require any
91 * blending, it doesn't matter how we interpret the bit pattern as long
92 * as we copy the right amount of data, so just map it as 8-bit BGRA.
93 */
94 this->brw_surfaceformat = BRW_SURFACEFORMAT_B8G8R8A8_UNORM;
95 break;
96 case MESA_FORMAT_Z16:
97 /* The miptree consists of 16 bits per pixel of depth data. Since depth
98 * values don't require any blending, it doesn't matter how we interpret
99 * the bit pattern as long as we copy the right amount of data, so just
100 * map is as 8-bit RG.
101 */
102 this->brw_surfaceformat = BRW_SURFACEFORMAT_R8G8_UNORM;
103 break;
104 default:
105 /* Blorp blits don't support any sort of format conversion (except
106 * between sRGB and linear), so we can safely assume that the format is
107 * supported as a render target, even if this is the source image. So
108 * we can convert to a surface format using brw->render_target_format.
109 */
110 assert(brw->format_supported_as_render_target[mt->format]);
111 this->brw_surfaceformat = brw->render_target_format[mt->format];
112 break;
113 }
114 }
115
116
117 /**
118 * Split x_offset and y_offset into a base offset (in bytes) and a remaining
119 * x/y offset (in pixels). Note: we can't do this by calling
120 * intel_renderbuffer_tile_offsets(), because the offsets may have been
121 * adjusted to account for Y vs. W tiling differences. So we compute it
122 * directly from the adjusted offsets.
123 */
124 uint32_t
compute_tile_offsets(uint32_t * tile_x,uint32_t * tile_y) const125 brw_blorp_surface_info::compute_tile_offsets(uint32_t *tile_x,
126 uint32_t *tile_y) const
127 {
128 struct intel_region *region = mt->region;
129 uint32_t mask_x, mask_y;
130
131 intel_region_get_tile_masks(region, &mask_x, &mask_y,
132 map_stencil_as_y_tiled);
133
134 *tile_x = x_offset & mask_x;
135 *tile_y = y_offset & mask_y;
136
137 return intel_region_get_aligned_offset(region, x_offset & ~mask_x,
138 y_offset & ~mask_y,
139 map_stencil_as_y_tiled);
140 }
141
142
brw_blorp_params()143 brw_blorp_params::brw_blorp_params()
144 : x0(0),
145 y0(0),
146 x1(0),
147 y1(0),
148 depth_format(0),
149 hiz_op(GEN6_HIZ_OP_NONE),
150 num_samples(0),
151 use_wm_prog(false)
152 {
153 }
154
155 extern "C" {
156 void
intel_hiz_exec(struct intel_context * intel,struct intel_mipmap_tree * mt,unsigned int level,unsigned int layer,gen6_hiz_op op)157 intel_hiz_exec(struct intel_context *intel, struct intel_mipmap_tree *mt,
158 unsigned int level, unsigned int layer, gen6_hiz_op op)
159 {
160 brw_hiz_op_params params(mt, level, layer, op);
161 brw_blorp_exec(intel, ¶ms);
162 }
163
164 } /* extern "C" */
165
166 void
brw_blorp_exec(struct intel_context * intel,const brw_blorp_params * params)167 brw_blorp_exec(struct intel_context *intel, const brw_blorp_params *params)
168 {
169 switch (intel->gen) {
170 case 6:
171 gen6_blorp_exec(intel, params);
172 break;
173 case 7:
174 gen7_blorp_exec(intel, params);
175 break;
176 default:
177 /* BLORP is not supported before Gen6. */
178 assert(false);
179 break;
180 }
181 }
182
brw_hiz_op_params(struct intel_mipmap_tree * mt,unsigned int level,unsigned int layer,gen6_hiz_op op)183 brw_hiz_op_params::brw_hiz_op_params(struct intel_mipmap_tree *mt,
184 unsigned int level,
185 unsigned int layer,
186 gen6_hiz_op op)
187 {
188 this->hiz_op = op;
189
190 depth.set(mt, level, layer);
191 x1 = depth.width;
192 y1 = depth.height;
193
194 assert(mt->hiz_mt != NULL);
195
196 switch (mt->format) {
197 case MESA_FORMAT_Z16: depth_format = BRW_DEPTHFORMAT_D16_UNORM; break;
198 case MESA_FORMAT_Z32_FLOAT: depth_format = BRW_DEPTHFORMAT_D32_FLOAT; break;
199 case MESA_FORMAT_X8_Z24: depth_format = BRW_DEPTHFORMAT_D24_UNORM_X8_UINT; break;
200 default: assert(0); break;
201 }
202 }
203
204 uint32_t
get_wm_prog(struct brw_context * brw,brw_blorp_prog_data ** prog_data) const205 brw_hiz_op_params::get_wm_prog(struct brw_context *brw,
206 brw_blorp_prog_data **prog_data) const
207 {
208 return 0;
209 }
210