1 /******************************************************************************
2 *
3 * Copyright (C) 2012 Ittiam Systems Pvt Ltd, Bangalore
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at:
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 ******************************************************************************/
18 /**
19 *******************************************************************************
20 * @file
21 *  ihevcd_cxa.h
22 *
23 * @brief
24 *  This file contains all the necessary structure and  enumeration
25 * definitions needed for the Application  Program Interface(API) of the
26 * Ittiam HEVC decoder  on Cortex Ax
27 *
28 * @author
29 *  Harish
30 *
31 * @remarks
32 *  None
33 *
34 *******************************************************************************
35 */
36 #ifndef __IHEVCD_CXA_H__
37 #define __IHEVCD_CXA_H__
38 #ifdef __cplusplus
39 extern "C" {
40 #endif
41 #include "iv.h"
42 #include "ivd.h"
43 
44 
45 /*****************************************************************************/
46 /* Constant Macros                                                           */
47 /*****************************************************************************/
48 
49 /*****************************************************************************/
50 /* Function Macros                                                           */
51 /*****************************************************************************/
52 #define IS_IVD_CONCEALMENT_APPLIED(x)       (x & (1 << IVD_APPLIEDCONCEALMENT))
53 #define IS_IVD_INSUFFICIENTDATA_ERROR(x)    (x & (1 << IVD_INSUFFICIENTDATA))
54 #define IS_IVD_CORRUPTEDDATA_ERROR(x)       (x & (1 << IVD_CORRUPTEDDATA))
55 #define IS_IVD_CORRUPTEDHEADER_ERROR(x)     (x & (1 << IVD_CORRUPTEDHEADER))
56 #define IS_IVD_UNSUPPORTEDINPUT_ERROR(x)    (x & (1 << IVD_UNSUPPORTEDINPUT))
57 #define IS_IVD_UNSUPPORTEDPARAM_ERROR(x)    (x & (1 << IVD_UNSUPPORTEDPARAM))
58 #define IS_IVD_FATAL_ERROR(x)               (x & (1 << IVD_FATALERROR))
59 #define IS_IVD_INVALID_BITSTREAM_ERROR(x)   (x & (1 << IVD_INVALID_BITSTREAM))
60 #define IS_IVD_INCOMPLETE_BITSTREAM_ERROR(x) (x & (1 << IVD_INCOMPLETE_BITSTREAM))
61 
62 
63 /*****************************************************************************/
64 /* API Function Prototype                                                    */
65 /*****************************************************************************/
66 IV_API_CALL_STATUS_T ihevcd_cxa_api_function(iv_obj_t *ps_handle,
67                                              void *pv_api_ip,
68                                              void *pv_api_op);
69 
70 /*****************************************************************************/
71 /* Enums                                                                     */
72 /*****************************************************************************/
73 /* Codec Error codes for HEVC  Decoder                                       */
74 
75 
76 typedef enum {
77     /**
78      *  No error
79      */
80     IHEVCD_SUCCESS = 0,
81 
82     /**
83      *  Codec calls done without successful init
84      */
85     IHEVCD_INIT_NOT_DONE                        = IVD_DUMMY_ELEMENT_FOR_CODEC_EXTENSIONS,
86 
87 
88     IHEVCD_CXA_VID_HDR_DEC_NUM_FRM_BUF_NOT_SUFFICIENT,
89 
90     /**
91      *  Unsupported level passed as an argument
92      */
93     IHEVCD_LEVEL_UNSUPPORTED,
94     /**
95      *  Unsupported number of reference pictures passed as an argument
96      */
97     IHEVCD_NUM_REF_UNSUPPORTED,
98     /**
99      *  Unsupported number of reorder pictures passed as an argument
100      */
101     IHEVCD_NUM_REORDER_UNSUPPORTED,
102     /**
103      *  Unsupported number of extra display pictures passed as an argument
104      */
105     IHEVCD_NUM_EXTRA_DISP_UNSUPPORTED,
106     /**
107      *  Invalid display stride requested.
108      */
109     IHEVCD_INVALID_DISP_STRD,
110 
111     /**
112      * Reached end of sequence
113      */
114     IHEVCD_END_OF_SEQUENCE,
115 
116     /**
117      * Width/height greater than max width and max height
118      */
119     IHEVCD_UNSUPPORTED_DIMENSIONS,
120 
121     /**
122      *  Buffer size to hold version string is not sufficient
123      *  Allocate more to hold version string
124      */
125     IHEVCD_CXA_VERS_BUF_INSUFFICIENT,
126     /**
127      * Stream chroma format other than YUV420
128      */
129     IHEVCD_UNSUPPORTED_CHROMA_FMT_IDC,
130 
131     /**
132      * Generic failure
133      */
134     IHEVCD_FAIL                             = 0x7FFFFFFF
135 
136 
137 }IHEVCD_CXA_ERROR_CODES_T;
138 
139 /*****************************************************************************/
140 /* Extended Structures                                                       */
141 /*****************************************************************************/
142 
143 /*****************************************************************************/
144 /*  Get Number of Memory Records                                             */
145 /*****************************************************************************/
146 
147 
148 typedef struct {
149 
150     /**
151      * ivd_num_mem_rec_ip_t
152      */
153     iv_num_mem_rec_ip_t                    s_ivd_num_mem_rec_ip_t;
154 }ihevcd_cxa_num_mem_rec_ip_t;
155 
156 
157 typedef struct {
158 
159     /**
160      * ivd_num_mem_rec_op_t
161      */
162     iv_num_mem_rec_op_t                    s_ivd_num_mem_rec_op_t;
163 }ihevcd_cxa_num_mem_rec_op_t;
164 
165 
166 /*****************************************************************************/
167 /*  Fill Memory Records                                                      */
168 /*****************************************************************************/
169 
170 
171 typedef struct {
172     /**
173      * ivd_fill_mem_rec_ip_t
174      */
175     iv_fill_mem_rec_ip_t                    s_ivd_fill_mem_rec_ip_t;
176 
177     /**
178      * level
179      */
180     WORD32                                  i4_level;
181 
182     /**
183      * num_reorder_frames
184      */
185     UWORD32                                 u4_num_reorder_frames;
186 
187     /**
188      * num_ref_frames
189      */
190     UWORD32                                 u4_num_ref_frames;
191 
192     /**
193      * share_disp_buf
194      */
195     UWORD32                                 u4_share_disp_buf;
196 
197     /**
198      * format in which codec has to give out frame data for display
199      */
200     IV_COLOR_FORMAT_T                       e_output_format;
201 
202     /**
203      * Number of extra display buffers that will be allocated to handle display pipeline depth
204      */
205     UWORD32                                 u4_num_extra_disp_buf;
206 
207 }ihevcd_cxa_fill_mem_rec_ip_t;
208 
209 
210 typedef struct {
211 
212     /**
213      * ivd_fill_mem_rec_op_t
214      */
215 
216     iv_fill_mem_rec_op_t                   s_ivd_fill_mem_rec_op_t;
217 
218 }ihevcd_cxa_fill_mem_rec_op_t;
219 
220 /*****************************************************************************/
221 /*  Retrieve Memory Records                                                  */
222 /*****************************************************************************/
223 
224 
225 typedef struct {
226 
227     /**
228      * ivd_retrieve_mem_rec_ip_t
229      */
230     iv_retrieve_mem_rec_ip_t               s_ivd_retrieve_mem_rec_ip_t;
231 }ihevcd_cxa_retrieve_mem_rec_ip_t;
232 
233 
234 typedef struct {
235 
236     /**
237      * ivd_retrieve_mem_rec_op_t
238      */
239     iv_retrieve_mem_rec_op_t               s_ivd_retrieve_mem_rec_op_t;
240 }ihevcd_cxa_retrieve_mem_rec_op_t;
241 
242 
243 /*****************************************************************************/
244 /*   Initialize decoder                                                      */
245 /*****************************************************************************/
246 
247 
248 typedef struct {
249 
250     /**
251      * ivd_init_ip_t
252      */
253     ivd_init_ip_t                           s_ivd_init_ip_t;
254 
255     /**
256      * level
257      */
258     WORD32                                  i4_level;
259 
260     /**
261      * num_reorder_frames
262      */
263     UWORD32                                 u4_num_reorder_frames;
264 
265     /**
266      * num_ref_frames
267      */
268     UWORD32                                 u4_num_ref_frames;
269 
270     /**
271      * share_disp_buf
272      */
273     UWORD32                                 u4_share_disp_buf;
274 
275     /**
276      * Number of extra display buffers that will be allocated to handle display pipeline depth
277      */
278     UWORD32                                 u4_num_extra_disp_buf;
279 }ihevcd_cxa_init_ip_t;
280 
281 
282 typedef struct {
283 
284     /**
285      * ivd_init_op_t
286      */
287     ivd_init_op_t                           s_ivd_init_op_t;
288 }ihevcd_cxa_init_op_t;
289 
290 
291 /*****************************************************************************/
292 /*   Video Decode                                                            */
293 /*****************************************************************************/
294 
295 
296 typedef struct {
297 
298     /**
299      * ivd_video_decode_ip_t
300      */
301     ivd_video_decode_ip_t                   s_ivd_video_decode_ip_t;
302 }ihevcd_cxa_video_decode_ip_t;
303 
304 
305 typedef struct {
306 
307     /**
308      * ivd_video_decode_op_t
309      */
310     ivd_video_decode_op_t                   s_ivd_video_decode_op_t;
311 }ihevcd_cxa_video_decode_op_t;
312 
313 
314 /*****************************************************************************/
315 /*   Get Display Frame                                                       */
316 /*****************************************************************************/
317 
318 
319 typedef struct
320 {
321     /**
322      * ivd_get_display_frame_ip_t
323      */
324     ivd_get_display_frame_ip_t              s_ivd_get_display_frame_ip_t;
325 }ihevcd_cxa_get_display_frame_ip_t;
326 
327 
328 typedef struct
329 {
330     /**
331      * ivd_get_display_frame_op_t
332      */
333     ivd_get_display_frame_op_t              s_ivd_get_display_frame_op_t;
334 }ihevcd_cxa_get_display_frame_op_t;
335 
336 /*****************************************************************************/
337 /*   Set Display Frame                                                       */
338 /*****************************************************************************/
339 
340 
341 typedef struct
342 {
343     /**
344      * ivd_set_display_frame_ip_t
345      */
346     ivd_set_display_frame_ip_t              s_ivd_set_display_frame_ip_t;
347 }ihevcd_cxa_set_display_frame_ip_t;
348 
349 
350 typedef struct
351 {
352     /**
353      * ivd_set_display_frame_op_t
354      */
355     ivd_set_display_frame_op_t              s_ivd_set_display_frame_op_t;
356 }ihevcd_cxa_set_display_frame_op_t;
357 
358 /*****************************************************************************/
359 /*   Release Display Buffers                                                 */
360 /*****************************************************************************/
361 
362 
363 typedef struct
364 {
365     /**
366      * ivd_rel_display_frame_ip_t
367      */
368 
369     ivd_rel_display_frame_ip_t                  s_ivd_rel_display_frame_ip_t;
370 }ihevcd_cxa_rel_display_frame_ip_t;
371 
372 
373 typedef struct
374 {
375     /**
376      * ivd_rel_display_frame_op_t
377      */
378     ivd_rel_display_frame_op_t                  s_ivd_rel_display_frame_op_t;
379 }ihevcd_cxa_rel_display_frame_op_t;
380 
381 
382 typedef enum
383 {
384     /** Set number of cores/threads to be used */
385     IHEVCD_CXA_CMD_CTL_SET_NUM_CORES         = IVD_CMD_CTL_CODEC_SUBCMD_START,
386 
387     /** Set processor details */
388     IHEVCD_CXA_CMD_CTL_SET_PROCESSOR         = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x001,
389 
390     /** Get display buffer dimensions */
391     IHEVCD_CXA_CMD_CTL_GET_BUFFER_DIMENSIONS = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x100,
392 
393     /** Get VUI parameters */
394     IHEVCD_CXA_CMD_CTL_GET_VUI_PARAMS        = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x101,
395 
396     /** Enable/disable GPU, supported on select platforms */
397     IHEVCD_CXA_CMD_CTL_GPU_ENABLE_DISABLE    = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x200,
398 
399     /** Set degrade level */
400     IHEVCD_CXA_CMD_CTL_DEGRADE               = IVD_CMD_CTL_CODEC_SUBCMD_START + 0x300
401 }IHEVCD_CXA_CMD_CTL_SUB_CMDS;
402 /*****************************************************************************/
403 /*   Video control  Flush                                                    */
404 /*****************************************************************************/
405 
406 
407 typedef struct {
408 
409     /**
410      * ivd_ctl_flush_ip_t
411      */
412     ivd_ctl_flush_ip_t                      s_ivd_ctl_flush_ip_t;
413 }ihevcd_cxa_ctl_flush_ip_t;
414 
415 
416 typedef struct {
417 
418     /**
419      * ivd_ctl_flush_op_t
420      */
421     ivd_ctl_flush_op_t                      s_ivd_ctl_flush_op_t;
422 }ihevcd_cxa_ctl_flush_op_t;
423 
424 /*****************************************************************************/
425 /*   Video control reset                                                     */
426 /*****************************************************************************/
427 
428 
429 typedef struct {
430 
431     /**
432      * ivd_ctl_reset_ip_t
433      */
434     ivd_ctl_reset_ip_t                      s_ivd_ctl_reset_ip_t;
435 }ihevcd_cxa_ctl_reset_ip_t;
436 
437 
438 typedef struct {
439 
440     /**
441      * ivd_ctl_reset_op_t
442      */
443     ivd_ctl_reset_op_t                      s_ivd_ctl_reset_op_t;
444 }ihevcd_cxa_ctl_reset_op_t;
445 
446 
447 /*****************************************************************************/
448 /*   Video control  Set Params                                               */
449 /*****************************************************************************/
450 
451 
452 typedef struct {
453 
454     /**
455      *  ivd_ctl_set_config_ip_t
456      */
457     ivd_ctl_set_config_ip_t             s_ivd_ctl_set_config_ip_t;
458 }ihevcd_cxa_ctl_set_config_ip_t;
459 
460 
461 typedef struct {
462 
463     /**
464      * ivd_ctl_set_config_op_t
465      */
466     ivd_ctl_set_config_op_t             s_ivd_ctl_set_config_op_t;
467 }ihevcd_cxa_ctl_set_config_op_t;
468 
469 /*****************************************************************************/
470 /*   Video control:Get Buf Info                                              */
471 /*****************************************************************************/
472 
473 
474 typedef struct {
475 
476     /**
477      * ivd_ctl_getbufinfo_ip_t
478      */
479     ivd_ctl_getbufinfo_ip_t             s_ivd_ctl_getbufinfo_ip_t;
480 }ihevcd_cxa_ctl_getbufinfo_ip_t;
481 
482 
483 
484 typedef struct {
485 
486     /**
487      * ivd_ctl_getbufinfo_op_t
488      */
489     ivd_ctl_getbufinfo_op_t             s_ivd_ctl_getbufinfo_op_t;
490 }ihevcd_cxa_ctl_getbufinfo_op_t;
491 
492 
493 /*****************************************************************************/
494 /*   Video control:Getstatus Call                                            */
495 /*****************************************************************************/
496 
497 
498 typedef struct {
499 
500     /**
501      * ivd_ctl_getstatus_ip_t
502      */
503     ivd_ctl_getstatus_ip_t                  s_ivd_ctl_getstatus_ip_t;
504 }ihevcd_cxa_ctl_getstatus_ip_t;
505 
506 
507 
508 typedef struct {
509 
510     /**
511      * ivd_ctl_getstatus_op_t
512      */
513     ivd_ctl_getstatus_op_t                  s_ivd_ctl_getstatus_op_t;
514 
515     /**
516      * Height of the coding picture without cropping
517      */
518     UWORD32                  u4_coded_pic_ht;
519 
520     /**
521      * Width of the coding picture without cropping
522      */
523     UWORD32                  u4_coded_pic_wd;
524 }ihevcd_cxa_ctl_getstatus_op_t;
525 
526 
527 /*****************************************************************************/
528 /*   Video control:Get Version Info                                          */
529 /*****************************************************************************/
530 
531 
532 typedef struct {
533 
534     /**
535      *  ivd_ctl_getversioninfo_ip_t
536      */
537     ivd_ctl_getversioninfo_ip_t         s_ivd_ctl_getversioninfo_ip_t;
538 }ihevcd_cxa_ctl_getversioninfo_ip_t;
539 
540 
541 
542 typedef struct {
543 
544     /**
545      *  ivd_ctl_getversioninfo_op_t
546      */
547     ivd_ctl_getversioninfo_op_t         s_ivd_ctl_getversioninfo_op_t;
548 }ihevcd_cxa_ctl_getversioninfo_op_t;
549 
550 
551 typedef struct {
552 
553     /**
554      * u4_size
555      */
556     UWORD32                                     u4_size;
557 
558     /**
559      * cmd
560      */
561     IVD_API_COMMAND_TYPE_T                      e_cmd;
562 
563     /**
564      * sub_cmd
565      */
566     IVD_CONTROL_API_COMMAND_TYPE_T              e_sub_cmd;
567 
568     /**
569      * Pictures that are are degraded
570      * 0 : No degrade
571      * 1 : Only on non-reference frames
572      * 2 : Use interval specified by u4_nondegrade_interval
573      * 3 : All non-key frames
574      * 4 : All frames
575      */
576     WORD32                                     i4_degrade_pics;
577 
578     /**
579      * Interval for pictures which are completely decoded without any degradation
580      */
581     WORD32                                     i4_nondegrade_interval;
582 
583     /**
584      * bit position (lsb is zero): Type of degradation
585      * 0 : Disable SAO
586      * 1 : Disable deblocking
587      * 2 : Faster inter prediction filters
588      * 3 : Fastest inter prediction filters
589      */
590     WORD32                                     i4_degrade_type;
591 
592 }ihevcd_cxa_ctl_degrade_ip_t;
593 
594 typedef struct
595 {
596     /**
597      * u4_size
598      */
599     UWORD32                                     u4_size;
600 
601     /**
602      * error_code
603      */
604     UWORD32                                     u4_error_code;
605 }ihevcd_cxa_ctl_degrade_op_t;
606 
607 typedef struct
608 {
609 
610     /**
611      * size
612      */
613     UWORD32                                     u4_size;
614 
615     /**
616      * cmd
617      */
618     IVD_API_COMMAND_TYPE_T                      e_cmd;
619 
620     /**
621      * sub_cmd
622      */
623     IVD_CONTROL_API_COMMAND_TYPE_T              e_sub_cmd;
624 
625     /**
626      * num_cores
627      */
628     UWORD32                                     u4_num_cores;
629 }ihevcd_cxa_ctl_set_num_cores_ip_t;
630 
631 typedef struct
632 {
633 
634     /**
635      * size
636      */
637     UWORD32                                     u4_size;
638 
639     /**
640      * error_code
641      */
642     UWORD32                                     u4_error_code;
643 }ihevcd_cxa_ctl_set_num_cores_op_t;
644 
645 typedef struct
646 {
647     /**
648      * size
649      */
650     UWORD32                                     u4_size;
651     /**
652      * cmd
653      */
654     IVD_API_COMMAND_TYPE_T                      e_cmd;
655     /**
656      * sub cmd
657      */
658     IVD_CONTROL_API_COMMAND_TYPE_T              e_sub_cmd;
659     /**
660      * Processor type
661      */
662     UWORD32                                     u4_arch;
663     /**
664      * SOC type
665      */
666     UWORD32                                     u4_soc;
667 
668     /**
669      * num_cores
670      */
671     UWORD32                                     u4_num_cores;
672 
673 }ihevcd_cxa_ctl_set_processor_ip_t;
674 
675 typedef struct
676 {
677     /**
678      * size
679      */
680     UWORD32                                     u4_size;
681     /**
682      * error_code
683      */
684     UWORD32                                     u4_error_code;
685 }ihevcd_cxa_ctl_set_processor_op_t;
686 
687 typedef struct
688 {
689 
690     /**
691      * size
692      */
693     UWORD32                                     u4_size;
694 
695     /**
696      * cmd
697      */
698     IVD_API_COMMAND_TYPE_T                      e_cmd;
699 
700     /**
701      * sub cmd
702      */
703     IVD_CONTROL_API_COMMAND_TYPE_T              e_sub_cmd;
704 }ihevcd_cxa_ctl_get_frame_dimensions_ip_t;
705 
706 
707 typedef struct {
708 
709     /**
710      * size
711      */
712     UWORD32                                     u4_size;
713 
714     /**
715      * error_code
716      */
717     UWORD32                                     u4_error_code;
718 
719     /**
720      * x_offset[3]
721      */
722     UWORD32                                     u4_x_offset[3];
723 
724     /**
725      * y_offset[3]
726      */
727     UWORD32                                     u4_y_offset[3];
728 
729     /**
730      * disp_wd[3]
731      */
732     UWORD32                                     u4_disp_wd[3];
733 
734     /**
735      * disp_ht[3]
736      */
737     UWORD32                                     u4_disp_ht[3];
738 
739     /**
740      * buffer_wd[3]
741      */
742     UWORD32                                     u4_buffer_wd[3];
743 
744     /**
745      * buffer_ht[3]
746      */
747     UWORD32                                     u4_buffer_ht[3];
748 }ihevcd_cxa_ctl_get_frame_dimensions_op_t;
749 
750 typedef struct {
751     UWORD32                                     u4_size;
752     IVD_API_COMMAND_TYPE_T                      e_cmd;
753     IVD_CONTROL_API_COMMAND_TYPE_T              e_sub_cmd;
754 }ihevcd_cxa_ctl_get_vui_params_ip_t;
755 
756 typedef struct {
757     UWORD32                                     u4_size;
758     UWORD32                                     u4_error_code;
759 
760     /**
761     *  indicates the presence of aspect_ratio
762     */
763     UWORD8 u1_aspect_ratio_info_present_flag;
764 
765     /**
766     *  specifies the aspect ratio of the luma samples
767     */
768     UWORD8 u1_aspect_ratio_idc;
769 
770     /**
771     *  width of the luma samples. user dependent
772     */
773     UWORD16 u2_sar_width;
774 
775     /**
776     *  hieght of the luma samples. user dependent
777     */
778     UWORD16 u2_sar_height;
779 
780     /**
781     * if 1, specifies that the overscan_appropriate_flag is present
782     * if 0, the preferred display method for the video signal is unspecified
783     */
784     UWORD8 u1_overscan_info_present_flag;
785 
786     /**
787     * if 1,indicates that the cropped decoded pictures output
788     * are suitable for display using overscan
789     */
790     UWORD8 u1_overscan_appropriate_flag;
791 
792     /**
793     * if 1 specifies that video_format, video_full_range_flag and
794     * colour_description_present_flag are present
795     */
796     UWORD8 u1_video_signal_type_present_flag;
797 
798     /**
799     *
800     */
801     UWORD8 u1_video_format;
802 
803     /**
804     * indicates the black level and range of the luma and chroma signals
805     */
806     UWORD8 u1_video_full_range_flag;
807 
808     /**
809     * if 1,to 1 specifies that colour_primaries, transfer_characteristics
810     * and matrix_coefficients are present
811     */
812     UWORD8 u1_colour_description_present_flag;
813 
814     /**
815     * indicates the chromaticity coordinates of the source primaries
816     */
817     UWORD8 u1_colour_primaries;
818 
819     /**
820     * indicates the opto-electronic transfer characteristic of the source picture
821     */
822     UWORD8 u1_transfer_characteristics;
823 
824     /**
825     * the matrix coefficients used in deriving luma and chroma signals
826     * from the green, blue, and red primaries
827     */
828     UWORD8 u1_matrix_coefficients;
829 
830     /**
831     * if 1, specifies that chroma_sample_loc_type_top_field and
832     * chroma_sample_loc_type_bottom_field are present
833     */
834     UWORD8 u1_chroma_loc_info_present_flag;
835 
836     /**
837     * location of chroma samples
838     */
839     UWORD8 u1_chroma_sample_loc_type_top_field;
840 
841     UWORD8 u1_chroma_sample_loc_type_bottom_field;
842 
843     /**
844     * if 1, indicates that the value of all decoded chroma samples is
845     * equal to 1 << ( BitDepthC - 1 )
846     */
847     UWORD8 u1_neutral_chroma_indication_flag;
848 
849     /**
850     *  1 indicates that the coded video sequence conveys pictures that represent fields
851     *  0 indicates the pictures that represents field
852     */
853     UWORD8 u1_field_seq_flag;
854 
855     /**
856     * specifies that picture timing SEI messages are present for every picture
857     */
858     UWORD8 u1_frame_field_info_present_flag;
859 
860     /**
861     * 1 indicates that the default display window parameters follow next in the VUI
862     */
863     UWORD8 u1_default_display_window_flag;
864 
865     /**
866     * specify the samples of the pictures in the coded video sequence
867     * that are within the default display window,
868     * in terms of a rectangular region specified in picture coordinates for display
869     */
870     UWORD32 u4_def_disp_win_left_offset;
871 
872     UWORD32 u4_def_disp_win_right_offset;
873 
874     UWORD32 u4_def_disp_win_top_offset;
875 
876     UWORD32 u4_def_disp_win_bottom_offset;
877 
878     /**
879     *  to 1 specifies that the syntax structure hrd_parameters is present in the vui_parameters syntax structue
880     */
881     UWORD8 u1_vui_hrd_parameters_present_flag;
882 
883     /**
884     *   Indicates the presence of the
885     *   num_units_in_ticks, time_scale flag
886     */
887     UWORD8 u1_vui_timing_info_present_flag;
888 
889     /**
890     *   Number of units that
891     *   correspond to one increment of the
892     *   clock. Indicates the  resolution
893     */
894     UWORD32 u4_vui_num_units_in_tick;
895 
896     /**
897     *   The number of time units that pass in one second
898     */
899     UWORD32 u4_vui_time_scale;
900     /**
901     * if 1, indicates that the POC for each picture in the coded video sequence (cvs) (not the first picture), in decoding order,
902     * is proportional to the output time of the picture relative to that of the first picture in the cvs
903     */
904     UWORD8 u1_poc_proportional_to_timing_flag;
905 
906     /**
907     * num_ticks_poc_diff_one_minus1 plus 1 specifies the number of clock ticks
908     * corresponding to a difference of poc values equal to 1
909     */
910     UWORD8 u1_num_ticks_poc_diff_one_minus1;
911 
912     /**
913     * 1, specifies that the following cvs bitstream restriction parameters are present
914     */
915     UWORD8 u1_bitstream_restriction_flag;
916 
917     /**
918     *  if 1, indicates that each pps that is active in the cvs has
919     *  the same value of the tile syntax elements
920     */
921     UWORD8 u1_tiles_fixed_structure_flag;
922 
923     /**
924     * if 0, indicates that no pel outside the pic boundaries and
925     * no sub-pels derived using pels outside the pic boundaries is used for inter prediction
926     */
927     UWORD8 u1_motion_vectors_over_pic_boundaries_flag;
928 
929     /**
930     * if 1, indicates
931     * all P/B slices belonging to the same pic have an identical refpic list0,
932     * all B slices that belong to the same picture have an identical refpic list1.
933     */
934     UWORD8 u1_restricted_ref_pic_lists_flag;
935 
936     /**
937     *
938     */
939     UWORD8 u4_min_spatial_segmentation_idc;
940     /**
941     * Indicates a number of bytes not exceeded by the sum of the sizes of the VCL NAL units
942     * associated with any coded picture
943     */
944     UWORD8 u1_max_bytes_per_pic_denom;
945 
946     /**
947     *  Indicates an upper bound for the number of bits of coding_unit() data
948     */
949     UWORD8 u1_max_bits_per_mincu_denom;
950 
951     /**
952     * Indicate the maximum absolute value of a decoded horizontal MV component
953     * in quarter-pel luma units
954     */
955     UWORD8 u1_log2_max_mv_length_horizontal;
956 
957     /**
958     * Indicate the maximum absolute value of a decoded vertical MV component
959     * in quarter-pel luma units
960     */
961     UWORD8 u1_log2_max_mv_length_vertical;
962 
963     /**
964      * HRD parameters
965      */
966 
967 
968     /**
969     *   Indicates the presence of the
970     *   num_units_in_ticks, time_scale flag
971     */
972     UWORD8 u1_timing_info_present_flag;
973 
974     /**
975     *   Number of units that
976     *   correspond to one increment of the
977     *   clock. Indicates the  resolution
978     */
979     UWORD32 u4_num_units_in_tick;
980 
981     /**
982     *   The number of time units that pass in one second
983     */
984     UWORD32 u4_time_scale;
985 
986     /**
987     * Nal- hrd parameters flag
988     */
989     UWORD8 u1_nal_hrd_parameters_present_flag;
990 
991     /**
992     * VCL- hrd parameters flag
993     */
994     UWORD8 u1_vcl_hrd_parameters_present_flag;
995 
996     /**
997     * Indicates the presence of NAL-HRD params or VCL_HRD params
998     * in the bitstream
999     */
1000     UWORD8 u1_cpbdpb_delays_present_flag;
1001 
1002     /**
1003     * specifies that sub-picture level CPB removal delay parameters are
1004     * present in picture timing SEI messages
1005     */
1006     UWORD8 u1_sub_pic_cpb_params_present_flag;
1007 
1008     /**
1009     * specify the clock sub-tick
1010     * (the minimum interval of time that can be represented in the coded data when sub_pic_cpb_params_present_flag is equal to 1)
1011     */
1012     UWORD8 u1_tick_divisor_minus2;
1013 
1014     /**
1015     * specifies the length, in bits for the du cpb delay syntax in pt_sei
1016     */
1017     UWORD8 u1_du_cpb_removal_delay_increment_length_minus1;
1018 
1019     /**
1020     * Indicates presence of sub_pic_cpb_params in pic timing sei
1021     */
1022     UWORD8 u1_sub_pic_cpb_params_in_pic_timing_sei_flag;
1023 
1024     /**
1025      * Indicates dpb output delay for the du
1026      */
1027     UWORD8 u1_dpb_output_delay_du_length_minus1;
1028 
1029     /**
1030     * (together with bit_rate_value_minus1) specifies the
1031     * maximum input bit rate of the i-th CPB
1032     */
1033     UWORD8 u4_bit_rate_scale;
1034 
1035     /**
1036     * (together with cpb_size_du_value_minus1) specfies
1037     * CPB size of the i-th CPB when the CPB operates
1038     * at the access unit level
1039     */
1040     UWORD8 u4_cpb_size_scale;
1041 
1042     /**
1043     * (together with cpb_size_du_value_minus1) specfies
1044     * CPB size of the i-th CPB when the CPB operates
1045     * at the sub-picture level
1046     */
1047     UWORD8 u4_cpb_size_du_scale;
1048 
1049 
1050     /**
1051     * specifies the length, in bits for initial cpb delay (nal/vcl)sysntax in bp sei
1052     */
1053     UWORD8  u1_initial_cpb_removal_delay_length_minus1;
1054 
1055     /**
1056     * specifies the length, in bits for the au cpb delay syntax in pt_sei
1057     */
1058     UWORD8  u1_au_cpb_removal_delay_length_minus1;
1059 
1060     /**
1061     * specifies the length, in bits, of the pic_dpb_output_delay syntax element in the pt SEI message
1062     */
1063     UWORD8  u1_dpb_output_delay_length_minus1;
1064 
1065     /**
1066     * if 1, , for the highest temporal sub-layers, the temporal distance between the HRD output times
1067     *  of consecutive pictures in output order is constrained refer to Table E-6
1068     */
1069     UWORD8 au1_fixed_pic_rate_general_flag[6];
1070 
1071     UWORD8 au1_fixed_pic_rate_within_cvs_flag[6];
1072 
1073     /**
1074     * if 1, , for the highest temporal sub-layers, the temporal distance (in clock ticks) between the
1075     * element units that specify HRD output times of consecutive pictures in output order is constrained
1076     * refer to Table E-6
1077     */
1078     UWORD8 au1_elemental_duration_in_tc_minus1[6];
1079 
1080     /**
1081     * specifies the HRD operational mode
1082     */
1083     UWORD8 au1_low_delay_hrd_flag[6];
1084 
1085     /**
1086     * 1 specifies the number of alternative CPB specifications in the
1087     * bitstream of the cvs when HighestTid is equal to i
1088     */
1089     UWORD8 au1_cpb_cnt_minus1[6];
1090 }ihevcd_cxa_ctl_get_vui_params_op_t;
1091 
1092 #ifdef __cplusplus
1093 } /* closing brace for extern "C" */
1094 #endif
1095 #endif /* __IHEVCD_CXA_H__ */
1096