1 //===--- AArch64Subtarget.h - Define Subtarget for the AArch64 -*- C++ -*--===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file declares the AArch64 specific subclass of TargetSubtarget. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64SUBTARGET_H 15 #define LLVM_LIB_TARGET_AARCH64_AARCH64SUBTARGET_H 16 17 #include "AArch64FrameLowering.h" 18 #include "AArch64ISelLowering.h" 19 #include "AArch64InstrInfo.h" 20 #include "AArch64RegisterInfo.h" 21 #include "AArch64SelectionDAGInfo.h" 22 #include "llvm/IR/DataLayout.h" 23 #include "llvm/Target/TargetSubtargetInfo.h" 24 #include <string> 25 26 #define GET_SUBTARGETINFO_HEADER 27 #include "AArch64GenSubtargetInfo.inc" 28 29 namespace llvm { 30 class GlobalValue; 31 class StringRef; 32 33 class AArch64Subtarget : public AArch64GenSubtargetInfo { 34 protected: 35 enum ARMProcFamilyEnum {Others, CortexA53, CortexA57, Cyclone}; 36 37 /// ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others. 38 ARMProcFamilyEnum ARMProcFamily; 39 40 bool HasV8_1aOps; 41 42 bool HasFPARMv8; 43 bool HasNEON; 44 bool HasCrypto; 45 bool HasCRC; 46 47 // HasZeroCycleRegMove - Has zero-cycle register mov instructions. 48 bool HasZeroCycleRegMove; 49 50 // HasZeroCycleZeroing - Has zero-cycle zeroing instructions. 51 bool HasZeroCycleZeroing; 52 53 bool IsLittle; 54 55 /// CPUString - String name of used CPU. 56 std::string CPUString; 57 58 /// TargetTriple - What processor and OS we're targeting. 59 Triple TargetTriple; 60 61 AArch64FrameLowering FrameLowering; 62 AArch64InstrInfo InstrInfo; 63 AArch64SelectionDAGInfo TSInfo; 64 AArch64TargetLowering TLInfo; 65 private: 66 /// initializeSubtargetDependencies - Initializes using CPUString and the 67 /// passed in feature string so that we can use initializer lists for 68 /// subtarget initialization. 69 AArch64Subtarget &initializeSubtargetDependencies(StringRef FS); 70 71 public: 72 /// This constructor initializes the data members to match that 73 /// of the specified triple. 74 AArch64Subtarget(const std::string &TT, const std::string &CPU, 75 const std::string &FS, const TargetMachine &TM, 76 bool LittleEndian); 77 getSelectionDAGInfo()78 const AArch64SelectionDAGInfo *getSelectionDAGInfo() const override { 79 return &TSInfo; 80 } getFrameLowering()81 const AArch64FrameLowering *getFrameLowering() const override { 82 return &FrameLowering; 83 } getTargetLowering()84 const AArch64TargetLowering *getTargetLowering() const override { 85 return &TLInfo; 86 } getInstrInfo()87 const AArch64InstrInfo *getInstrInfo() const override { return &InstrInfo; } getRegisterInfo()88 const AArch64RegisterInfo *getRegisterInfo() const override { 89 return &getInstrInfo()->getRegisterInfo(); 90 } getTargetTriple()91 const Triple &getTargetTriple() const { return TargetTriple; } enableMachineScheduler()92 bool enableMachineScheduler() const override { return true; } enablePostMachineScheduler()93 bool enablePostMachineScheduler() const override { 94 return isCortexA53() || isCortexA57(); 95 } 96 hasV8_1aOps()97 bool hasV8_1aOps() const { return HasV8_1aOps; } 98 hasZeroCycleRegMove()99 bool hasZeroCycleRegMove() const { return HasZeroCycleRegMove; } 100 hasZeroCycleZeroing()101 bool hasZeroCycleZeroing() const { return HasZeroCycleZeroing; } 102 hasFPARMv8()103 bool hasFPARMv8() const { return HasFPARMv8; } hasNEON()104 bool hasNEON() const { return HasNEON; } hasCrypto()105 bool hasCrypto() const { return HasCrypto; } hasCRC()106 bool hasCRC() const { return HasCRC; } 107 isLittleEndian()108 bool isLittleEndian() const { return IsLittle; } 109 isTargetDarwin()110 bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); } isTargetIOS()111 bool isTargetIOS() const { return TargetTriple.isiOS(); } isTargetLinux()112 bool isTargetLinux() const { return TargetTriple.isOSLinux(); } isTargetWindows()113 bool isTargetWindows() const { return TargetTriple.isOSWindows(); } 114 isTargetCOFF()115 bool isTargetCOFF() const { return TargetTriple.isOSBinFormatCOFF(); } isTargetELF()116 bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); } isTargetMachO()117 bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); } 118 isCyclone()119 bool isCyclone() const { return CPUString == "cyclone"; } isCortexA57()120 bool isCortexA57() const { return CPUString == "cortex-a57"; } isCortexA53()121 bool isCortexA53() const { return CPUString == "cortex-a53"; } 122 useAA()123 bool useAA() const override { return isCortexA53(); } 124 125 /// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size 126 /// that still makes it profitable to inline the call. getMaxInlineSizeThreshold()127 unsigned getMaxInlineSizeThreshold() const { return 64; } 128 129 /// ParseSubtargetFeatures - Parses features string setting specified 130 /// subtarget options. Definition of function is auto generated by tblgen. 131 void ParseSubtargetFeatures(StringRef CPU, StringRef FS); 132 133 /// ClassifyGlobalReference - Find the target operand flags that describe 134 /// how a global value should be referenced for the current subtarget. 135 unsigned char ClassifyGlobalReference(const GlobalValue *GV, 136 const TargetMachine &TM) const; 137 138 /// This function returns the name of a function which has an interface 139 /// like the non-standard bzero function, if such a function exists on 140 /// the current subtarget and it is considered prefereable over 141 /// memset with zero passed as the second argument. Otherwise it 142 /// returns null. 143 const char *getBZeroEntry() const; 144 145 void overrideSchedPolicy(MachineSchedPolicy &Policy, MachineInstr *begin, 146 MachineInstr *end, 147 unsigned NumRegionInstrs) const override; 148 149 bool enableEarlyIfConversion() const override; 150 151 std::unique_ptr<PBQPRAConstraint> getCustomPBQPConstraints() const override; 152 }; 153 } // End llvm namespace 154 155 #endif 156