1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This class wraps target description classes used by the various code
11 // generation TableGen backends. This makes it easier to access the data and
12 // provides a single place that needs to check it for validity. All of these
13 // classes abort on error conditions.
14 //
15 //===----------------------------------------------------------------------===//
16
17 #include "CodeGenTarget.h"
18 #include "CodeGenIntrinsics.h"
19 #include "CodeGenSchedule.h"
20 #include "llvm/ADT/STLExtras.h"
21 #include "llvm/ADT/StringExtras.h"
22 #include "llvm/Support/CommandLine.h"
23 #include "llvm/TableGen/Error.h"
24 #include "llvm/TableGen/Record.h"
25 #include <algorithm>
26 using namespace llvm;
27
28 static cl::opt<unsigned>
29 AsmParserNum("asmparsernum", cl::init(0),
30 cl::desc("Make -gen-asm-parser emit assembly parser #N"));
31
32 static cl::opt<unsigned>
33 AsmWriterNum("asmwriternum", cl::init(0),
34 cl::desc("Make -gen-asm-writer emit assembly writer #N"));
35
36 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
37 /// record corresponds to.
getValueType(Record * Rec)38 MVT::SimpleValueType llvm::getValueType(Record *Rec) {
39 return (MVT::SimpleValueType)Rec->getValueAsInt("Value");
40 }
41
getName(MVT::SimpleValueType T)42 std::string llvm::getName(MVT::SimpleValueType T) {
43 switch (T) {
44 case MVT::Other: return "UNKNOWN";
45 case MVT::iPTR: return "TLI.getPointerTy()";
46 case MVT::iPTRAny: return "TLI.getPointerTy()";
47 default: return getEnumName(T);
48 }
49 }
50
getEnumName(MVT::SimpleValueType T)51 std::string llvm::getEnumName(MVT::SimpleValueType T) {
52 switch (T) {
53 case MVT::Other: return "MVT::Other";
54 case MVT::i1: return "MVT::i1";
55 case MVT::i8: return "MVT::i8";
56 case MVT::i16: return "MVT::i16";
57 case MVT::i32: return "MVT::i32";
58 case MVT::i64: return "MVT::i64";
59 case MVT::i128: return "MVT::i128";
60 case MVT::Any: return "MVT::Any";
61 case MVT::iAny: return "MVT::iAny";
62 case MVT::fAny: return "MVT::fAny";
63 case MVT::vAny: return "MVT::vAny";
64 case MVT::f16: return "MVT::f16";
65 case MVT::f32: return "MVT::f32";
66 case MVT::f64: return "MVT::f64";
67 case MVT::f80: return "MVT::f80";
68 case MVT::f128: return "MVT::f128";
69 case MVT::ppcf128: return "MVT::ppcf128";
70 case MVT::x86mmx: return "MVT::x86mmx";
71 case MVT::Glue: return "MVT::Glue";
72 case MVT::isVoid: return "MVT::isVoid";
73 case MVT::v2i1: return "MVT::v2i1";
74 case MVT::v4i1: return "MVT::v4i1";
75 case MVT::v8i1: return "MVT::v8i1";
76 case MVT::v16i1: return "MVT::v16i1";
77 case MVT::v32i1: return "MVT::v32i1";
78 case MVT::v64i1: return "MVT::v64i1";
79 case MVT::v1i8: return "MVT::v1i8";
80 case MVT::v2i8: return "MVT::v2i8";
81 case MVT::v4i8: return "MVT::v4i8";
82 case MVT::v8i8: return "MVT::v8i8";
83 case MVT::v16i8: return "MVT::v16i8";
84 case MVT::v32i8: return "MVT::v32i8";
85 case MVT::v64i8: return "MVT::v64i8";
86 case MVT::v1i16: return "MVT::v1i16";
87 case MVT::v2i16: return "MVT::v2i16";
88 case MVT::v4i16: return "MVT::v4i16";
89 case MVT::v8i16: return "MVT::v8i16";
90 case MVT::v16i16: return "MVT::v16i16";
91 case MVT::v32i16: return "MVT::v32i16";
92 case MVT::v1i32: return "MVT::v1i32";
93 case MVT::v2i32: return "MVT::v2i32";
94 case MVT::v4i32: return "MVT::v4i32";
95 case MVT::v8i32: return "MVT::v8i32";
96 case MVT::v16i32: return "MVT::v16i32";
97 case MVT::v1i64: return "MVT::v1i64";
98 case MVT::v2i64: return "MVT::v2i64";
99 case MVT::v4i64: return "MVT::v4i64";
100 case MVT::v8i64: return "MVT::v8i64";
101 case MVT::v16i64: return "MVT::v16i64";
102 case MVT::v2f16: return "MVT::v2f16";
103 case MVT::v4f16: return "MVT::v4f16";
104 case MVT::v8f16: return "MVT::v8f16";
105 case MVT::v1f32: return "MVT::v1f32";
106 case MVT::v2f32: return "MVT::v2f32";
107 case MVT::v4f32: return "MVT::v4f32";
108 case MVT::v8f32: return "MVT::v8f32";
109 case MVT::v16f32: return "MVT::v16f32";
110 case MVT::v1f64: return "MVT::v1f64";
111 case MVT::v2f64: return "MVT::v2f64";
112 case MVT::v4f64: return "MVT::v4f64";
113 case MVT::v8f64: return "MVT::v8f64";
114 case MVT::Metadata: return "MVT::Metadata";
115 case MVT::iPTR: return "MVT::iPTR";
116 case MVT::iPTRAny: return "MVT::iPTRAny";
117 case MVT::Untyped: return "MVT::Untyped";
118 default: llvm_unreachable("ILLEGAL VALUE TYPE!");
119 }
120 }
121
122 /// getQualifiedName - Return the name of the specified record, with a
123 /// namespace qualifier if the record contains one.
124 ///
getQualifiedName(const Record * R)125 std::string llvm::getQualifiedName(const Record *R) {
126 std::string Namespace;
127 if (R->getValue("Namespace"))
128 Namespace = R->getValueAsString("Namespace");
129 if (Namespace.empty()) return R->getName();
130 return Namespace + "::" + R->getName();
131 }
132
133
134 /// getTarget - Return the current instance of the Target class.
135 ///
CodeGenTarget(RecordKeeper & records)136 CodeGenTarget::CodeGenTarget(RecordKeeper &records)
137 : Records(records) {
138 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
139 if (Targets.size() == 0)
140 PrintFatalError("ERROR: No 'Target' subclasses defined!");
141 if (Targets.size() != 1)
142 PrintFatalError("ERROR: Multiple subclasses of Target defined!");
143 TargetRec = Targets[0];
144 }
145
~CodeGenTarget()146 CodeGenTarget::~CodeGenTarget() {
147 }
148
getName() const149 const std::string &CodeGenTarget::getName() const {
150 return TargetRec->getName();
151 }
152
getInstNamespace() const153 std::string CodeGenTarget::getInstNamespace() const {
154 for (const CodeGenInstruction *Inst : instructions()) {
155 // Make sure not to pick up "TargetOpcode" by accidentally getting
156 // the namespace off the PHI instruction or something.
157 if (Inst->Namespace != "TargetOpcode")
158 return Inst->Namespace;
159 }
160
161 return "";
162 }
163
getInstructionSet() const164 Record *CodeGenTarget::getInstructionSet() const {
165 return TargetRec->getValueAsDef("InstructionSet");
166 }
167
168
169 /// getAsmParser - Return the AssemblyParser definition for this target.
170 ///
getAsmParser() const171 Record *CodeGenTarget::getAsmParser() const {
172 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers");
173 if (AsmParserNum >= LI.size())
174 PrintFatalError("Target does not have an AsmParser #" +
175 Twine(AsmParserNum) + "!");
176 return LI[AsmParserNum];
177 }
178
179 /// getAsmParserVariant - Return the AssmblyParserVariant definition for
180 /// this target.
181 ///
getAsmParserVariant(unsigned i) const182 Record *CodeGenTarget::getAsmParserVariant(unsigned i) const {
183 std::vector<Record*> LI =
184 TargetRec->getValueAsListOfDefs("AssemblyParserVariants");
185 if (i >= LI.size())
186 PrintFatalError("Target does not have an AsmParserVariant #" + Twine(i) +
187 "!");
188 return LI[i];
189 }
190
191 /// getAsmParserVariantCount - Return the AssmblyParserVariant definition
192 /// available for this target.
193 ///
getAsmParserVariantCount() const194 unsigned CodeGenTarget::getAsmParserVariantCount() const {
195 std::vector<Record*> LI =
196 TargetRec->getValueAsListOfDefs("AssemblyParserVariants");
197 return LI.size();
198 }
199
200 /// getAsmWriter - Return the AssemblyWriter definition for this target.
201 ///
getAsmWriter() const202 Record *CodeGenTarget::getAsmWriter() const {
203 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
204 if (AsmWriterNum >= LI.size())
205 PrintFatalError("Target does not have an AsmWriter #" +
206 Twine(AsmWriterNum) + "!");
207 return LI[AsmWriterNum];
208 }
209
getRegBank() const210 CodeGenRegBank &CodeGenTarget::getRegBank() const {
211 if (!RegBank)
212 RegBank = llvm::make_unique<CodeGenRegBank>(Records);
213 return *RegBank;
214 }
215
ReadRegAltNameIndices() const216 void CodeGenTarget::ReadRegAltNameIndices() const {
217 RegAltNameIndices = Records.getAllDerivedDefinitions("RegAltNameIndex");
218 std::sort(RegAltNameIndices.begin(), RegAltNameIndices.end(), LessRecord());
219 }
220
221 /// getRegisterByName - If there is a register with the specific AsmName,
222 /// return it.
getRegisterByName(StringRef Name) const223 const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const {
224 const StringMap<CodeGenRegister*> &Regs = getRegBank().getRegistersByName();
225 StringMap<CodeGenRegister*>::const_iterator I = Regs.find(Name);
226 if (I == Regs.end())
227 return nullptr;
228 return I->second;
229 }
230
231 std::vector<MVT::SimpleValueType> CodeGenTarget::
getRegisterVTs(Record * R) const232 getRegisterVTs(Record *R) const {
233 const CodeGenRegister *Reg = getRegBank().getReg(R);
234 std::vector<MVT::SimpleValueType> Result;
235 for (const auto &RC : getRegBank().getRegClasses()) {
236 if (RC.contains(Reg)) {
237 ArrayRef<MVT::SimpleValueType> InVTs = RC.getValueTypes();
238 Result.insert(Result.end(), InVTs.begin(), InVTs.end());
239 }
240 }
241
242 // Remove duplicates.
243 array_pod_sort(Result.begin(), Result.end());
244 Result.erase(std::unique(Result.begin(), Result.end()), Result.end());
245 return Result;
246 }
247
248
ReadLegalValueTypes() const249 void CodeGenTarget::ReadLegalValueTypes() const {
250 for (const auto &RC : getRegBank().getRegClasses())
251 LegalValueTypes.insert(LegalValueTypes.end(), RC.VTs.begin(), RC.VTs.end());
252
253 // Remove duplicates.
254 std::sort(LegalValueTypes.begin(), LegalValueTypes.end());
255 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
256 LegalValueTypes.end()),
257 LegalValueTypes.end());
258 }
259
getSchedModels() const260 CodeGenSchedModels &CodeGenTarget::getSchedModels() const {
261 if (!SchedModels)
262 SchedModels = llvm::make_unique<CodeGenSchedModels>(Records, *this);
263 return *SchedModels;
264 }
265
ReadInstructions() const266 void CodeGenTarget::ReadInstructions() const {
267 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
268 if (Insts.size() <= 2)
269 PrintFatalError("No 'Instruction' subclasses defined!");
270
271 // Parse the instructions defined in the .td file.
272 for (unsigned i = 0, e = Insts.size(); i != e; ++i)
273 Instructions[Insts[i]] = llvm::make_unique<CodeGenInstruction>(Insts[i]);
274 }
275
276 static const CodeGenInstruction *
GetInstByName(const char * Name,const DenseMap<const Record *,std::unique_ptr<CodeGenInstruction>> & Insts,RecordKeeper & Records)277 GetInstByName(const char *Name,
278 const DenseMap<const Record*,
279 std::unique_ptr<CodeGenInstruction>> &Insts,
280 RecordKeeper &Records) {
281 const Record *Rec = Records.getDef(Name);
282
283 const auto I = Insts.find(Rec);
284 if (!Rec || I == Insts.end())
285 PrintFatalError(Twine("Could not find '") + Name + "' instruction!");
286 return I->second.get();
287 }
288
289 /// \brief Return all of the instructions defined by the target, ordered by
290 /// their enum value.
ComputeInstrsByEnum() const291 void CodeGenTarget::ComputeInstrsByEnum() const {
292 // The ordering here must match the ordering in TargetOpcodes.h.
293 static const char *const FixedInstrs[] = {
294 "PHI", "INLINEASM", "CFI_INSTRUCTION", "EH_LABEL",
295 "GC_LABEL", "KILL", "EXTRACT_SUBREG", "INSERT_SUBREG",
296 "IMPLICIT_DEF", "SUBREG_TO_REG", "COPY_TO_REGCLASS", "DBG_VALUE",
297 "REG_SEQUENCE", "COPY", "BUNDLE", "LIFETIME_START",
298 "LIFETIME_END", "STACKMAP", "PATCHPOINT", "LOAD_STACK_GUARD",
299 "STATEPOINT", "FRAME_ALLOC",
300 nullptr};
301 const auto &Insts = getInstructions();
302 for (const char *const *p = FixedInstrs; *p; ++p) {
303 const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records);
304 assert(Instr && "Missing target independent instruction");
305 assert(Instr->Namespace == "TargetOpcode" && "Bad namespace");
306 InstrsByEnum.push_back(Instr);
307 }
308 unsigned EndOfPredefines = InstrsByEnum.size();
309
310 for (const auto &I : Insts) {
311 const CodeGenInstruction *CGI = I.second.get();
312 if (CGI->Namespace != "TargetOpcode")
313 InstrsByEnum.push_back(CGI);
314 }
315
316 assert(InstrsByEnum.size() == Insts.size() && "Missing predefined instr");
317
318 // All of the instructions are now in random order based on the map iteration.
319 // Sort them by name.
320 std::sort(InstrsByEnum.begin() + EndOfPredefines, InstrsByEnum.end(),
321 [](const CodeGenInstruction *Rec1, const CodeGenInstruction *Rec2) {
322 return Rec1->TheDef->getName() < Rec2->TheDef->getName();
323 });
324 }
325
326
327 /// isLittleEndianEncoding - Return whether this target encodes its instruction
328 /// in little-endian format, i.e. bits laid out in the order [0..n]
329 ///
isLittleEndianEncoding() const330 bool CodeGenTarget::isLittleEndianEncoding() const {
331 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
332 }
333
334 /// reverseBitsForLittleEndianEncoding - For little-endian instruction bit
335 /// encodings, reverse the bit order of all instructions.
reverseBitsForLittleEndianEncoding()336 void CodeGenTarget::reverseBitsForLittleEndianEncoding() {
337 if (!isLittleEndianEncoding())
338 return;
339
340 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
341 for (Record *R : Insts) {
342 if (R->getValueAsString("Namespace") == "TargetOpcode" ||
343 R->getValueAsBit("isPseudo"))
344 continue;
345
346 BitsInit *BI = R->getValueAsBitsInit("Inst");
347
348 unsigned numBits = BI->getNumBits();
349
350 SmallVector<Init *, 16> NewBits(numBits);
351
352 for (unsigned bit = 0, end = numBits / 2; bit != end; ++bit) {
353 unsigned bitSwapIdx = numBits - bit - 1;
354 Init *OrigBit = BI->getBit(bit);
355 Init *BitSwap = BI->getBit(bitSwapIdx);
356 NewBits[bit] = BitSwap;
357 NewBits[bitSwapIdx] = OrigBit;
358 }
359 if (numBits % 2) {
360 unsigned middle = (numBits + 1) / 2;
361 NewBits[middle] = BI->getBit(middle);
362 }
363
364 BitsInit *NewBI = BitsInit::get(NewBits);
365
366 // Update the bits in reversed order so that emitInstrOpBits will get the
367 // correct endianness.
368 R->getValue("Inst")->setValue(NewBI);
369 }
370 }
371
372 /// guessInstructionProperties - Return true if it's OK to guess instruction
373 /// properties instead of raising an error.
374 ///
375 /// This is configurable as a temporary migration aid. It will eventually be
376 /// permanently false.
guessInstructionProperties() const377 bool CodeGenTarget::guessInstructionProperties() const {
378 return getInstructionSet()->getValueAsBit("guessInstructionProperties");
379 }
380
381 //===----------------------------------------------------------------------===//
382 // ComplexPattern implementation
383 //
ComplexPattern(Record * R)384 ComplexPattern::ComplexPattern(Record *R) {
385 Ty = ::getValueType(R->getValueAsDef("Ty"));
386 NumOperands = R->getValueAsInt("NumOperands");
387 SelectFunc = R->getValueAsString("SelectFunc");
388 RootNodes = R->getValueAsListOfDefs("RootNodes");
389
390 // Parse the properties.
391 Properties = 0;
392 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
393 for (unsigned i = 0, e = PropList.size(); i != e; ++i)
394 if (PropList[i]->getName() == "SDNPHasChain") {
395 Properties |= 1 << SDNPHasChain;
396 } else if (PropList[i]->getName() == "SDNPOptInGlue") {
397 Properties |= 1 << SDNPOptInGlue;
398 } else if (PropList[i]->getName() == "SDNPMayStore") {
399 Properties |= 1 << SDNPMayStore;
400 } else if (PropList[i]->getName() == "SDNPMayLoad") {
401 Properties |= 1 << SDNPMayLoad;
402 } else if (PropList[i]->getName() == "SDNPSideEffect") {
403 Properties |= 1 << SDNPSideEffect;
404 } else if (PropList[i]->getName() == "SDNPMemOperand") {
405 Properties |= 1 << SDNPMemOperand;
406 } else if (PropList[i]->getName() == "SDNPVariadic") {
407 Properties |= 1 << SDNPVariadic;
408 } else if (PropList[i]->getName() == "SDNPWantRoot") {
409 Properties |= 1 << SDNPWantRoot;
410 } else if (PropList[i]->getName() == "SDNPWantParent") {
411 Properties |= 1 << SDNPWantParent;
412 } else {
413 errs() << "Unsupported SD Node property '" << PropList[i]->getName()
414 << "' on ComplexPattern '" << R->getName() << "'!\n";
415 exit(1);
416 }
417 }
418
419 //===----------------------------------------------------------------------===//
420 // CodeGenIntrinsic Implementation
421 //===----------------------------------------------------------------------===//
422
LoadIntrinsics(const RecordKeeper & RC,bool TargetOnly)423 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC,
424 bool TargetOnly) {
425 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic");
426
427 std::vector<CodeGenIntrinsic> Result;
428
429 for (unsigned i = 0, e = I.size(); i != e; ++i) {
430 bool isTarget = I[i]->getValueAsBit("isTarget");
431 if (isTarget == TargetOnly)
432 Result.push_back(CodeGenIntrinsic(I[i]));
433 }
434 return Result;
435 }
436
CodeGenIntrinsic(Record * R)437 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
438 TheDef = R;
439 std::string DefName = R->getName();
440 ModRef = ReadWriteMem;
441 isOverloaded = false;
442 isCommutative = false;
443 canThrow = false;
444 isNoReturn = false;
445 isNoDuplicate = false;
446
447 if (DefName.size() <= 4 ||
448 std::string(DefName.begin(), DefName.begin() + 4) != "int_")
449 PrintFatalError("Intrinsic '" + DefName + "' does not start with 'int_'!");
450
451 EnumName = std::string(DefName.begin()+4, DefName.end());
452
453 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field.
454 GCCBuiltinName = R->getValueAsString("GCCBuiltinName");
455 if (R->getValue("MSBuiltinName")) // Ignore a missing MSBuiltinName field.
456 MSBuiltinName = R->getValueAsString("MSBuiltinName");
457
458 TargetPrefix = R->getValueAsString("TargetPrefix");
459 Name = R->getValueAsString("LLVMName");
460
461 if (Name == "") {
462 // If an explicit name isn't specified, derive one from the DefName.
463 Name = "llvm.";
464
465 for (unsigned i = 0, e = EnumName.size(); i != e; ++i)
466 Name += (EnumName[i] == '_') ? '.' : EnumName[i];
467 } else {
468 // Verify it starts with "llvm.".
469 if (Name.size() <= 5 ||
470 std::string(Name.begin(), Name.begin() + 5) != "llvm.")
471 PrintFatalError("Intrinsic '" + DefName + "'s name does not start with 'llvm.'!");
472 }
473
474 // If TargetPrefix is specified, make sure that Name starts with
475 // "llvm.<targetprefix>.".
476 if (!TargetPrefix.empty()) {
477 if (Name.size() < 6+TargetPrefix.size() ||
478 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size())
479 != (TargetPrefix + "."))
480 PrintFatalError("Intrinsic '" + DefName + "' does not start with 'llvm." +
481 TargetPrefix + ".'!");
482 }
483
484 // Parse the list of return types.
485 std::vector<MVT::SimpleValueType> OverloadedVTs;
486 ListInit *TypeList = R->getValueAsListInit("RetTypes");
487 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
488 Record *TyEl = TypeList->getElementAsRecord(i);
489 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
490 MVT::SimpleValueType VT;
491 if (TyEl->isSubClassOf("LLVMMatchType")) {
492 unsigned MatchTy = TyEl->getValueAsInt("Number");
493 assert(MatchTy < OverloadedVTs.size() &&
494 "Invalid matching number!");
495 VT = OverloadedVTs[MatchTy];
496 // It only makes sense to use the extended and truncated vector element
497 // variants with iAny types; otherwise, if the intrinsic is not
498 // overloaded, all the types can be specified directly.
499 assert(((!TyEl->isSubClassOf("LLVMExtendedType") &&
500 !TyEl->isSubClassOf("LLVMTruncatedType")) ||
501 VT == MVT::iAny || VT == MVT::vAny) &&
502 "Expected iAny or vAny type");
503 } else {
504 VT = getValueType(TyEl->getValueAsDef("VT"));
505 }
506 if (MVT(VT).isOverloaded()) {
507 OverloadedVTs.push_back(VT);
508 isOverloaded = true;
509 }
510
511 // Reject invalid types.
512 if (VT == MVT::isVoid)
513 PrintFatalError("Intrinsic '" + DefName + " has void in result type list!");
514
515 IS.RetVTs.push_back(VT);
516 IS.RetTypeDefs.push_back(TyEl);
517 }
518
519 // Parse the list of parameter types.
520 TypeList = R->getValueAsListInit("ParamTypes");
521 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
522 Record *TyEl = TypeList->getElementAsRecord(i);
523 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
524 MVT::SimpleValueType VT;
525 if (TyEl->isSubClassOf("LLVMMatchType")) {
526 unsigned MatchTy = TyEl->getValueAsInt("Number");
527 assert(MatchTy < OverloadedVTs.size() &&
528 "Invalid matching number!");
529 VT = OverloadedVTs[MatchTy];
530 // It only makes sense to use the extended and truncated vector element
531 // variants with iAny types; otherwise, if the intrinsic is not
532 // overloaded, all the types can be specified directly.
533 assert(((!TyEl->isSubClassOf("LLVMExtendedType") &&
534 !TyEl->isSubClassOf("LLVMTruncatedType") &&
535 !TyEl->isSubClassOf("LLVMVectorSameWidth") &&
536 !TyEl->isSubClassOf("LLVMPointerToElt")) ||
537 VT == MVT::iAny || VT == MVT::vAny) &&
538 "Expected iAny or vAny type");
539 } else
540 VT = getValueType(TyEl->getValueAsDef("VT"));
541
542 if (MVT(VT).isOverloaded()) {
543 OverloadedVTs.push_back(VT);
544 isOverloaded = true;
545 }
546
547 // Reject invalid types.
548 if (VT == MVT::isVoid && i != e-1 /*void at end means varargs*/)
549 PrintFatalError("Intrinsic '" + DefName + " has void in result type list!");
550
551 IS.ParamVTs.push_back(VT);
552 IS.ParamTypeDefs.push_back(TyEl);
553 }
554
555 // Parse the intrinsic properties.
556 ListInit *PropList = R->getValueAsListInit("Properties");
557 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) {
558 Record *Property = PropList->getElementAsRecord(i);
559 assert(Property->isSubClassOf("IntrinsicProperty") &&
560 "Expected a property!");
561
562 if (Property->getName() == "IntrNoMem")
563 ModRef = NoMem;
564 else if (Property->getName() == "IntrReadArgMem")
565 ModRef = ReadArgMem;
566 else if (Property->getName() == "IntrReadMem")
567 ModRef = ReadMem;
568 else if (Property->getName() == "IntrReadWriteArgMem")
569 ModRef = ReadWriteArgMem;
570 else if (Property->getName() == "Commutative")
571 isCommutative = true;
572 else if (Property->getName() == "Throws")
573 canThrow = true;
574 else if (Property->getName() == "IntrNoDuplicate")
575 isNoDuplicate = true;
576 else if (Property->getName() == "IntrNoReturn")
577 isNoReturn = true;
578 else if (Property->isSubClassOf("NoCapture")) {
579 unsigned ArgNo = Property->getValueAsInt("ArgNo");
580 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture));
581 } else if (Property->isSubClassOf("ReadOnly")) {
582 unsigned ArgNo = Property->getValueAsInt("ArgNo");
583 ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadOnly));
584 } else if (Property->isSubClassOf("ReadNone")) {
585 unsigned ArgNo = Property->getValueAsInt("ArgNo");
586 ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadNone));
587 } else
588 llvm_unreachable("Unknown property!");
589 }
590
591 // Sort the argument attributes for later benefit.
592 std::sort(ArgumentAttributes.begin(), ArgumentAttributes.end());
593 }
594