| /art/compiler/utils/arm/ |
| D | assembler_arm32.cc | 59 void Arm32Assembler::and_(Register rd, Register rn, const ShifterOperand& so, in and_()
65 void Arm32Assembler::eor(Register rd, Register rn, const ShifterOperand& so, in eor()
71 void Arm32Assembler::sub(Register rd, Register rn, const ShifterOperand& so, in sub()
76 void Arm32Assembler::rsb(Register rd, Register rn, const ShifterOperand& so, in rsb()
81 void Arm32Assembler::rsbs(Register rd, Register rn, const ShifterOperand& so, in rsbs()
87 void Arm32Assembler::add(Register rd, Register rn, const ShifterOperand& so, in add()
93 void Arm32Assembler::adds(Register rd, Register rn, const ShifterOperand& so, in adds()
99 void Arm32Assembler::subs(Register rd, Register rn, const ShifterOperand& so, in subs()
105 void Arm32Assembler::adc(Register rd, Register rn, const ShifterOperand& so, in adc()
111 void Arm32Assembler::sbc(Register rd, Register rn, const ShifterOperand& so, in sbc()
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| D | assembler_thumb2.cc | 54 void Thumb2Assembler::and_(Register rd, Register rn, const ShifterOperand& so, in and_()
60 void Thumb2Assembler::eor(Register rd, Register rn, const ShifterOperand& so, in eor()
66 void Thumb2Assembler::sub(Register rd, Register rn, const ShifterOperand& so, in sub()
72 void Thumb2Assembler::rsb(Register rd, Register rn, const ShifterOperand& so, in rsb()
78 void Thumb2Assembler::rsbs(Register rd, Register rn, const ShifterOperand& so, in rsbs()
84 void Thumb2Assembler::add(Register rd, Register rn, const ShifterOperand& so, in add()
90 void Thumb2Assembler::adds(Register rd, Register rn, const ShifterOperand& so, in adds()
96 void Thumb2Assembler::subs(Register rd, Register rn, const ShifterOperand& so, in subs()
102 void Thumb2Assembler::adc(Register rd, Register rn, const ShifterOperand& so, in adc()
108 void Thumb2Assembler::sbc(Register rd, Register rn, const ShifterOperand& so, in sbc()
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64.cc | 33 void Mips64Assembler::EmitR(int opcode, GpuRegister rs, GpuRegister rt, GpuRegister rd, in EmitR()
94 void Mips64Assembler::Add(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in Add()
102 void Mips64Assembler::Addu(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in Addu()
110 void Mips64Assembler::Daddu(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in Daddu()
118 void Mips64Assembler::Sub(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in Sub()
122 void Mips64Assembler::Subu(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in Subu()
126 void Mips64Assembler::Dsubu(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in Dsubu()
146 void Mips64Assembler::MulR2(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in MulR2()
150 void Mips64Assembler::DivR2(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in DivR2()
155 void Mips64Assembler::ModR2(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in ModR2()
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| /art/compiler/utils/mips/ |
| D | assembler_mips.cc | 42 void MipsAssembler::EmitR(int opcode, Register rs, Register rt, Register rd, int shamt, int funct) { in EmitR()
163 void MipsAssembler::Add(Register rd, Register rs, Register rt) { in Add()
167 void MipsAssembler::Addu(Register rd, Register rs, Register rt) { in Addu()
179 void MipsAssembler::Sub(Register rd, Register rs, Register rt) { in Sub()
183 void MipsAssembler::Subu(Register rd, Register rs, Register rt) { in Subu()
203 void MipsAssembler::And(Register rd, Register rs, Register rt) { in And()
211 void MipsAssembler::Or(Register rd, Register rs, Register rt) { in Or()
219 void MipsAssembler::Xor(Register rd, Register rs, Register rt) { in Xor()
227 void MipsAssembler::Nor(Register rd, Register rs, Register rt) { in Nor()
231 void MipsAssembler::Sll(Register rd, Register rs, int shamt) { in Sll()
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| /art/disassembler/ |
| D | disassembler_mips.cc | 325 uint32_t rd = (instruction >> 11) & 0x1f; // R-type. in Dump() local
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| D | disassembler_arm.cc | 1749 ThumbRegister rd(instr, 8); in DumpThumb16() local
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| /art/compiler/utils/arm64/ |
| D | assembler_arm64.cc | 75 void Arm64Assembler::AddConstant(XRegister rd, int32_t value, Condition cond) { in AddConstant()
79 void Arm64Assembler::AddConstant(XRegister rd, XRegister rn, int32_t value, in AddConstant()
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| /art/compiler/utils/x86_64/ |
| D | assembler_x86_64_test.cc | 53 std::random_device rd; in TEST() local
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