| /external/llvm/test/MC/MachO/ |
| D | bad-macro.s | 5 .macro test_macro reg1, reg2
|
| /external/libavc/common/armv8/ |
| D | ih264_neon_macros.s | 36 .macro swp reg1, reg2
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| /external/libmpeg2/common/armv8/ |
| D | impeg2_neon_macros.s | 53 .macro swp reg1, reg2
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| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| D | r200_fragshader.c | 49 GLuint reg2 = 0; in r200SetFragShaderArg() local
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.cpp | 150 bool haveSameParity(unsigned reg1, unsigned reg2) { in haveSameParity()
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| /external/vixl/src/vixl/a64/ |
| D | macro-assembler-a64.cc | 2437 const Register& reg2, in Include()
2450 const FPRegister& reg2, in Include()
2469 const Register& reg2, in Exclude()
2478 const FPRegister& reg2, in Exclude()
2487 const CPURegister& reg2, in Exclude()
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| D | assembler-a64.cc | 5362 bool AreAliased(const CPURegister& reg1, const CPURegister& reg2, in AreAliased()
5397 bool AreSameSizeAndType(const CPURegister& reg1, const CPURegister& reg2, in AreSameSizeAndType()
5414 bool AreSameFormat(const VRegister& reg1, const VRegister& reg2, in AreSameFormat()
5425 bool AreConsecutive(const VRegister& reg1, const VRegister& reg2, in AreConsecutive()
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| /external/libcxxabi/src/Unwind/ |
| D | DwarfParser.hpp | 380 uint64_t reg2; in parseInstructions() local
|
| /external/aac/libFDK/src/ |
| D | fixpoint_math.cpp | 430 FIXP_DBL reg1, reg2, regtmp ; in invSqrtNorm2() local
|
| /external/v8/src/arm/ |
| D | macro-assembler-arm.cc | 196 Register reg2, in Swap()
2978 Register reg2, in JumpIfNotBothSmi()
3004 Register reg2, in JumpIfEitherSmi()
3946 Register reg2, in GetRegisterThatIsNotOneOf()
3997 Register reg2, in AreAliased()
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| /external/v8/src/mips/ |
| D | macro-assembler-mips.cc | 533 Register reg2) { in LoadFromNumberDictionary()
3073 Register reg2, in Swap()
5149 Register reg2, in JumpIfNotBothSmi()
5159 Register reg2, in JumpIfEitherSmi()
5948 Register reg2, in GetRegisterThatIsNotOneOf()
5996 Register reg2, in AreAliased()
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| /external/pcre/dist/sljit/ |
| D | sljitNativeARM_T2_32.c | 63 #define IS_2_LO_REGS(reg1, reg2) \ argument
65 #define IS_3_LO_REGS(reg1, reg2, reg3) \ argument
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| /external/v8/src/mips64/ |
| D | macro-assembler-mips64.cc | 538 Register reg2) { in LoadFromNumberDictionary()
2982 Register reg2, in Swap()
5098 Register reg2, in JumpIfNotBothSmi()
5113 Register reg2, in JumpIfEitherSmi()
5933 Register reg2, in GetRegisterThatIsNotOneOf()
5981 Register reg2, in AreAliased()
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| /external/v8/src/arm64/ |
| D | assembler-arm64.cc | 206 Register GetAllocatableRegisterThatIsNotOneOf(Register reg1, Register reg2, in GetAllocatableRegisterThatIsNotOneOf()
219 bool AreAliased(const CPURegister& reg1, const CPURegister& reg2, in AreAliased()
256 bool AreSameSizeAndType(const CPURegister& reg1, const CPURegister& reg2, in AreSameSizeAndType()
|
| D | full-codegen-arm64.cc | 66 void EmitJumpIfEitherNotSmi(Register reg1, Register reg2, Label* target) { in EmitJumpIfEitherNotSmi()
|
| /external/valgrind/coregrind/m_debuginfo/ |
| D | readdwarf.c | 2978 Int off, reg, reg2, len, j; in run_CF_instruction() local
3385 Int off, coff, reg, reg2, len; in show_CF_instruction() local
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| /external/valgrind/VEX/priv/ |
| D | host_arm64_isel.c | 904 HReg reg2 = iselIntExpr_R(env, e->Iex.Binop.arg2); in iselIntExpr_AMode_wrk() local
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| D | host_s390_isel.c | 3348 HReg reg1, reg2; in s390_isel_cc() local
|
| /external/v8/src/x87/ |
| D | macro-assembler-x87.cc | 2971 Register reg2, in AreAliased()
|
| D | lithium-codegen-x87.cc | 506 void LCodeGen::X87LoadForUsage(X87Register reg1, X87Register reg2) { in X87LoadForUsage()
|
| /external/v8/src/ia32/ |
| D | macro-assembler-ia32.cc | 3011 Register reg2, in AreAliased()
|
| /external/v8/src/x64/ |
| D | macro-assembler-x64.cc | 4985 Register reg2, in AreAliased()
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| /external/valgrind/perf/ |
| D | tinycc.c | 15101 int8_t reg2; /* second register, -1 if none */ member
16260 int mod, reg1, reg2, sib_reg1; in asm_modrm() local
|
| /external/owasp/sanitizer/tools/findbugs/lib/ |
| D | findbugs.jar | META-INF/
META-INF/MANIFEST.MF
default.xsl
edu/
edu/umd ... |