| /external/v8/src/arm64/ |
| D | macro-assembler-arm64-inl.h | 47 const Register& rn, in And()
56 const Register& rn, in Ands()
64 void MacroAssembler::Tst(const Register& rn, in Tst()
72 const Register& rn, in Bic()
81 const Register& rn, in Bics()
90 const Register& rn, in Orr()
99 const Register& rn, in Orn()
108 const Register& rn, in Eor()
117 const Register& rn, in Eon()
125 void MacroAssembler::Ccmp(const Register& rn, in Ccmp()
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| D | assembler-arm64.cc | 1085 const Register& rn, in add()
1092 const Register& rn, in adds()
1098 void Assembler::cmn(const Register& rn, in cmn()
1106 const Register& rn, in sub()
1113 const Register& rn, in subs()
1119 void Assembler::cmp(const Register& rn, const Operand& operand) { in cmp()
1138 const Register& rn, in adc()
1145 const Register& rn, in adcs()
1152 const Register& rn, in sbc()
1159 const Register& rn, in sbcs()
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| D | assembler-arm64.h | 1217 const Register& rn, in bfi()
1227 const Register& rn, in bfxil()
1237 void asr(const Register& rd, const Register& rn, unsigned shift) { in asr()
1244 const Register& rn, in sbfiz()
1254 const Register& rn, in sbfx()
1263 void sxtb(const Register& rd, const Register& rn) { in sxtb()
1268 void sxth(const Register& rd, const Register& rn) { in sxth()
1273 void sxtw(const Register& rd, const Register& rn) { in sxtw()
1279 void lsl(const Register& rd, const Register& rn, unsigned shift) { in lsl()
1286 void lsr(const Register& rd, const Register& rn, unsigned shift) { in lsr()
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| /external/vixl/src/vixl/a64/ |
| D | macro-assembler-a64.h | 938 void Asr(const Register& rd, const Register& rn, unsigned shift) { in Asr()
945 void Asr(const Register& rd, const Register& rn, const Register& rm) { in Asr()
976 const Register& rn, in Bfm()
986 const Register& rn, in Bfi()
996 const Register& rn, in Bfxil()
1032 void Cinc(const Register& rd, const Register& rn, Condition cond) { in Cinc()
1039 void Cinv(const Register& rd, const Register& rn, Condition cond) { in Cinv()
1051 void Cls(const Register& rd, const Register& rn) { in Cls()
1058 void Clz(const Register& rd, const Register& rn) { in Clz()
1065 void Cneg(const Register& rd, const Register& rn, Condition cond) { in Cneg()
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| D | macro-assembler-a64.cc | 617 const Register& rn, in And()
625 const Register& rn, in Ands()
632 void MacroAssembler::Tst(const Register& rn, in Tst()
640 const Register& rn, in Bic()
648 const Register& rn, in Bics()
656 const Register& rn, in Orr()
664 const Register& rn, in Orn()
672 const Register& rn, in Eor()
680 const Register& rn, in Eon()
688 const Register& rn, in LogicalMacro()
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| D | assembler-a64.cc | 863 const Register& rn, in add()
870 const Register& rn, in adds()
876 void Assembler::cmn(const Register& rn, in cmn()
884 const Register& rn, in sub()
891 const Register& rn, in subs()
897 void Assembler::cmp(const Register& rn, const Operand& operand) { in cmp()
916 const Register& rn, in adc()
923 const Register& rn, in adcs()
930 const Register& rn, in sbc()
937 const Register& rn, in sbcs()
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| D | assembler-a64.h | 1361 const Register& rn, in bfi()
1371 const Register& rn, in bfxil()
1381 void asr(const Register& rd, const Register& rn, unsigned shift) { in asr()
1388 const Register& rn, in sbfiz()
1398 const Register& rn, in sbfx()
1407 void sxtb(const Register& rd, const Register& rn) { in sxtb()
1412 void sxth(const Register& rd, const Register& rn) { in sxth()
1417 void sxtw(const Register& rd, const Register& rn) { in sxtw()
1423 void lsl(const Register& rd, const Register& rn, unsigned shift) { in lsl()
1430 void lsr(const Register& rd, const Register& rn, unsigned shift) { in lsr()
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| D | simulator-a64.cc | 1314 unsigned rn = instr->Rn(); in VisitLoadStoreExclusive() local
1709 int32_t rn = wreg(instr->Rn()); in VisitDataProcessing2Source() local
1722 int64_t rn = xreg(instr->Rn()); in VisitDataProcessing2Source() local
1735 uint32_t rn = static_cast<uint32_t>(wreg(instr->Rn())); in VisitDataProcessing2Source() local
1746 uint64_t rn = static_cast<uint64_t>(xreg(instr->Rn())); in VisitDataProcessing2Source() local
2221 SimVRegister& rn = vreg(instr->Rn()); in VisitFPDataProcessing1Source() local
2269 SimVRegister& rn = vreg(instr->Rn()); in VisitFPDataProcessing2Source() local
2493 SimVRegister& rn = vreg(instr->Rn()); in VisitNEON2RegMisc() local
2627 SimVRegister& rn = vreg(instr->Rn()); in VisitNEON3Same() local
2751 SimVRegister& rn = vreg(instr->Rn()); in VisitNEON3Different() local
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| /external/linux-tools-perf/src/tools/perf/util/ |
| D | intlist.h | 45 struct rb_node *rn = rb_first(&ilist->rblist.entries); in intlist__first() local
50 struct rb_node *rn; in intlist__next() local
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| D | strlist.h | 47 struct rb_node *rn = rb_first(&slist->rblist.entries); in strlist__first() local
52 struct rb_node *rn; in strlist__next() local
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| /external/ltrace/sysdeps/linux-gnu/arm/ |
| D | trace.c | 336 enum arm_register rn = BITS(this_instr, 16, 19); in arm_get_next_pcs() local
491 const enum arm_register rn = BITS(inst1, 0, 3); in thumb_get_next_pcs() local
527 const enum arm_register rn = BITS(inst2, 0, 3); in thumb_get_next_pcs() local
536 const enum arm_register rn = BITS(inst1, 0, 3); in thumb_get_next_pcs() local
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| /external/vixl/examples/ |
| D | non-const-visitor.h | 41 int rn = instr->Rn(); in VisitAddSubShifted() local
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| /external/linux-tools-perf/src/tools/perf/arch/powerpc/util/ |
| D | header.c | 12 #define mfspr(rn) ({unsigned long rval; \ argument
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| /external/libvorbis/lib/ |
| D | window.c | 2113 long rn=blocksizes[nW]; in _vorbis_apply_window() local
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| /external/jemalloc/test/include/test/ |
| D | math.h | 56 double acu, factor, oflo, gin, term, rn, a, b, an, dif; in i_gamma() local
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| /external/icu/icu4c/source/i18n/ |
| D | uspoof_wsconf.cpp | 319 for (int32_t rn=0; rn<ignoreSet.getRangeCount(); rn++) { in buildWSConfusableData() local
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| /external/v8/src/arm/ |
| D | simulator-arm.cc | 1532 int rn = instr->RnValue(); in ProcessPU() local
2009 int rn = instr->RnValue(); in DecodeType01() local
2086 int rn = instr->RnValue(); in DecodeType01() local
2267 int rn = instr->RnValue(); in DecodeType01() local
2490 int rn = instr->RnValue(); in DecodeType2() local
2554 int rn = instr->RnValue(); in DecodeType3() local
3346 int rn = instr->RnValue(); in DecodeType6CoprocessorIns() local
3383 int rn = instr->RnValue(); in DecodeType6CoprocessorIns() local
3403 int rn = instr->RnValue(); in DecodeType6CoprocessorIns() local
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| D | assembler-arm.cc | 311 MemOperand::MemOperand(Register rn, int32_t offset, AddrMode am) { in MemOperand()
319 MemOperand::MemOperand(Register rn, Register rm, AddrMode am) { in MemOperand()
328 MemOperand::MemOperand(Register rn, Register rm, in MemOperand()
339 NeonMemOperand::NeonMemOperand(Register rn, AddrMode am, int align) { in NeonMemOperand()
347 NeonMemOperand::NeonMemOperand(Register rn, Register rm, int align) { in NeonMemOperand()
1166 Register rn, in addrmod1()
1279 void Assembler::addrmod4(Instr instr, Register rn, RegList rl) { in addrmod4()
2119 Register rn, in ldc()
2140 Register rn, in ldc2()
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| D | assembler-arm.h | 593 Register rn() const { return rn_; } in rn() function
624 Register rn() const { return rn_; } in rn() function
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| /external/ltrace/sysdeps/linux-gnu/mips/ |
| D | trace.c | 151 int rn; in mips_next_pcs() local
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| /external/opencv/cv/src/ |
| D | cvkdtree.cpp | 120 int rn = results->rows * results->cols; in find_ortho_range() local
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| /external/pcre/dist/sljit/ |
| D | sljitNativeARM_T2_32.c | 54 #define RN3(rn) (reg_map[rn] << 3) argument
61 #define SET_REGS44(rd, rn) \ argument
70 #define RN4(rn) (reg_map[rn] << 16) argument
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| /external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/org.apache.ant_1.7.1.v20090120-1145/lib/ |
| D | ant-jmf.jar | ... .Vector files
int numfiles
java.util.Random rn
int x
java.io.File nofile
public int ... |
| /external/ipsec-tools/src/racoon/ |
| D | eaytest.c | 990 vchar_t *rn; local
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| /external/iptables/libxtables/ |
| D | xtables.c | 929 const char *rn; in xtables_fully_register_pending_match() local
1026 const char *rn; in xtables_fully_register_pending_target() local
|