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Searched defs:rt (Results 1 – 6 of 6) sorted by relevance

/art/compiler/utils/mips64/
Dassembler_mips64.cc33 void Mips64Assembler::EmitR(int opcode, GpuRegister rs, GpuRegister rt, GpuRegister rd, in EmitR()
47 void Mips64Assembler::EmitI(int opcode, GpuRegister rs, GpuRegister rt, uint16_t imm) { in EmitI()
94 void Mips64Assembler::Add(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in Add()
98 void Mips64Assembler::Addi(GpuRegister rt, GpuRegister rs, uint16_t imm16) { in Addi()
102 void Mips64Assembler::Addu(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in Addu()
106 void Mips64Assembler::Addiu(GpuRegister rt, GpuRegister rs, uint16_t imm16) { in Addiu()
110 void Mips64Assembler::Daddu(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in Daddu()
114 void Mips64Assembler::Daddiu(GpuRegister rt, GpuRegister rs, uint16_t imm16) { in Daddiu()
118 void Mips64Assembler::Sub(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in Sub()
122 void Mips64Assembler::Subu(GpuRegister rd, GpuRegister rs, GpuRegister rt) { in Subu()
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/art/compiler/utils/mips/
Dassembler_mips.cc42 void MipsAssembler::EmitR(int opcode, Register rs, Register rt, Register rd, int shamt, int funct) { in EmitR()
55 void MipsAssembler::EmitI(int opcode, Register rs, Register rt, uint16_t imm) { in EmitI()
84 void MipsAssembler::EmitFI(int opcode, int fmt, FRegister rt, uint16_t imm) { in EmitFI()
93 void MipsAssembler::EmitBranch(Register rt, Register rs, Label* label, bool equal) { in EmitBranch()
163 void MipsAssembler::Add(Register rd, Register rs, Register rt) { in Add()
167 void MipsAssembler::Addu(Register rd, Register rs, Register rt) { in Addu()
171 void MipsAssembler::Addi(Register rt, Register rs, uint16_t imm16) { in Addi()
175 void MipsAssembler::Addiu(Register rt, Register rs, uint16_t imm16) { in Addiu()
179 void MipsAssembler::Sub(Register rd, Register rs, Register rt) { in Sub()
183 void MipsAssembler::Subu(Register rd, Register rs, Register rt) { in Subu()
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/art/runtime/
Dreference_table_test.cc35 ReferenceTable rt("test", 0, 11); in TEST_F() local
/art/disassembler/
Ddisassembler_mips.cc324 uint32_t rt = (instruction >> 16) & 0x1f; // I-type, R-type. in Dump() local
/art/compiler/utils/arm/
Dassembler_arm32.cc782 void Arm32Assembler::ldrex(Register rt, Register rn, Condition cond) { in ldrex()
797 void Arm32Assembler::ldrexd(Register rt, Register rt2, Register rn, Condition cond) { in ldrexd()
817 Register rt, in strex()
834 void Arm32Assembler::strexd(Register rd, Register rt, Register rt2, Register rn, Condition cond) { in strexd()
873 void Arm32Assembler::vmovsr(SRegister sn, Register rt, Condition cond) { in vmovsr()
888 void Arm32Assembler::vmovrs(Register rt, SRegister sn, Condition cond) { in vmovrs()
903 void Arm32Assembler::vmovsrr(SRegister sm, Register rt, Register rt2, in vmovsrr()
924 void Arm32Assembler::vmovrrs(Register rt, Register rt2, SRegister sm, in vmovrrs()
946 void Arm32Assembler::vmovdrr(DRegister dm, Register rt, Register rt2, in vmovdrr()
966 void Arm32Assembler::vmovrrd(Register rt, Register rt2, DRegister dm, in vmovrrd()
Dassembler_thumb2.cc1700 void Thumb2Assembler::ldrex(Register rt, Register rn, uint16_t imm, Condition cond) { in ldrex()
1715 void Thumb2Assembler::ldrex(Register rt, Register rn, Condition cond) { in ldrex()
1721 Register rt, in strex()
1740 void Thumb2Assembler::ldrexd(Register rt, Register rt2, Register rn, Condition cond) { in ldrexd()
1757 Register rt, in strex()
1764 void Thumb2Assembler::strexd(Register rd, Register rt, Register rt2, Register rn, Condition cond) { in strexd()
1805 void Thumb2Assembler::vmovsr(SRegister sn, Register rt, Condition cond) { in vmovsr()
1820 void Thumb2Assembler::vmovrs(Register rt, SRegister sn, Condition cond) { in vmovrs()
1835 void Thumb2Assembler::vmovsrr(SRegister sm, Register rt, Register rt2, in vmovsrr()
1856 void Thumb2Assembler::vmovrrs(Register rt, Register rt2, SRegister sm, in vmovrrs()
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