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Searched defs:shift (Results 1 – 23 of 23) sorted by relevance

/art/runtime/gc/accounting/
Dbitmap-inl.h89 const size_t shift = CTZ(left_edge); in VisitSetBits() local
101 const size_t shift = CTZ(w); in VisitSetBits() local
125 const size_t shift = CTZ(right_edge); in VisitSetBits() local
Dspace_bitmap-inl.h110 const size_t shift = CTZ(left_edge); in VisitMarkedRange() local
123 const size_t shift = CTZ(w); in VisitMarkedRange() local
149 const size_t shift = CTZ(right_edge); in VisitMarkedRange() local
Dspace_bitmap.cc122 const size_t shift = CTZ(w); in Walk() local
170 const size_t shift = CTZ(garbage); in SweepWalk() local
262 const size_t shift = CTZ(w); in InOrderWalk() local
/art/compiler/optimizing/
Dcode_generator_utils.cc24 int64_t* magic, int* shift) { in CalculateMagicAndShiftForDivRem()
Dinstruction_simplifier.cc501 HIntConstant* shift = GetGraph()->GetIntConstant(WhichPowerOf2(factor)); in VisitMul() local
Dcode_generator_x86.cc2371 int shift = CTZ(imm); in DivByPowerOfTwo() local
2409 int shift; in GenerateDivRemWithAnyConstant() local
2783 int32_t shift = second.GetConstant()->AsIntConstant()->GetValue() & kMaxIntShiftValue; in HandleShift() local
2811 int shift = second.GetConstant()->AsIntConstant()->GetValue() & kMaxLongShiftValue; in HandleShift() local
2830 void InstructionCodeGeneratorX86::GenerateShlLong(const Location& loc, int shift) { in GenerateShlLong()
2869 void InstructionCodeGeneratorX86::GenerateShrLong(const Location& loc, int shift) { in GenerateShrLong()
2901 void InstructionCodeGeneratorX86::GenerateUShrLong(const Location& loc, int shift) { in GenerateUShrLong()
Dintrinsics_x86_64.cc1506 static void SwapBits(CpuRegister reg, CpuRegister temp, int32_t shift, int32_t mask, in SwapBits()
1552 int32_t shift, int64_t mask, X86_64Assembler* assembler) { in SwapBits64()
Dcode_generator_x86_64.cc2522 int shift = CTZ(imm); in DivByPowerOfTwo() local
2538 int shift = CTZ(imm); in DivByPowerOfTwo() local
2571 int shift; in GenerateDivRemWithAnyConstant() local
Dintrinsics_x86.cc1643 static void SwapBits(Register reg, Register temp, int32_t shift, int32_t mask, in SwapBits()
/art/tools/dexfuzz/src/dexfuzz/rawdex/
DDexRandomAccessFile.java99 int shift = 0; in readUleb128() local
179 int shift = 0; in readSleb128() local
/art/compiler/dex/quick/arm64/
Dutility_arm64.cc290 for (int shift = 0; shift < 64; shift += 16) { in GetNumFastHalfWords() local
424 int shift; in LoadConstantNoClobber() local
505 int shift; in LoadConstantWide() local
564 LIR* Arm64Mir2Lir::OpRegRegShift(OpKind op, RegStorage r_dest_src1, RegStorage r_src2, int shift) { in OpRegRegShift()
696 RegStorage r_src2, int shift) { in OpRegRegRegShift()
943 bool shift; in OpRegImm64() local
Dint_arm64.cc392 uint32_t shift; member
569 int shift = EncodeShift(kA64Lsr, nbits - k); in HandleEasyDivRem64() local
/art/compiler/dex/quick/arm/
Dcodegen_arm.h298 uint32_t shift; member
Dutility_arm.cc286 int shift) { in OpRegRegShift()
441 RegStorage r_src2, int shift) { in OpRegRegRegShift()
Dint_arm.cc495 uint32_t shift; member
622 uint32_t shift = CTZ(lit1); in GetEasyMultiplyTwoOps() local
/art/compiler/utils/arm/
Dassembler_arm32_test.cc169 for (arm::Shift shift : shifts) { in SetUpHelpers() local
203 for (arm::Shift shift : kShifts) { in CreateRegisterShifts() local
317 for (const arm::ShifterOperand& shift : GetShiftOperands()) { in TemplateHelper() local
368 for (const arm::ShifterOperand& shift : GetShiftOperands()) { in TemplateHelper() local
Dassembler_arm_test.h407 for (const SOp& shift : shifts) { in RepeatTemplatedRSC() local
463 for (const SOp& shift : shifts) { in RepeatTemplatedRRSC() local
Dassembler_arm.h60 ShifterOperand(Register rm, Shift shift, Register rs) : type_(kRegister), rm_(rm), in ShifterOperand()
Dconstants_arm.h257 int Bits(int shift, int count) const { in Bits()
Dassembler_arm.cc174 uint32_t shift = shift_; in encodingArm() local
Dassembler_thumb2.cc1202 void Thumb2Assembler::EmitShift(Register rd, Register rm, Shift shift, uint8_t amount, bool setcc) { in EmitShift()
1241 void Thumb2Assembler::EmitShift(Register rd, Register rn, Shift shift, Register rm, bool setcc) { in EmitShift()
2115 static uint8_t ToItMask(ItState s, uint8_t firstcond0, uint8_t shift) { in ToItMask()
/art/compiler/linker/arm64/
Drelative_patcher_arm64.cc162 uint32_t shift = wide ? 3u : 2u; in PatchDexCacheReference() local
/art/compiler/dex/quick/x86/
Dint_x86.cc529 void X86Mir2Lir::CalculateMagicAndShift(int64_t divisor, int64_t& magic, int& shift, bool is_long) { in CalculateMagicAndShift()
674 int shift; in GenDivRemLit() local
1278 void X86Mir2Lir::SwapBits(RegStorage result_reg, int shift, int32_t value) { in SwapBits()
1289 void X86Mir2Lir::SwapBits64(RegStorage result_reg, int shift, int64_t value) { in SwapBits64()
2220 int shift; in GenDivRemLongLit() local