1 /*===---- htmintrin.h - Standard header for PowerPC HTM ---------------===*\
2  *
3  * Permission is hereby granted, free of charge, to any person obtaining a copy
4  * of this software and associated documentation files (the "Software"), to deal
5  * in the Software without restriction, including without limitation the rights
6  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
7  * copies of the Software, and to permit persons to whom the Software is
8  * furnished to do so, subject to the following conditions:
9  *
10  * The above copyright notice and this permission notice shall be included in
11  * all copies or substantial portions of the Software.
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
16  * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
17  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
18  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
19  * THE SOFTWARE.
20  *
21 \*===----------------------------------------------------------------------===*/
22 
23 #ifndef __HTMINTRIN_H
24 #define __HTMINTRIN_H
25 
26 #ifndef __HTM__
27 #error "HTM instruction set not enabled"
28 #endif
29 
30 #ifdef __powerpc__
31 
32 #include <stdint.h>
33 
34 typedef uint64_t texasr_t;
35 typedef uint32_t texasru_t;
36 typedef uint32_t texasrl_t;
37 typedef uintptr_t tfiar_t;
38 typedef uintptr_t tfhar_t;
39 
40 #define _HTM_STATE(CR0) ((CR0 >> 1) & 0x3)
41 #define _HTM_NONTRANSACTIONAL 0x0
42 #define _HTM_SUSPENDED        0x1
43 #define _HTM_TRANSACTIONAL    0x2
44 
45 #define _TEXASR_EXTRACT_BITS(TEXASR,BITNUM,SIZE) \
46   (((TEXASR) >> (63-(BITNUM))) & ((1<<(SIZE))-1))
47 #define _TEXASRU_EXTRACT_BITS(TEXASR,BITNUM,SIZE) \
48   (((TEXASR) >> (31-(BITNUM))) & ((1<<(SIZE))-1))
49 
50 #define _TEXASR_FAILURE_CODE(TEXASR) \
51   _TEXASR_EXTRACT_BITS(TEXASR, 7, 8)
52 #define _TEXASRU_FAILURE_CODE(TEXASRU) \
53   _TEXASRU_EXTRACT_BITS(TEXASRU, 7, 8)
54 
55 #define _TEXASR_FAILURE_PERSISTENT(TEXASR) \
56   _TEXASR_EXTRACT_BITS(TEXASR, 7, 1)
57 #define _TEXASRU_FAILURE_PERSISTENT(TEXASRU) \
58   _TEXASRU_EXTRACT_BITS(TEXASRU, 7, 1)
59 
60 #define _TEXASR_DISALLOWED(TEXASR) \
61   _TEXASR_EXTRACT_BITS(TEXASR, 8, 1)
62 #define _TEXASRU_DISALLOWED(TEXASRU) \
63   _TEXASRU_EXTRACT_BITS(TEXASRU, 8, 1)
64 
65 #define _TEXASR_NESTING_OVERFLOW(TEXASR) \
66   _TEXASR_EXTRACT_BITS(TEXASR, 9, 1)
67 #define _TEXASRU_NESTING_OVERFLOW(TEXASRU) \
68   _TEXASRU_EXTRACT_BITS(TEXASRU, 9, 1)
69 
70 #define _TEXASR_FOOTPRINT_OVERFLOW(TEXASR) \
71   _TEXASR_EXTRACT_BITS(TEXASR, 10, 1)
72 #define _TEXASRU_FOOTPRINT_OVERFLOW(TEXASRU) \
73   _TEXASRU_EXTRACT_BITS(TEXASRU, 10, 1)
74 
75 #define _TEXASR_SELF_INDUCED_CONFLICT(TEXASR) \
76   _TEXASR_EXTRACT_BITS(TEXASR, 11, 1)
77 #define _TEXASRU_SELF_INDUCED_CONFLICT(TEXASRU) \
78   _TEXASRU_EXTRACT_BITS(TEXASRU, 11, 1)
79 
80 #define _TEXASR_NON_TRANSACTIONAL_CONFLICT(TEXASR) \
81   _TEXASR_EXTRACT_BITS(TEXASR, 12, 1)
82 #define _TEXASRU_NON_TRANSACTIONAL_CONFLICT(TEXASRU) \
83   _TEXASRU_EXTRACT_BITS(TEXASRU, 12, 1)
84 
85 #define _TEXASR_TRANSACTION_CONFLICT(TEXASR) \
86   _TEXASR_EXTRACT_BITS(TEXASR, 13, 1)
87 #define _TEXASRU_TRANSACTION_CONFLICT(TEXASRU) \
88   _TEXASRU_EXTRACT_BITS(TEXASRU, 13, 1)
89 
90 #define _TEXASR_TRANSLATION_INVALIDATION_CONFLICT(TEXASR) \
91   _TEXASR_EXTRACT_BITS(TEXASR, 14, 1)
92 #define _TEXASRU_TRANSLATION_INVALIDATION_CONFLICT(TEXASRU) \
93   _TEXASRU_EXTRACT_BITS(TEXASRU, 14, 1)
94 
95 #define _TEXASR_IMPLEMENTAION_SPECIFIC(TEXASR) \
96   _TEXASR_EXTRACT_BITS(TEXASR, 15, 1)
97 #define _TEXASRU_IMPLEMENTAION_SPECIFIC(TEXASRU) \
98   _TEXASRU_EXTRACT_BITS(TEXASRU, 15, 1)
99 
100 #define _TEXASR_INSTRUCTION_FETCH_CONFLICT(TEXASR) \
101   _TEXASR_EXTRACT_BITS(TEXASR, 16, 1)
102 #define _TEXASRU_INSTRUCTION_FETCH_CONFLICT(TEXASRU) \
103   _TEXASRU_EXTRACT_BITS(TEXASRU, 16, 1)
104 
105 #define _TEXASR_ABORT(TEXASR) \
106   _TEXASR_EXTRACT_BITS(TEXASR, 31, 1)
107 #define _TEXASRU_ABORT(TEXASRU) \
108   _TEXASRU_EXTRACT_BITS(TEXASRU, 31, 1)
109 
110 
111 #define _TEXASR_SUSPENDED(TEXASR) \
112   _TEXASR_EXTRACT_BITS(TEXASR, 32, 1)
113 
114 #define _TEXASR_PRIVILEGE(TEXASR) \
115   _TEXASR_EXTRACT_BITS(TEXASR, 35, 2)
116 
117 #define _TEXASR_FAILURE_SUMMARY(TEXASR) \
118   _TEXASR_EXTRACT_BITS(TEXASR, 36, 1)
119 
120 #define _TEXASR_TFIAR_EXACT(TEXASR) \
121   _TEXASR_EXTRACT_BITS(TEXASR, 37, 1)
122 
123 #define _TEXASR_ROT(TEXASR) \
124   _TEXASR_EXTRACT_BITS(TEXASR, 38, 1)
125 
126 #define _TEXASR_TRANSACTION_LEVEL(TEXASR) \
127   _TEXASR_EXTRACT_BITS(TEXASR, 63, 12)
128 
129 #endif /* __powerpc */
130 
131 #ifdef __s390__
132 
133 /* Condition codes generated by tbegin  */
134 #define _HTM_TBEGIN_STARTED       0
135 #define _HTM_TBEGIN_INDETERMINATE 1
136 #define _HTM_TBEGIN_TRANSIENT     2
137 #define _HTM_TBEGIN_PERSISTENT    3
138 
139 /* The abort codes below this threshold are reserved for machine use.  */
140 #define _HTM_FIRST_USER_ABORT_CODE 256
141 
142 /* The transaction diagnostic block is it is defined in the Principles
143    of Operation chapter 5-91.  */
144 
145 struct __htm_tdb {
146   unsigned char format;                /*   0 */
147   unsigned char flags;
148   unsigned char reserved1[4];
149   unsigned short nesting_depth;
150   unsigned long long abort_code;       /*   8 */
151   unsigned long long conflict_token;   /*  16 */
152   unsigned long long atia;             /*  24 */
153   unsigned char eaid;                  /*  32 */
154   unsigned char dxc;
155   unsigned char reserved2[2];
156   unsigned int program_int_id;
157   unsigned long long exception_id;     /*  40 */
158   unsigned long long bea;              /*  48 */
159   unsigned char reserved3[72];         /*  56 */
160   unsigned long long gprs[16];         /* 128 */
161 } __attribute__((__packed__, __aligned__ (8)));
162 
163 
164 /* Helper intrinsics to retry tbegin in case of transient failure.  */
165 
166 static __inline int __attribute__((__always_inline__, __nodebug__))
__builtin_tbegin_retry_null(int retry)167 __builtin_tbegin_retry_null (int retry)
168 {
169   int cc, i = 0;
170 
171   while ((cc = __builtin_tbegin(0)) == _HTM_TBEGIN_TRANSIENT
172          && i++ < retry)
173     __builtin_tx_assist(i);
174 
175   return cc;
176 }
177 
178 static __inline int __attribute__((__always_inline__, __nodebug__))
__builtin_tbegin_retry_tdb(void * tdb,int retry)179 __builtin_tbegin_retry_tdb (void *tdb, int retry)
180 {
181   int cc, i = 0;
182 
183   while ((cc = __builtin_tbegin(tdb)) == _HTM_TBEGIN_TRANSIENT
184          && i++ < retry)
185     __builtin_tx_assist(i);
186 
187   return cc;
188 }
189 
190 #define __builtin_tbegin_retry(tdb, retry) \
191   (__builtin_constant_p(tdb == 0) && tdb == 0 ? \
192    __builtin_tbegin_retry_null(retry) : \
193    __builtin_tbegin_retry_tdb(tdb, retry))
194 
195 static __inline int __attribute__((__always_inline__, __nodebug__))
__builtin_tbegin_retry_nofloat_null(int retry)196 __builtin_tbegin_retry_nofloat_null (int retry)
197 {
198   int cc, i = 0;
199 
200   while ((cc = __builtin_tbegin_nofloat(0)) == _HTM_TBEGIN_TRANSIENT
201          && i++ < retry)
202     __builtin_tx_assist(i);
203 
204   return cc;
205 }
206 
207 static __inline int __attribute__((__always_inline__, __nodebug__))
__builtin_tbegin_retry_nofloat_tdb(void * tdb,int retry)208 __builtin_tbegin_retry_nofloat_tdb (void *tdb, int retry)
209 {
210   int cc, i = 0;
211 
212   while ((cc = __builtin_tbegin_nofloat(tdb)) == _HTM_TBEGIN_TRANSIENT
213          && i++ < retry)
214     __builtin_tx_assist(i);
215 
216   return cc;
217 }
218 
219 #define __builtin_tbegin_retry_nofloat(tdb, retry) \
220   (__builtin_constant_p(tdb == 0) && tdb == 0 ? \
221    __builtin_tbegin_retry_nofloat_null(retry) : \
222    __builtin_tbegin_retry_nofloat_tdb(tdb, retry))
223 
224 #endif /* __s390__ */
225 
226 #endif /* __HTMINTRIN_H */
227