1 //===-- AArch64Subtarget.cpp - AArch64 Subtarget Information ----*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements the AArch64 specific subclass of TargetSubtarget.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "AArch64InstrInfo.h"
15 #include "AArch64PBQPRegAlloc.h"
16 #include "AArch64Subtarget.h"
17 #include "llvm/ADT/SmallVector.h"
18 #include "llvm/CodeGen/MachineScheduler.h"
19 #include "llvm/IR/GlobalValue.h"
20 #include "llvm/Support/TargetRegistry.h"
21
22 using namespace llvm;
23
24 #define DEBUG_TYPE "aarch64-subtarget"
25
26 #define GET_SUBTARGETINFO_CTOR
27 #define GET_SUBTARGETINFO_TARGET_DESC
28 #include "AArch64GenSubtargetInfo.inc"
29
30 static cl::opt<bool>
31 EnableEarlyIfConvert("aarch64-early-ifcvt", cl::desc("Enable the early if "
32 "converter pass"), cl::init(true), cl::Hidden);
33
34 AArch64Subtarget &
initializeSubtargetDependencies(StringRef FS)35 AArch64Subtarget::initializeSubtargetDependencies(StringRef FS) {
36 // Determine default and user-specified characteristics
37
38 if (CPUString.empty())
39 CPUString = "generic";
40
41 ParseSubtargetFeatures(CPUString, FS);
42 return *this;
43 }
44
AArch64Subtarget(const std::string & TT,const std::string & CPU,const std::string & FS,const TargetMachine & TM,bool LittleEndian)45 AArch64Subtarget::AArch64Subtarget(const std::string &TT,
46 const std::string &CPU,
47 const std::string &FS,
48 const TargetMachine &TM, bool LittleEndian)
49 : AArch64GenSubtargetInfo(TT, CPU, FS), ARMProcFamily(Others),
50 HasV8_1aOps(false),
51 HasFPARMv8(false), HasNEON(false), HasCrypto(false), HasCRC(false),
52 HasZeroCycleRegMove(false), HasZeroCycleZeroing(false),
53 IsLittle(LittleEndian), CPUString(CPU), TargetTriple(TT), FrameLowering(),
54 InstrInfo(initializeSubtargetDependencies(FS)),
55 TSInfo(TM.getDataLayout()), TLInfo(TM, *this) {}
56
57 /// ClassifyGlobalReference - Find the target operand flags that describe
58 /// how a global value should be referenced for the current subtarget.
59 unsigned char
ClassifyGlobalReference(const GlobalValue * GV,const TargetMachine & TM) const60 AArch64Subtarget::ClassifyGlobalReference(const GlobalValue *GV,
61 const TargetMachine &TM) const {
62 bool isDecl = GV->isDeclarationForLinker();
63
64 // MachO large model always goes via a GOT, simply to get a single 8-byte
65 // absolute relocation on all global addresses.
66 if (TM.getCodeModel() == CodeModel::Large && isTargetMachO())
67 return AArch64II::MO_GOT;
68
69 // The small code mode's direct accesses use ADRP, which cannot necessarily
70 // produce the value 0 (if the code is above 4GB).
71 if (TM.getCodeModel() == CodeModel::Small &&
72 GV->isWeakForLinker() && isDecl) {
73 // In PIC mode use the GOT, but in absolute mode use a constant pool load.
74 if (TM.getRelocationModel() == Reloc::Static)
75 return AArch64II::MO_CONSTPOOL;
76 else
77 return AArch64II::MO_GOT;
78 }
79
80 // If symbol visibility is hidden, the extra load is not needed if
81 // the symbol is definitely defined in the current translation unit.
82
83 // The handling of non-hidden symbols in PIC mode is rather target-dependent:
84 // + On MachO, if the symbol is defined in this module the GOT can be
85 // skipped.
86 // + On ELF, the R_AARCH64_COPY relocation means that even symbols actually
87 // defined could end up in unexpected places. Use a GOT.
88 if (TM.getRelocationModel() != Reloc::Static && GV->hasDefaultVisibility()) {
89 if (isTargetMachO())
90 return (isDecl || GV->isWeakForLinker()) ? AArch64II::MO_GOT
91 : AArch64II::MO_NO_FLAG;
92 else
93 // No need to go through the GOT for local symbols on ELF.
94 return GV->hasLocalLinkage() ? AArch64II::MO_NO_FLAG : AArch64II::MO_GOT;
95 }
96
97 return AArch64II::MO_NO_FLAG;
98 }
99
100 /// This function returns the name of a function which has an interface
101 /// like the non-standard bzero function, if such a function exists on
102 /// the current subtarget and it is considered prefereable over
103 /// memset with zero passed as the second argument. Otherwise it
104 /// returns null.
getBZeroEntry() const105 const char *AArch64Subtarget::getBZeroEntry() const {
106 // Prefer bzero on Darwin only.
107 if(isTargetDarwin())
108 return "bzero";
109
110 return nullptr;
111 }
112
overrideSchedPolicy(MachineSchedPolicy & Policy,MachineInstr * begin,MachineInstr * end,unsigned NumRegionInstrs) const113 void AArch64Subtarget::overrideSchedPolicy(MachineSchedPolicy &Policy,
114 MachineInstr *begin, MachineInstr *end,
115 unsigned NumRegionInstrs) const {
116 // LNT run (at least on Cyclone) showed reasonably significant gains for
117 // bi-directional scheduling. 253.perlbmk.
118 Policy.OnlyTopDown = false;
119 Policy.OnlyBottomUp = false;
120 }
121
enableEarlyIfConversion() const122 bool AArch64Subtarget::enableEarlyIfConversion() const {
123 return EnableEarlyIfConvert;
124 }
125
126 std::unique_ptr<PBQPRAConstraint>
getCustomPBQPConstraints() const127 AArch64Subtarget::getCustomPBQPConstraints() const {
128 if (!isCortexA57())
129 return nullptr;
130
131 return llvm::make_unique<A57ChainingConstraint>();
132 }
133