1 //=== HexagonSplitConst32AndConst64.cpp - split CONST32/Const64 into HI/LO ===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // When the compiler is invoked with no small data, for instance, with the -G0
11 // command line option, then all CONST32_* opcodes should be broken down into
12 // appropriate LO and HI instructions. This splitting is done by this pass.
13 // The only reason this is not done in the DAG lowering itself is that there
14 // is no simple way of getting the register allocator to allot the same hard
15 // register to the result of LO and HI instructions. This pass is always
16 // scheduled after register allocation.
17 //
18 //===----------------------------------------------------------------------===//
19 
20 #include "HexagonMachineFunctionInfo.h"
21 #include "HexagonSubtarget.h"
22 #include "HexagonTargetMachine.h"
23 #include "HexagonTargetObjectFile.h"
24 #include "llvm/ADT/Statistic.h"
25 #include "llvm/CodeGen/LatencyPriorityQueue.h"
26 #include "llvm/CodeGen/MachineDominators.h"
27 #include "llvm/CodeGen/MachineFunctionPass.h"
28 #include "llvm/CodeGen/MachineInstrBuilder.h"
29 #include "llvm/CodeGen/MachineLoopInfo.h"
30 #include "llvm/CodeGen/MachineRegisterInfo.h"
31 #include "llvm/CodeGen/Passes.h"
32 #include "llvm/CodeGen/ScheduleDAGInstrs.h"
33 #include "llvm/CodeGen/ScheduleHazardRecognizer.h"
34 #include "llvm/CodeGen/SchedulerRegistry.h"
35 #include "llvm/Support/CommandLine.h"
36 #include "llvm/Support/Compiler.h"
37 #include "llvm/Support/Debug.h"
38 #include "llvm/Support/MathExtras.h"
39 #include "llvm/Target/TargetInstrInfo.h"
40 #include "llvm/Target/TargetMachine.h"
41 #include "llvm/Target/TargetRegisterInfo.h"
42 #include <map>
43 
44 using namespace llvm;
45 
46 #define DEBUG_TYPE "xfer"
47 
48 namespace {
49 
50 class HexagonSplitConst32AndConst64 : public MachineFunctionPass {
51  public:
52     static char ID;
HexagonSplitConst32AndConst64()53     HexagonSplitConst32AndConst64() : MachineFunctionPass(ID) {}
54 
getPassName() const55     const char *getPassName() const override {
56       return "Hexagon Split Const32s and Const64s";
57     }
58     bool runOnMachineFunction(MachineFunction &Fn) override;
59 };
60 
61 
62 char HexagonSplitConst32AndConst64::ID = 0;
63 
64 
runOnMachineFunction(MachineFunction & Fn)65 bool HexagonSplitConst32AndConst64::runOnMachineFunction(MachineFunction &Fn) {
66 
67   const HexagonTargetObjectFile &TLOF =
68       *static_cast<const HexagonTargetObjectFile *>(
69           Fn.getTarget().getObjFileLowering());
70   if (TLOF.IsSmallDataEnabled())
71     return true;
72 
73   const TargetInstrInfo *TII = Fn.getSubtarget().getInstrInfo();
74   const TargetRegisterInfo *TRI = Fn.getSubtarget().getRegisterInfo();
75 
76   // Loop over all of the basic blocks
77   for (MachineFunction::iterator MBBb = Fn.begin(), MBBe = Fn.end();
78        MBBb != MBBe; ++MBBb) {
79     MachineBasicBlock* MBB = MBBb;
80     // Traverse the basic block
81     MachineBasicBlock::iterator MII = MBB->begin();
82     MachineBasicBlock::iterator MIE = MBB->end ();
83     while (MII != MIE) {
84       MachineInstr *MI = MII;
85       int Opc = MI->getOpcode();
86       if (Opc == Hexagon::CONST32_set_jt) {
87         int DestReg = MI->getOperand(0).getReg();
88         MachineOperand &Symbol = MI->getOperand (1);
89         BuildMI (*MBB, MII, MI->getDebugLoc(),
90                  TII->get(Hexagon::A2_tfrsi), DestReg).addOperand(Symbol);
91 
92         // MBB->erase returns the iterator to the next instruction, which is the
93         // one we want to process next
94         MII = MBB->erase (MI);
95         continue;
96       }
97       else if (Opc == Hexagon::CONST32_Int_Real &&
98                MI->getOperand(1).isBlockAddress()) {
99         int DestReg = MI->getOperand(0).getReg();
100         MachineOperand &Symbol = MI->getOperand (1);
101 
102         BuildMI (*MBB, MII, MI->getDebugLoc(),
103                  TII->get(Hexagon::LO), DestReg).addOperand(Symbol);
104         BuildMI (*MBB, MII, MI->getDebugLoc(),
105                  TII->get(Hexagon::HI), DestReg).addOperand(Symbol);
106         // MBB->erase returns the iterator to the next instruction, which is the
107         // one we want to process next
108         MII = MBB->erase (MI);
109         continue;
110       }
111 
112       else if (Opc == Hexagon::CONST32_Int_Real ||
113                Opc == Hexagon::CONST32_Float_Real) {
114         int DestReg = MI->getOperand(0).getReg();
115 
116         // We have to convert an FP immediate into its corresponding integer
117         // representation
118         int64_t ImmValue;
119         if (Opc == Hexagon::CONST32_Float_Real) {
120           APFloat Val = MI->getOperand(1).getFPImm()->getValueAPF();
121           ImmValue = *Val.bitcastToAPInt().getRawData();
122         }
123         else
124           ImmValue = MI->getOperand(1).getImm();
125 
126         BuildMI(*MBB, MII, MI->getDebugLoc(),
127                  TII->get(Hexagon::A2_tfrsi), DestReg).addImm(ImmValue);
128         MII = MBB->erase (MI);
129         continue;
130       }
131       else if (Opc == Hexagon::CONST64_Int_Real ||
132                Opc == Hexagon::CONST64_Float_Real) {
133         int DestReg = MI->getOperand(0).getReg();
134 
135         // We have to convert an FP immediate into its corresponding integer
136         // representation
137         int64_t ImmValue;
138         if (Opc == Hexagon::CONST64_Float_Real) {
139           APFloat Val =  MI->getOperand(1).getFPImm()->getValueAPF();
140           ImmValue = *Val.bitcastToAPInt().getRawData();
141         }
142         else
143           ImmValue = MI->getOperand(1).getImm();
144 
145         unsigned DestLo = TRI->getSubReg(DestReg, Hexagon::subreg_loreg);
146         unsigned DestHi = TRI->getSubReg(DestReg, Hexagon::subreg_hireg);
147 
148         int32_t LowWord = (ImmValue & 0xFFFFFFFF);
149         int32_t HighWord = (ImmValue >> 32) & 0xFFFFFFFF;
150 
151         BuildMI(*MBB, MII, MI->getDebugLoc(),
152                  TII->get(Hexagon::A2_tfrsi), DestLo).addImm(LowWord);
153         BuildMI (*MBB, MII, MI->getDebugLoc(),
154                  TII->get(Hexagon::A2_tfrsi), DestHi).addImm(HighWord);
155         MII = MBB->erase (MI);
156         continue;
157       }
158       ++MII;
159     }
160   }
161 
162   return true;
163 }
164 
165 }
166 
167 //===----------------------------------------------------------------------===//
168 //                         Public Constructor Functions
169 //===----------------------------------------------------------------------===//
170 
171 FunctionPass *
createHexagonSplitConst32AndConst64()172 llvm::createHexagonSplitConst32AndConst64() {
173   return new HexagonSplitConst32AndConst64();
174 }
175