1 //===-- NVPTXMCTargetDesc.cpp - NVPTX Target Descriptions -------*- C++ -*-===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file provides NVPTX specific target descriptions.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "NVPTXMCTargetDesc.h"
15 #include "InstPrinter/NVPTXInstPrinter.h"
16 #include "NVPTXMCAsmInfo.h"
17 #include "llvm/MC/MCCodeGenInfo.h"
18 #include "llvm/MC/MCInstrInfo.h"
19 #include "llvm/MC/MCRegisterInfo.h"
20 #include "llvm/MC/MCSubtargetInfo.h"
21 #include "llvm/Support/TargetRegistry.h"
22
23 using namespace llvm;
24
25 #define GET_INSTRINFO_MC_DESC
26 #include "NVPTXGenInstrInfo.inc"
27
28 #define GET_SUBTARGETINFO_MC_DESC
29 #include "NVPTXGenSubtargetInfo.inc"
30
31 #define GET_REGINFO_MC_DESC
32 #include "NVPTXGenRegisterInfo.inc"
33
createNVPTXMCInstrInfo()34 static MCInstrInfo *createNVPTXMCInstrInfo() {
35 MCInstrInfo *X = new MCInstrInfo();
36 InitNVPTXMCInstrInfo(X);
37 return X;
38 }
39
createNVPTXMCRegisterInfo(StringRef TT)40 static MCRegisterInfo *createNVPTXMCRegisterInfo(StringRef TT) {
41 MCRegisterInfo *X = new MCRegisterInfo();
42 // PTX does not have a return address register.
43 InitNVPTXMCRegisterInfo(X, 0);
44 return X;
45 }
46
47 static MCSubtargetInfo *
createNVPTXMCSubtargetInfo(StringRef TT,StringRef CPU,StringRef FS)48 createNVPTXMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) {
49 MCSubtargetInfo *X = new MCSubtargetInfo();
50 InitNVPTXMCSubtargetInfo(X, TT, CPU, FS);
51 return X;
52 }
53
createNVPTXMCCodeGenInfo(StringRef TT,Reloc::Model RM,CodeModel::Model CM,CodeGenOpt::Level OL)54 static MCCodeGenInfo *createNVPTXMCCodeGenInfo(
55 StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) {
56 MCCodeGenInfo *X = new MCCodeGenInfo();
57 X->InitMCCodeGenInfo(RM, CM, OL);
58 return X;
59 }
60
createNVPTXMCInstPrinter(const Triple & T,unsigned SyntaxVariant,const MCAsmInfo & MAI,const MCInstrInfo & MII,const MCRegisterInfo & MRI)61 static MCInstPrinter *createNVPTXMCInstPrinter(const Triple &T,
62 unsigned SyntaxVariant,
63 const MCAsmInfo &MAI,
64 const MCInstrInfo &MII,
65 const MCRegisterInfo &MRI) {
66 if (SyntaxVariant == 0)
67 return new NVPTXInstPrinter(MAI, MII, MRI);
68 return nullptr;
69 }
70
71 // Force static initialization.
LLVMInitializeNVPTXTargetMC()72 extern "C" void LLVMInitializeNVPTXTargetMC() {
73 for (Target *T : {&TheNVPTXTarget32, &TheNVPTXTarget64}) {
74 // Register the MC asm info.
75 RegisterMCAsmInfo<NVPTXMCAsmInfo> X(*T);
76
77 // Register the MC codegen info.
78 TargetRegistry::RegisterMCCodeGenInfo(*T, createNVPTXMCCodeGenInfo);
79
80 // Register the MC instruction info.
81 TargetRegistry::RegisterMCInstrInfo(*T, createNVPTXMCInstrInfo);
82
83 // Register the MC register info.
84 TargetRegistry::RegisterMCRegInfo(*T, createNVPTXMCRegisterInfo);
85
86 // Register the MC subtarget info.
87 TargetRegistry::RegisterMCSubtargetInfo(*T, createNVPTXMCSubtargetInfo);
88
89 // Register the MCInstPrinter.
90 TargetRegistry::RegisterMCInstPrinter(*T, createNVPTXMCInstPrinter);
91 }
92 }
93