1 //===-- X86InstComments.cpp - Generate verbose-asm comments for instrs ----===//
2 //
3 // The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This defines functionality used to emit comments about X86 instructions to
11 // an output stream for -fverbose-asm.
12 //
13 //===----------------------------------------------------------------------===//
14
15 #include "X86InstComments.h"
16 #include "MCTargetDesc/X86MCTargetDesc.h"
17 #include "Utils/X86ShuffleDecode.h"
18 #include "llvm/MC/MCInst.h"
19 #include "llvm/CodeGen/MachineValueType.h"
20 #include "llvm/Support/raw_ostream.h"
21
22 using namespace llvm;
23
24 /// \brief Extracts the src/dst types for a given zero extension instruction.
25 /// \note While the number of elements in DstVT type correct, the
26 /// number in the SrcVT type is expanded to fill the src xmm register and the
27 /// upper elements may not be included in the dst xmm/ymm register.
getZeroExtensionTypes(const MCInst * MI,MVT & SrcVT,MVT & DstVT)28 static void getZeroExtensionTypes(const MCInst *MI, MVT &SrcVT, MVT &DstVT) {
29 switch (MI->getOpcode()) {
30 default:
31 llvm_unreachable("Unknown zero extension instruction");
32 // i8 zero extension
33 case X86::PMOVZXBWrm:
34 case X86::PMOVZXBWrr:
35 case X86::VPMOVZXBWrm:
36 case X86::VPMOVZXBWrr:
37 SrcVT = MVT::v16i8;
38 DstVT = MVT::v8i16;
39 break;
40 case X86::VPMOVZXBWYrm:
41 case X86::VPMOVZXBWYrr:
42 SrcVT = MVT::v16i8;
43 DstVT = MVT::v16i16;
44 break;
45 case X86::PMOVZXBDrm:
46 case X86::PMOVZXBDrr:
47 case X86::VPMOVZXBDrm:
48 case X86::VPMOVZXBDrr:
49 SrcVT = MVT::v16i8;
50 DstVT = MVT::v4i32;
51 break;
52 case X86::VPMOVZXBDYrm:
53 case X86::VPMOVZXBDYrr:
54 SrcVT = MVT::v16i8;
55 DstVT = MVT::v8i32;
56 break;
57 case X86::PMOVZXBQrm:
58 case X86::PMOVZXBQrr:
59 case X86::VPMOVZXBQrm:
60 case X86::VPMOVZXBQrr:
61 SrcVT = MVT::v16i8;
62 DstVT = MVT::v2i64;
63 break;
64 case X86::VPMOVZXBQYrm:
65 case X86::VPMOVZXBQYrr:
66 SrcVT = MVT::v16i8;
67 DstVT = MVT::v4i64;
68 break;
69 // i16 zero extension
70 case X86::PMOVZXWDrm:
71 case X86::PMOVZXWDrr:
72 case X86::VPMOVZXWDrm:
73 case X86::VPMOVZXWDrr:
74 SrcVT = MVT::v8i16;
75 DstVT = MVT::v4i32;
76 break;
77 case X86::VPMOVZXWDYrm:
78 case X86::VPMOVZXWDYrr:
79 SrcVT = MVT::v8i16;
80 DstVT = MVT::v8i32;
81 break;
82 case X86::PMOVZXWQrm:
83 case X86::PMOVZXWQrr:
84 case X86::VPMOVZXWQrm:
85 case X86::VPMOVZXWQrr:
86 SrcVT = MVT::v8i16;
87 DstVT = MVT::v2i64;
88 break;
89 case X86::VPMOVZXWQYrm:
90 case X86::VPMOVZXWQYrr:
91 SrcVT = MVT::v8i16;
92 DstVT = MVT::v4i64;
93 break;
94 // i32 zero extension
95 case X86::PMOVZXDQrm:
96 case X86::PMOVZXDQrr:
97 case X86::VPMOVZXDQrm:
98 case X86::VPMOVZXDQrr:
99 SrcVT = MVT::v4i32;
100 DstVT = MVT::v2i64;
101 break;
102 case X86::VPMOVZXDQYrm:
103 case X86::VPMOVZXDQYrr:
104 SrcVT = MVT::v4i32;
105 DstVT = MVT::v4i64;
106 break;
107 }
108 }
109
110 //===----------------------------------------------------------------------===//
111 // Top Level Entrypoint
112 //===----------------------------------------------------------------------===//
113
114 /// EmitAnyX86InstComments - This function decodes x86 instructions and prints
115 /// newline terminated strings to the specified string if desired. This
116 /// information is shown in disassembly dumps when verbose assembly is enabled.
EmitAnyX86InstComments(const MCInst * MI,raw_ostream & OS,const char * (* getRegName)(unsigned))117 bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
118 const char *(*getRegName)(unsigned)) {
119 // If this is a shuffle operation, the switch should fill in this state.
120 SmallVector<int, 8> ShuffleMask;
121 const char *DestName = nullptr, *Src1Name = nullptr, *Src2Name = nullptr;
122
123 switch (MI->getOpcode()) {
124 default:
125 // Not an instruction for which we can decode comments.
126 return false;
127
128 case X86::BLENDPDrri:
129 case X86::VBLENDPDrri:
130 Src2Name = getRegName(MI->getOperand(2).getReg());
131 // FALL THROUGH.
132 case X86::BLENDPDrmi:
133 case X86::VBLENDPDrmi:
134 if(MI->getOperand(MI->getNumOperands()-1).isImm())
135 DecodeBLENDMask(MVT::v2f64,
136 MI->getOperand(MI->getNumOperands()-1).getImm(),
137 ShuffleMask);
138 Src1Name = getRegName(MI->getOperand(1).getReg());
139 DestName = getRegName(MI->getOperand(0).getReg());
140 break;
141 case X86::VBLENDPDYrri:
142 Src2Name = getRegName(MI->getOperand(2).getReg());
143 // FALL THROUGH.
144 case X86::VBLENDPDYrmi:
145 if(MI->getOperand(MI->getNumOperands()-1).isImm())
146 DecodeBLENDMask(MVT::v4f64,
147 MI->getOperand(MI->getNumOperands()-1).getImm(),
148 ShuffleMask);
149 Src1Name = getRegName(MI->getOperand(1).getReg());
150 DestName = getRegName(MI->getOperand(0).getReg());
151 break;
152
153 case X86::BLENDPSrri:
154 case X86::VBLENDPSrri:
155 Src2Name = getRegName(MI->getOperand(2).getReg());
156 // FALL THROUGH.
157 case X86::BLENDPSrmi:
158 case X86::VBLENDPSrmi:
159 if(MI->getOperand(MI->getNumOperands()-1).isImm())
160 DecodeBLENDMask(MVT::v4f32,
161 MI->getOperand(MI->getNumOperands()-1).getImm(),
162 ShuffleMask);
163 Src1Name = getRegName(MI->getOperand(1).getReg());
164 DestName = getRegName(MI->getOperand(0).getReg());
165 break;
166 case X86::VBLENDPSYrri:
167 Src2Name = getRegName(MI->getOperand(2).getReg());
168 // FALL THROUGH.
169 case X86::VBLENDPSYrmi:
170 if(MI->getOperand(MI->getNumOperands()-1).isImm())
171 DecodeBLENDMask(MVT::v8f32,
172 MI->getOperand(MI->getNumOperands()-1).getImm(),
173 ShuffleMask);
174 Src1Name = getRegName(MI->getOperand(1).getReg());
175 DestName = getRegName(MI->getOperand(0).getReg());
176 break;
177
178 case X86::PBLENDWrri:
179 case X86::VPBLENDWrri:
180 Src2Name = getRegName(MI->getOperand(2).getReg());
181 // FALL THROUGH.
182 case X86::PBLENDWrmi:
183 case X86::VPBLENDWrmi:
184 if(MI->getOperand(MI->getNumOperands()-1).isImm())
185 DecodeBLENDMask(MVT::v8i16,
186 MI->getOperand(MI->getNumOperands()-1).getImm(),
187 ShuffleMask);
188 Src1Name = getRegName(MI->getOperand(1).getReg());
189 DestName = getRegName(MI->getOperand(0).getReg());
190 break;
191 case X86::VPBLENDWYrri:
192 Src2Name = getRegName(MI->getOperand(2).getReg());
193 // FALL THROUGH.
194 case X86::VPBLENDWYrmi:
195 if(MI->getOperand(MI->getNumOperands()-1).isImm())
196 DecodeBLENDMask(MVT::v16i16,
197 MI->getOperand(MI->getNumOperands()-1).getImm(),
198 ShuffleMask);
199 Src1Name = getRegName(MI->getOperand(1).getReg());
200 DestName = getRegName(MI->getOperand(0).getReg());
201 break;
202
203 case X86::VPBLENDDrri:
204 Src2Name = getRegName(MI->getOperand(2).getReg());
205 // FALL THROUGH.
206 case X86::VPBLENDDrmi:
207 if(MI->getOperand(MI->getNumOperands()-1).isImm())
208 DecodeBLENDMask(MVT::v4i32,
209 MI->getOperand(MI->getNumOperands()-1).getImm(),
210 ShuffleMask);
211 Src1Name = getRegName(MI->getOperand(1).getReg());
212 DestName = getRegName(MI->getOperand(0).getReg());
213 break;
214
215 case X86::VPBLENDDYrri:
216 Src2Name = getRegName(MI->getOperand(2).getReg());
217 // FALL THROUGH.
218 case X86::VPBLENDDYrmi:
219 if(MI->getOperand(MI->getNumOperands()-1).isImm())
220 DecodeBLENDMask(MVT::v8i32,
221 MI->getOperand(MI->getNumOperands()-1).getImm(),
222 ShuffleMask);
223 Src1Name = getRegName(MI->getOperand(1).getReg());
224 DestName = getRegName(MI->getOperand(0).getReg());
225 break;
226
227 case X86::INSERTPSrr:
228 case X86::VINSERTPSrr:
229 Src2Name = getRegName(MI->getOperand(2).getReg());
230 // FALL THROUGH.
231 case X86::INSERTPSrm:
232 case X86::VINSERTPSrm:
233 DestName = getRegName(MI->getOperand(0).getReg());
234 Src1Name = getRegName(MI->getOperand(1).getReg());
235 if(MI->getOperand(MI->getNumOperands()-1).isImm())
236 DecodeINSERTPSMask(MI->getOperand(MI->getNumOperands()-1).getImm(),
237 ShuffleMask);
238 break;
239
240 case X86::MOVLHPSrr:
241 case X86::VMOVLHPSrr:
242 Src2Name = getRegName(MI->getOperand(2).getReg());
243 Src1Name = getRegName(MI->getOperand(1).getReg());
244 DestName = getRegName(MI->getOperand(0).getReg());
245 DecodeMOVLHPSMask(2, ShuffleMask);
246 break;
247
248 case X86::MOVHLPSrr:
249 case X86::VMOVHLPSrr:
250 Src2Name = getRegName(MI->getOperand(2).getReg());
251 Src1Name = getRegName(MI->getOperand(1).getReg());
252 DestName = getRegName(MI->getOperand(0).getReg());
253 DecodeMOVHLPSMask(2, ShuffleMask);
254 break;
255
256 case X86::MOVSLDUPrr:
257 case X86::VMOVSLDUPrr:
258 Src1Name = getRegName(MI->getOperand(1).getReg());
259 // FALL THROUGH.
260 case X86::MOVSLDUPrm:
261 case X86::VMOVSLDUPrm:
262 DestName = getRegName(MI->getOperand(0).getReg());
263 DecodeMOVSLDUPMask(MVT::v4f32, ShuffleMask);
264 break;
265
266 case X86::VMOVSHDUPYrr:
267 Src1Name = getRegName(MI->getOperand(1).getReg());
268 // FALL THROUGH.
269 case X86::VMOVSHDUPYrm:
270 DestName = getRegName(MI->getOperand(0).getReg());
271 DecodeMOVSHDUPMask(MVT::v8f32, ShuffleMask);
272 break;
273
274 case X86::VMOVSLDUPYrr:
275 Src1Name = getRegName(MI->getOperand(1).getReg());
276 // FALL THROUGH.
277 case X86::VMOVSLDUPYrm:
278 DestName = getRegName(MI->getOperand(0).getReg());
279 DecodeMOVSLDUPMask(MVT::v8f32, ShuffleMask);
280 break;
281
282 case X86::MOVSHDUPrr:
283 case X86::VMOVSHDUPrr:
284 Src1Name = getRegName(MI->getOperand(1).getReg());
285 // FALL THROUGH.
286 case X86::MOVSHDUPrm:
287 case X86::VMOVSHDUPrm:
288 DestName = getRegName(MI->getOperand(0).getReg());
289 DecodeMOVSHDUPMask(MVT::v4f32, ShuffleMask);
290 break;
291
292 case X86::VMOVDDUPYrr:
293 Src1Name = getRegName(MI->getOperand(1).getReg());
294 // FALL THROUGH.
295 case X86::VMOVDDUPYrm:
296 DestName = getRegName(MI->getOperand(0).getReg());
297 DecodeMOVDDUPMask(MVT::v4f64, ShuffleMask);
298 break;
299
300 case X86::MOVDDUPrr:
301 case X86::VMOVDDUPrr:
302 Src1Name = getRegName(MI->getOperand(1).getReg());
303 // FALL THROUGH.
304 case X86::MOVDDUPrm:
305 case X86::VMOVDDUPrm:
306 DestName = getRegName(MI->getOperand(0).getReg());
307 DecodeMOVDDUPMask(MVT::v2f64, ShuffleMask);
308 break;
309
310 case X86::PSLLDQri:
311 case X86::VPSLLDQri:
312 Src1Name = getRegName(MI->getOperand(1).getReg());
313 DestName = getRegName(MI->getOperand(0).getReg());
314 if(MI->getOperand(MI->getNumOperands()-1).isImm())
315 DecodePSLLDQMask(MVT::v16i8,
316 MI->getOperand(MI->getNumOperands()-1).getImm(),
317 ShuffleMask);
318 break;
319
320 case X86::VPSLLDQYri:
321 Src1Name = getRegName(MI->getOperand(1).getReg());
322 DestName = getRegName(MI->getOperand(0).getReg());
323 if(MI->getOperand(MI->getNumOperands()-1).isImm())
324 DecodePSLLDQMask(MVT::v32i8,
325 MI->getOperand(MI->getNumOperands()-1).getImm(),
326 ShuffleMask);
327 break;
328
329 case X86::PSRLDQri:
330 case X86::VPSRLDQri:
331 Src1Name = getRegName(MI->getOperand(1).getReg());
332 DestName = getRegName(MI->getOperand(0).getReg());
333 if(MI->getOperand(MI->getNumOperands()-1).isImm())
334 DecodePSRLDQMask(MVT::v16i8,
335 MI->getOperand(MI->getNumOperands()-1).getImm(),
336 ShuffleMask);
337 break;
338
339 case X86::VPSRLDQYri:
340 Src1Name = getRegName(MI->getOperand(1).getReg());
341 DestName = getRegName(MI->getOperand(0).getReg());
342 if(MI->getOperand(MI->getNumOperands()-1).isImm())
343 DecodePSRLDQMask(MVT::v32i8,
344 MI->getOperand(MI->getNumOperands()-1).getImm(),
345 ShuffleMask);
346 break;
347
348 case X86::PALIGNR128rr:
349 case X86::VPALIGNR128rr:
350 Src1Name = getRegName(MI->getOperand(2).getReg());
351 // FALL THROUGH.
352 case X86::PALIGNR128rm:
353 case X86::VPALIGNR128rm:
354 Src2Name = getRegName(MI->getOperand(1).getReg());
355 DestName = getRegName(MI->getOperand(0).getReg());
356 if(MI->getOperand(MI->getNumOperands()-1).isImm())
357 DecodePALIGNRMask(MVT::v16i8,
358 MI->getOperand(MI->getNumOperands()-1).getImm(),
359 ShuffleMask);
360 break;
361 case X86::VPALIGNR256rr:
362 Src1Name = getRegName(MI->getOperand(2).getReg());
363 // FALL THROUGH.
364 case X86::VPALIGNR256rm:
365 Src2Name = getRegName(MI->getOperand(1).getReg());
366 DestName = getRegName(MI->getOperand(0).getReg());
367 if(MI->getOperand(MI->getNumOperands()-1).isImm())
368 DecodePALIGNRMask(MVT::v32i8,
369 MI->getOperand(MI->getNumOperands()-1).getImm(),
370 ShuffleMask);
371 break;
372
373 case X86::PSHUFDri:
374 case X86::VPSHUFDri:
375 Src1Name = getRegName(MI->getOperand(1).getReg());
376 // FALL THROUGH.
377 case X86::PSHUFDmi:
378 case X86::VPSHUFDmi:
379 DestName = getRegName(MI->getOperand(0).getReg());
380 if(MI->getOperand(MI->getNumOperands()-1).isImm())
381 DecodePSHUFMask(MVT::v4i32,
382 MI->getOperand(MI->getNumOperands()-1).getImm(),
383 ShuffleMask);
384 break;
385 case X86::VPSHUFDYri:
386 Src1Name = getRegName(MI->getOperand(1).getReg());
387 // FALL THROUGH.
388 case X86::VPSHUFDYmi:
389 DestName = getRegName(MI->getOperand(0).getReg());
390 if(MI->getOperand(MI->getNumOperands()-1).isImm())
391 DecodePSHUFMask(MVT::v8i32,
392 MI->getOperand(MI->getNumOperands()-1).getImm(),
393 ShuffleMask);
394 break;
395
396
397 case X86::PSHUFHWri:
398 case X86::VPSHUFHWri:
399 Src1Name = getRegName(MI->getOperand(1).getReg());
400 // FALL THROUGH.
401 case X86::PSHUFHWmi:
402 case X86::VPSHUFHWmi:
403 DestName = getRegName(MI->getOperand(0).getReg());
404 if(MI->getOperand(MI->getNumOperands()-1).isImm())
405 DecodePSHUFHWMask(MVT::v8i16,
406 MI->getOperand(MI->getNumOperands()-1).getImm(),
407 ShuffleMask);
408 break;
409 case X86::VPSHUFHWYri:
410 Src1Name = getRegName(MI->getOperand(1).getReg());
411 // FALL THROUGH.
412 case X86::VPSHUFHWYmi:
413 DestName = getRegName(MI->getOperand(0).getReg());
414 if(MI->getOperand(MI->getNumOperands()-1).isImm())
415 DecodePSHUFHWMask(MVT::v16i16,
416 MI->getOperand(MI->getNumOperands()-1).getImm(),
417 ShuffleMask);
418 break;
419 case X86::PSHUFLWri:
420 case X86::VPSHUFLWri:
421 Src1Name = getRegName(MI->getOperand(1).getReg());
422 // FALL THROUGH.
423 case X86::PSHUFLWmi:
424 case X86::VPSHUFLWmi:
425 DestName = getRegName(MI->getOperand(0).getReg());
426 if(MI->getOperand(MI->getNumOperands()-1).isImm())
427 DecodePSHUFLWMask(MVT::v8i16,
428 MI->getOperand(MI->getNumOperands()-1).getImm(),
429 ShuffleMask);
430 break;
431 case X86::VPSHUFLWYri:
432 Src1Name = getRegName(MI->getOperand(1).getReg());
433 // FALL THROUGH.
434 case X86::VPSHUFLWYmi:
435 DestName = getRegName(MI->getOperand(0).getReg());
436 if(MI->getOperand(MI->getNumOperands()-1).isImm())
437 DecodePSHUFLWMask(MVT::v16i16,
438 MI->getOperand(MI->getNumOperands()-1).getImm(),
439 ShuffleMask);
440 break;
441
442 case X86::PUNPCKHBWrr:
443 case X86::VPUNPCKHBWrr:
444 Src2Name = getRegName(MI->getOperand(2).getReg());
445 // FALL THROUGH.
446 case X86::PUNPCKHBWrm:
447 case X86::VPUNPCKHBWrm:
448 Src1Name = getRegName(MI->getOperand(1).getReg());
449 DestName = getRegName(MI->getOperand(0).getReg());
450 DecodeUNPCKHMask(MVT::v16i8, ShuffleMask);
451 break;
452 case X86::VPUNPCKHBWYrr:
453 Src2Name = getRegName(MI->getOperand(2).getReg());
454 // FALL THROUGH.
455 case X86::VPUNPCKHBWYrm:
456 Src1Name = getRegName(MI->getOperand(1).getReg());
457 DestName = getRegName(MI->getOperand(0).getReg());
458 DecodeUNPCKHMask(MVT::v32i8, ShuffleMask);
459 break;
460 case X86::PUNPCKHWDrr:
461 case X86::VPUNPCKHWDrr:
462 Src2Name = getRegName(MI->getOperand(2).getReg());
463 // FALL THROUGH.
464 case X86::PUNPCKHWDrm:
465 case X86::VPUNPCKHWDrm:
466 Src1Name = getRegName(MI->getOperand(1).getReg());
467 DestName = getRegName(MI->getOperand(0).getReg());
468 DecodeUNPCKHMask(MVT::v8i16, ShuffleMask);
469 break;
470 case X86::VPUNPCKHWDYrr:
471 Src2Name = getRegName(MI->getOperand(2).getReg());
472 // FALL THROUGH.
473 case X86::VPUNPCKHWDYrm:
474 Src1Name = getRegName(MI->getOperand(1).getReg());
475 DestName = getRegName(MI->getOperand(0).getReg());
476 DecodeUNPCKHMask(MVT::v16i16, ShuffleMask);
477 break;
478 case X86::PUNPCKHDQrr:
479 case X86::VPUNPCKHDQrr:
480 Src2Name = getRegName(MI->getOperand(2).getReg());
481 // FALL THROUGH.
482 case X86::PUNPCKHDQrm:
483 case X86::VPUNPCKHDQrm:
484 Src1Name = getRegName(MI->getOperand(1).getReg());
485 DestName = getRegName(MI->getOperand(0).getReg());
486 DecodeUNPCKHMask(MVT::v4i32, ShuffleMask);
487 break;
488 case X86::VPUNPCKHDQYrr:
489 Src2Name = getRegName(MI->getOperand(2).getReg());
490 // FALL THROUGH.
491 case X86::VPUNPCKHDQYrm:
492 Src1Name = getRegName(MI->getOperand(1).getReg());
493 DestName = getRegName(MI->getOperand(0).getReg());
494 DecodeUNPCKHMask(MVT::v8i32, ShuffleMask);
495 break;
496 case X86::VPUNPCKHDQZrr:
497 Src2Name = getRegName(MI->getOperand(2).getReg());
498 // FALL THROUGH.
499 case X86::VPUNPCKHDQZrm:
500 Src1Name = getRegName(MI->getOperand(1).getReg());
501 DestName = getRegName(MI->getOperand(0).getReg());
502 DecodeUNPCKHMask(MVT::v16i32, ShuffleMask);
503 break;
504 case X86::PUNPCKHQDQrr:
505 case X86::VPUNPCKHQDQrr:
506 Src2Name = getRegName(MI->getOperand(2).getReg());
507 // FALL THROUGH.
508 case X86::PUNPCKHQDQrm:
509 case X86::VPUNPCKHQDQrm:
510 Src1Name = getRegName(MI->getOperand(1).getReg());
511 DestName = getRegName(MI->getOperand(0).getReg());
512 DecodeUNPCKHMask(MVT::v2i64, ShuffleMask);
513 break;
514 case X86::VPUNPCKHQDQYrr:
515 Src2Name = getRegName(MI->getOperand(2).getReg());
516 // FALL THROUGH.
517 case X86::VPUNPCKHQDQYrm:
518 Src1Name = getRegName(MI->getOperand(1).getReg());
519 DestName = getRegName(MI->getOperand(0).getReg());
520 DecodeUNPCKHMask(MVT::v4i64, ShuffleMask);
521 break;
522 case X86::VPUNPCKHQDQZrr:
523 Src2Name = getRegName(MI->getOperand(2).getReg());
524 // FALL THROUGH.
525 case X86::VPUNPCKHQDQZrm:
526 Src1Name = getRegName(MI->getOperand(1).getReg());
527 DestName = getRegName(MI->getOperand(0).getReg());
528 DecodeUNPCKHMask(MVT::v8i64, ShuffleMask);
529 break;
530
531 case X86::PUNPCKLBWrr:
532 case X86::VPUNPCKLBWrr:
533 Src2Name = getRegName(MI->getOperand(2).getReg());
534 // FALL THROUGH.
535 case X86::PUNPCKLBWrm:
536 case X86::VPUNPCKLBWrm:
537 Src1Name = getRegName(MI->getOperand(1).getReg());
538 DestName = getRegName(MI->getOperand(0).getReg());
539 DecodeUNPCKLMask(MVT::v16i8, ShuffleMask);
540 break;
541 case X86::VPUNPCKLBWYrr:
542 Src2Name = getRegName(MI->getOperand(2).getReg());
543 // FALL THROUGH.
544 case X86::VPUNPCKLBWYrm:
545 Src1Name = getRegName(MI->getOperand(1).getReg());
546 DestName = getRegName(MI->getOperand(0).getReg());
547 DecodeUNPCKLMask(MVT::v32i8, ShuffleMask);
548 break;
549 case X86::PUNPCKLWDrr:
550 case X86::VPUNPCKLWDrr:
551 Src2Name = getRegName(MI->getOperand(2).getReg());
552 // FALL THROUGH.
553 case X86::PUNPCKLWDrm:
554 case X86::VPUNPCKLWDrm:
555 Src1Name = getRegName(MI->getOperand(1).getReg());
556 DestName = getRegName(MI->getOperand(0).getReg());
557 DecodeUNPCKLMask(MVT::v8i16, ShuffleMask);
558 break;
559 case X86::VPUNPCKLWDYrr:
560 Src2Name = getRegName(MI->getOperand(2).getReg());
561 // FALL THROUGH.
562 case X86::VPUNPCKLWDYrm:
563 Src1Name = getRegName(MI->getOperand(1).getReg());
564 DestName = getRegName(MI->getOperand(0).getReg());
565 DecodeUNPCKLMask(MVT::v16i16, ShuffleMask);
566 break;
567 case X86::PUNPCKLDQrr:
568 case X86::VPUNPCKLDQrr:
569 Src2Name = getRegName(MI->getOperand(2).getReg());
570 // FALL THROUGH.
571 case X86::PUNPCKLDQrm:
572 case X86::VPUNPCKLDQrm:
573 Src1Name = getRegName(MI->getOperand(1).getReg());
574 DestName = getRegName(MI->getOperand(0).getReg());
575 DecodeUNPCKLMask(MVT::v4i32, ShuffleMask);
576 break;
577 case X86::VPUNPCKLDQYrr:
578 Src2Name = getRegName(MI->getOperand(2).getReg());
579 // FALL THROUGH.
580 case X86::VPUNPCKLDQYrm:
581 Src1Name = getRegName(MI->getOperand(1).getReg());
582 DestName = getRegName(MI->getOperand(0).getReg());
583 DecodeUNPCKLMask(MVT::v8i32, ShuffleMask);
584 break;
585 case X86::VPUNPCKLDQZrr:
586 Src2Name = getRegName(MI->getOperand(2).getReg());
587 // FALL THROUGH.
588 case X86::VPUNPCKLDQZrm:
589 Src1Name = getRegName(MI->getOperand(1).getReg());
590 DestName = getRegName(MI->getOperand(0).getReg());
591 DecodeUNPCKLMask(MVT::v16i32, ShuffleMask);
592 break;
593 case X86::PUNPCKLQDQrr:
594 case X86::VPUNPCKLQDQrr:
595 Src2Name = getRegName(MI->getOperand(2).getReg());
596 // FALL THROUGH.
597 case X86::PUNPCKLQDQrm:
598 case X86::VPUNPCKLQDQrm:
599 Src1Name = getRegName(MI->getOperand(1).getReg());
600 DestName = getRegName(MI->getOperand(0).getReg());
601 DecodeUNPCKLMask(MVT::v2i64, ShuffleMask);
602 break;
603 case X86::VPUNPCKLQDQYrr:
604 Src2Name = getRegName(MI->getOperand(2).getReg());
605 // FALL THROUGH.
606 case X86::VPUNPCKLQDQYrm:
607 Src1Name = getRegName(MI->getOperand(1).getReg());
608 DestName = getRegName(MI->getOperand(0).getReg());
609 DecodeUNPCKLMask(MVT::v4i64, ShuffleMask);
610 break;
611 case X86::VPUNPCKLQDQZrr:
612 Src2Name = getRegName(MI->getOperand(2).getReg());
613 // FALL THROUGH.
614 case X86::VPUNPCKLQDQZrm:
615 Src1Name = getRegName(MI->getOperand(1).getReg());
616 DestName = getRegName(MI->getOperand(0).getReg());
617 DecodeUNPCKLMask(MVT::v8i64, ShuffleMask);
618 break;
619
620 case X86::SHUFPDrri:
621 case X86::VSHUFPDrri:
622 Src2Name = getRegName(MI->getOperand(2).getReg());
623 // FALL THROUGH.
624 case X86::SHUFPDrmi:
625 case X86::VSHUFPDrmi:
626 if(MI->getOperand(MI->getNumOperands()-1).isImm())
627 DecodeSHUFPMask(MVT::v2f64,
628 MI->getOperand(MI->getNumOperands()-1).getImm(),
629 ShuffleMask);
630 Src1Name = getRegName(MI->getOperand(1).getReg());
631 DestName = getRegName(MI->getOperand(0).getReg());
632 break;
633 case X86::VSHUFPDYrri:
634 Src2Name = getRegName(MI->getOperand(2).getReg());
635 // FALL THROUGH.
636 case X86::VSHUFPDYrmi:
637 if(MI->getOperand(MI->getNumOperands()-1).isImm())
638 DecodeSHUFPMask(MVT::v4f64,
639 MI->getOperand(MI->getNumOperands()-1).getImm(),
640 ShuffleMask);
641 Src1Name = getRegName(MI->getOperand(1).getReg());
642 DestName = getRegName(MI->getOperand(0).getReg());
643 break;
644
645 case X86::SHUFPSrri:
646 case X86::VSHUFPSrri:
647 Src2Name = getRegName(MI->getOperand(2).getReg());
648 // FALL THROUGH.
649 case X86::SHUFPSrmi:
650 case X86::VSHUFPSrmi:
651 if(MI->getOperand(MI->getNumOperands()-1).isImm())
652 DecodeSHUFPMask(MVT::v4f32,
653 MI->getOperand(MI->getNumOperands()-1).getImm(),
654 ShuffleMask);
655 Src1Name = getRegName(MI->getOperand(1).getReg());
656 DestName = getRegName(MI->getOperand(0).getReg());
657 break;
658 case X86::VSHUFPSYrri:
659 Src2Name = getRegName(MI->getOperand(2).getReg());
660 // FALL THROUGH.
661 case X86::VSHUFPSYrmi:
662 if(MI->getOperand(MI->getNumOperands()-1).isImm())
663 DecodeSHUFPMask(MVT::v8f32,
664 MI->getOperand(MI->getNumOperands()-1).getImm(),
665 ShuffleMask);
666 Src1Name = getRegName(MI->getOperand(1).getReg());
667 DestName = getRegName(MI->getOperand(0).getReg());
668 break;
669
670 case X86::UNPCKLPDrr:
671 case X86::VUNPCKLPDrr:
672 Src2Name = getRegName(MI->getOperand(2).getReg());
673 // FALL THROUGH.
674 case X86::UNPCKLPDrm:
675 case X86::VUNPCKLPDrm:
676 DecodeUNPCKLMask(MVT::v2f64, ShuffleMask);
677 Src1Name = getRegName(MI->getOperand(1).getReg());
678 DestName = getRegName(MI->getOperand(0).getReg());
679 break;
680 case X86::VUNPCKLPDYrr:
681 Src2Name = getRegName(MI->getOperand(2).getReg());
682 // FALL THROUGH.
683 case X86::VUNPCKLPDYrm:
684 DecodeUNPCKLMask(MVT::v4f64, ShuffleMask);
685 Src1Name = getRegName(MI->getOperand(1).getReg());
686 DestName = getRegName(MI->getOperand(0).getReg());
687 break;
688 case X86::VUNPCKLPDZrr:
689 Src2Name = getRegName(MI->getOperand(2).getReg());
690 // FALL THROUGH.
691 case X86::VUNPCKLPDZrm:
692 DecodeUNPCKLMask(MVT::v8f64, ShuffleMask);
693 Src1Name = getRegName(MI->getOperand(1).getReg());
694 DestName = getRegName(MI->getOperand(0).getReg());
695 break;
696 case X86::UNPCKLPSrr:
697 case X86::VUNPCKLPSrr:
698 Src2Name = getRegName(MI->getOperand(2).getReg());
699 // FALL THROUGH.
700 case X86::UNPCKLPSrm:
701 case X86::VUNPCKLPSrm:
702 DecodeUNPCKLMask(MVT::v4f32, ShuffleMask);
703 Src1Name = getRegName(MI->getOperand(1).getReg());
704 DestName = getRegName(MI->getOperand(0).getReg());
705 break;
706 case X86::VUNPCKLPSYrr:
707 Src2Name = getRegName(MI->getOperand(2).getReg());
708 // FALL THROUGH.
709 case X86::VUNPCKLPSYrm:
710 DecodeUNPCKLMask(MVT::v8f32, ShuffleMask);
711 Src1Name = getRegName(MI->getOperand(1).getReg());
712 DestName = getRegName(MI->getOperand(0).getReg());
713 break;
714 case X86::VUNPCKLPSZrr:
715 Src2Name = getRegName(MI->getOperand(2).getReg());
716 // FALL THROUGH.
717 case X86::VUNPCKLPSZrm:
718 DecodeUNPCKLMask(MVT::v16f32, ShuffleMask);
719 Src1Name = getRegName(MI->getOperand(1).getReg());
720 DestName = getRegName(MI->getOperand(0).getReg());
721 break;
722 case X86::UNPCKHPDrr:
723 case X86::VUNPCKHPDrr:
724 Src2Name = getRegName(MI->getOperand(2).getReg());
725 // FALL THROUGH.
726 case X86::UNPCKHPDrm:
727 case X86::VUNPCKHPDrm:
728 DecodeUNPCKHMask(MVT::v2f64, ShuffleMask);
729 Src1Name = getRegName(MI->getOperand(1).getReg());
730 DestName = getRegName(MI->getOperand(0).getReg());
731 break;
732 case X86::VUNPCKHPDYrr:
733 Src2Name = getRegName(MI->getOperand(2).getReg());
734 // FALL THROUGH.
735 case X86::VUNPCKHPDYrm:
736 DecodeUNPCKHMask(MVT::v4f64, ShuffleMask);
737 Src1Name = getRegName(MI->getOperand(1).getReg());
738 DestName = getRegName(MI->getOperand(0).getReg());
739 break;
740 case X86::VUNPCKHPDZrr:
741 Src2Name = getRegName(MI->getOperand(2).getReg());
742 // FALL THROUGH.
743 case X86::VUNPCKHPDZrm:
744 DecodeUNPCKHMask(MVT::v8f64, ShuffleMask);
745 Src1Name = getRegName(MI->getOperand(1).getReg());
746 DestName = getRegName(MI->getOperand(0).getReg());
747 break;
748 case X86::UNPCKHPSrr:
749 case X86::VUNPCKHPSrr:
750 Src2Name = getRegName(MI->getOperand(2).getReg());
751 // FALL THROUGH.
752 case X86::UNPCKHPSrm:
753 case X86::VUNPCKHPSrm:
754 DecodeUNPCKHMask(MVT::v4f32, ShuffleMask);
755 Src1Name = getRegName(MI->getOperand(1).getReg());
756 DestName = getRegName(MI->getOperand(0).getReg());
757 break;
758 case X86::VUNPCKHPSYrr:
759 Src2Name = getRegName(MI->getOperand(2).getReg());
760 // FALL THROUGH.
761 case X86::VUNPCKHPSYrm:
762 DecodeUNPCKHMask(MVT::v8f32, ShuffleMask);
763 Src1Name = getRegName(MI->getOperand(1).getReg());
764 DestName = getRegName(MI->getOperand(0).getReg());
765 break;
766 case X86::VUNPCKHPSZrr:
767 Src2Name = getRegName(MI->getOperand(2).getReg());
768 // FALL THROUGH.
769 case X86::VUNPCKHPSZrm:
770 DecodeUNPCKHMask(MVT::v16f32, ShuffleMask);
771 Src1Name = getRegName(MI->getOperand(1).getReg());
772 DestName = getRegName(MI->getOperand(0).getReg());
773 break;
774 case X86::VPERMILPSri:
775 Src1Name = getRegName(MI->getOperand(1).getReg());
776 // FALL THROUGH.
777 case X86::VPERMILPSmi:
778 if(MI->getOperand(MI->getNumOperands()-1).isImm())
779 DecodePSHUFMask(MVT::v4f32,
780 MI->getOperand(MI->getNumOperands()-1).getImm(),
781 ShuffleMask);
782 DestName = getRegName(MI->getOperand(0).getReg());
783 break;
784 case X86::VPERMILPSYri:
785 Src1Name = getRegName(MI->getOperand(1).getReg());
786 // FALL THROUGH.
787 case X86::VPERMILPSYmi:
788 if(MI->getOperand(MI->getNumOperands()-1).isImm())
789 DecodePSHUFMask(MVT::v8f32,
790 MI->getOperand(MI->getNumOperands()-1).getImm(),
791 ShuffleMask);
792 DestName = getRegName(MI->getOperand(0).getReg());
793 break;
794 case X86::VPERMILPDri:
795 Src1Name = getRegName(MI->getOperand(1).getReg());
796 // FALL THROUGH.
797 case X86::VPERMILPDmi:
798 if(MI->getOperand(MI->getNumOperands()-1).isImm())
799 DecodePSHUFMask(MVT::v2f64,
800 MI->getOperand(MI->getNumOperands()-1).getImm(),
801 ShuffleMask);
802 DestName = getRegName(MI->getOperand(0).getReg());
803 break;
804 case X86::VPERMILPDYri:
805 Src1Name = getRegName(MI->getOperand(1).getReg());
806 // FALL THROUGH.
807 case X86::VPERMILPDYmi:
808 if(MI->getOperand(MI->getNumOperands()-1).isImm())
809 DecodePSHUFMask(MVT::v4f64,
810 MI->getOperand(MI->getNumOperands()-1).getImm(),
811 ShuffleMask);
812 DestName = getRegName(MI->getOperand(0).getReg());
813 break;
814 case X86::VPERM2F128rr:
815 case X86::VPERM2I128rr:
816 Src2Name = getRegName(MI->getOperand(2).getReg());
817 // FALL THROUGH.
818 case X86::VPERM2F128rm:
819 case X86::VPERM2I128rm:
820 // For instruction comments purpose, assume the 256-bit vector is v4i64.
821 if(MI->getOperand(MI->getNumOperands()-1).isImm())
822 DecodeVPERM2X128Mask(MVT::v4i64,
823 MI->getOperand(MI->getNumOperands()-1).getImm(),
824 ShuffleMask);
825 Src1Name = getRegName(MI->getOperand(1).getReg());
826 DestName = getRegName(MI->getOperand(0).getReg());
827 break;
828 case X86::VPERMQYri:
829 case X86::VPERMPDYri:
830 Src1Name = getRegName(MI->getOperand(1).getReg());
831 // FALL THROUGH.
832 case X86::VPERMQYmi:
833 case X86::VPERMPDYmi:
834 if(MI->getOperand(MI->getNumOperands()-1).isImm())
835 DecodeVPERMMask(MI->getOperand(MI->getNumOperands()-1).getImm(),
836 ShuffleMask);
837 DestName = getRegName(MI->getOperand(0).getReg());
838 break;
839
840 case X86::MOVSDrr:
841 case X86::VMOVSDrr:
842 Src2Name = getRegName(MI->getOperand(2).getReg());
843 Src1Name = getRegName(MI->getOperand(1).getReg());
844 // FALL THROUGH.
845 case X86::MOVSDrm:
846 case X86::VMOVSDrm:
847 DecodeScalarMoveMask(MVT::v2f64, nullptr == Src2Name, ShuffleMask);
848 DestName = getRegName(MI->getOperand(0).getReg());
849 break;
850 case X86::MOVSSrr:
851 case X86::VMOVSSrr:
852 Src2Name = getRegName(MI->getOperand(2).getReg());
853 Src1Name = getRegName(MI->getOperand(1).getReg());
854 // FALL THROUGH.
855 case X86::MOVSSrm:
856 case X86::VMOVSSrm:
857 DecodeScalarMoveMask(MVT::v4f32, nullptr == Src2Name, ShuffleMask);
858 DestName = getRegName(MI->getOperand(0).getReg());
859 break;
860
861 case X86::MOVPQI2QIrr:
862 case X86::MOVZPQILo2PQIrr:
863 case X86::VMOVPQI2QIrr:
864 case X86::VMOVZPQILo2PQIrr:
865 Src1Name = getRegName(MI->getOperand(1).getReg());
866 // FALL THROUGH.
867 case X86::MOVQI2PQIrm:
868 case X86::MOVZQI2PQIrm:
869 case X86::MOVZPQILo2PQIrm:
870 case X86::VMOVQI2PQIrm:
871 case X86::VMOVZQI2PQIrm:
872 case X86::VMOVZPQILo2PQIrm:
873 DecodeZeroMoveLowMask(MVT::v2i64, ShuffleMask);
874 DestName = getRegName(MI->getOperand(0).getReg());
875 break;
876 case X86::MOVDI2PDIrm:
877 case X86::VMOVDI2PDIrm:
878 DecodeZeroMoveLowMask(MVT::v4i32, ShuffleMask);
879 DestName = getRegName(MI->getOperand(0).getReg());
880 break;
881
882 case X86::PMOVZXBWrr:
883 case X86::PMOVZXBDrr:
884 case X86::PMOVZXBQrr:
885 case X86::PMOVZXWDrr:
886 case X86::PMOVZXWQrr:
887 case X86::PMOVZXDQrr:
888 case X86::VPMOVZXBWrr:
889 case X86::VPMOVZXBDrr:
890 case X86::VPMOVZXBQrr:
891 case X86::VPMOVZXWDrr:
892 case X86::VPMOVZXWQrr:
893 case X86::VPMOVZXDQrr:
894 case X86::VPMOVZXBWYrr:
895 case X86::VPMOVZXBDYrr:
896 case X86::VPMOVZXBQYrr:
897 case X86::VPMOVZXWDYrr:
898 case X86::VPMOVZXWQYrr:
899 case X86::VPMOVZXDQYrr:
900 Src1Name = getRegName(MI->getOperand(1).getReg());
901 // FALL THROUGH.
902 case X86::PMOVZXBWrm:
903 case X86::PMOVZXBDrm:
904 case X86::PMOVZXBQrm:
905 case X86::PMOVZXWDrm:
906 case X86::PMOVZXWQrm:
907 case X86::PMOVZXDQrm:
908 case X86::VPMOVZXBWrm:
909 case X86::VPMOVZXBDrm:
910 case X86::VPMOVZXBQrm:
911 case X86::VPMOVZXWDrm:
912 case X86::VPMOVZXWQrm:
913 case X86::VPMOVZXDQrm:
914 case X86::VPMOVZXBWYrm:
915 case X86::VPMOVZXBDYrm:
916 case X86::VPMOVZXBQYrm:
917 case X86::VPMOVZXWDYrm:
918 case X86::VPMOVZXWQYrm:
919 case X86::VPMOVZXDQYrm: {
920 MVT SrcVT, DstVT;
921 getZeroExtensionTypes(MI, SrcVT, DstVT);
922 DecodeZeroExtendMask(SrcVT, DstVT, ShuffleMask);
923 DestName = getRegName(MI->getOperand(0).getReg());
924 } break;
925 }
926
927 // The only comments we decode are shuffles, so give up if we were unable to
928 // decode a shuffle mask.
929 if (ShuffleMask.empty())
930 return false;
931
932 if (!DestName) DestName = Src1Name;
933 OS << (DestName ? DestName : "mem") << " = ";
934
935 // If the two sources are the same, canonicalize the input elements to be
936 // from the first src so that we get larger element spans.
937 if (Src1Name == Src2Name) {
938 for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) {
939 if ((int)ShuffleMask[i] >= 0 && // Not sentinel.
940 ShuffleMask[i] >= (int)e) // From second mask.
941 ShuffleMask[i] -= e;
942 }
943 }
944
945 // The shuffle mask specifies which elements of the src1/src2 fill in the
946 // destination, with a few sentinel values. Loop through and print them
947 // out.
948 for (unsigned i = 0, e = ShuffleMask.size(); i != e; ++i) {
949 if (i != 0)
950 OS << ',';
951 if (ShuffleMask[i] == SM_SentinelZero) {
952 OS << "zero";
953 continue;
954 }
955
956 // Otherwise, it must come from src1 or src2. Print the span of elements
957 // that comes from this src.
958 bool isSrc1 = ShuffleMask[i] < (int)ShuffleMask.size();
959 const char *SrcName = isSrc1 ? Src1Name : Src2Name;
960 OS << (SrcName ? SrcName : "mem") << '[';
961 bool IsFirst = true;
962 while (i != e && (int)ShuffleMask[i] != SM_SentinelZero &&
963 (ShuffleMask[i] < (int)ShuffleMask.size()) == isSrc1) {
964 if (!IsFirst)
965 OS << ',';
966 else
967 IsFirst = false;
968 if (ShuffleMask[i] == SM_SentinelUndef)
969 OS << "u";
970 else
971 OS << ShuffleMask[i] % ShuffleMask.size();
972 ++i;
973 }
974 OS << ']';
975 --i; // For loop increments element #.
976 }
977 //MI->print(OS, 0);
978 OS << "\n";
979
980 // We successfully added a comment to this instruction.
981 return true;
982 }
983