1 //===------------------- StackMaps.h - StackMaps ----------------*- C++ -*-===//
2 
3 //
4 //                     The LLVM Compiler Infrastructure
5 //
6 // This file is distributed under the University of Illinois Open Source
7 // License. See LICENSE.TXT for details.
8 //
9 //===----------------------------------------------------------------------===//
10 
11 #ifndef LLVM_CODEGEN_STACKMAPS_H
12 #define LLVM_CODEGEN_STACKMAPS_H
13 
14 #include "llvm/ADT/MapVector.h"
15 #include "llvm/ADT/SmallVector.h"
16 #include "llvm/CodeGen/MachineInstr.h"
17 #include "llvm/Support/Debug.h"
18 #include <map>
19 #include <vector>
20 
21 namespace llvm {
22 
23 class AsmPrinter;
24 class MCExpr;
25 class MCStreamer;
26 
27 /// \brief MI-level patchpoint operands.
28 ///
29 /// MI patchpoint operations take the form:
30 /// [<def>], <id>, <numBytes>, <target>, <numArgs>, <cc>, ...
31 ///
32 /// IR patchpoint intrinsics do not have the <cc> operand because calling
33 /// convention is part of the subclass data.
34 ///
35 /// SD patchpoint nodes do not have a def operand because it is part of the
36 /// SDValue.
37 ///
38 /// Patchpoints following the anyregcc convention are handled specially. For
39 /// these, the stack map also records the location of the return value and
40 /// arguments.
41 class PatchPointOpers {
42 public:
43   /// Enumerate the meta operands.
44   enum { IDPos, NBytesPos, TargetPos, NArgPos, CCPos, MetaEnd };
45 private:
46   const MachineInstr *MI;
47   bool HasDef;
48   bool IsAnyReg;
49 public:
50   explicit PatchPointOpers(const MachineInstr *MI);
51 
isAnyReg()52   bool isAnyReg() const { return IsAnyReg; }
hasDef()53   bool hasDef() const { return HasDef; }
54 
55   unsigned getMetaIdx(unsigned Pos = 0) const {
56     assert(Pos < MetaEnd && "Meta operand index out of range.");
57     return (HasDef ? 1 : 0) + Pos;
58   }
59 
getMetaOper(unsigned Pos)60   const MachineOperand &getMetaOper(unsigned Pos) {
61     return MI->getOperand(getMetaIdx(Pos));
62   }
63 
getArgIdx()64   unsigned getArgIdx() const { return getMetaIdx() + MetaEnd; }
65 
66   /// Get the operand index of the variable list of non-argument operands.
67   /// These hold the "live state".
getVarIdx()68   unsigned getVarIdx() const {
69     return getMetaIdx() + MetaEnd
70       + MI->getOperand(getMetaIdx(NArgPos)).getImm();
71   }
72 
73   /// Get the index at which stack map locations will be recorded.
74   /// Arguments are not recorded unless the anyregcc convention is used.
getStackMapStartIdx()75   unsigned getStackMapStartIdx() const {
76     if (IsAnyReg)
77       return getArgIdx();
78     return getVarIdx();
79   }
80 
81   /// \brief Get the next scratch register operand index.
82   unsigned getNextScratchIdx(unsigned StartIdx = 0) const;
83 };
84 
85 /// MI-level Statepoint operands
86 ///
87 /// Statepoint operands take the form:
88 ///   <num call arguments>, <call target>, [call arguments],
89 ///   <StackMaps::ConstantOp>, <flags>,
90 ///   <StackMaps::ConstantOp>, <num other args>, [other args],
91 ///   [gc values]
92 class StatepointOpers {
93 private:
94   enum {
95     NCallArgsPos = 0,
96     CallTargetPos = 1
97   };
98 
99 public:
StatepointOpers(const MachineInstr * MI)100   explicit StatepointOpers(const MachineInstr *MI):
101     MI(MI) { }
102 
103   /// Get starting index of non call related arguments
104   /// (statepoint flags, vm state and gc state).
getVarIdx()105   unsigned getVarIdx() const {
106     return MI->getOperand(NCallArgsPos).getImm() + 2;
107   }
108 
109   /// Returns the index of the operand containing the number of non-gc non-call
110   /// arguments.
getNumVMSArgsIdx()111   unsigned getNumVMSArgsIdx() const {
112     return getVarIdx() + 3;
113   }
114 
115   /// Returns the number of non-gc non-call arguments attached to the
116   /// statepoint.  Note that this is the number of arguments, not the number of
117   /// operands required to represent those arguments.
getNumVMSArgs()118   unsigned getNumVMSArgs() const {
119     return MI->getOperand(getNumVMSArgsIdx()).getImm();
120   }
121 
122   /// Returns the target of the underlying call.
getCallTarget()123   const MachineOperand &getCallTarget() const {
124     return MI->getOperand(CallTargetPos);
125   }
126 
127 private:
128   const MachineInstr *MI;
129 };
130 
131 class StackMaps {
132 public:
133   struct Location {
134     enum LocationType { Unprocessed, Register, Direct, Indirect, Constant,
135                         ConstantIndex };
136     LocationType LocType;
137     unsigned Size;
138     unsigned Reg;
139     int64_t Offset;
LocationLocation140     Location() : LocType(Unprocessed), Size(0), Reg(0), Offset(0) {}
LocationLocation141     Location(LocationType LocType, unsigned Size, unsigned Reg, int64_t Offset)
142       : LocType(LocType), Size(Size), Reg(Reg), Offset(Offset) {}
143   };
144 
145   struct LiveOutReg {
146     unsigned short Reg;
147     unsigned short RegNo;
148     unsigned short Size;
149 
LiveOutRegLiveOutReg150     LiveOutReg() : Reg(0), RegNo(0), Size(0) {}
LiveOutRegLiveOutReg151     LiveOutReg(unsigned short Reg, unsigned short RegNo, unsigned short Size)
152       : Reg(Reg), RegNo(RegNo), Size(Size) {}
153 
MarkInvalidLiveOutReg154     void MarkInvalid() { Reg = 0; }
155 
156     // Only sort by the dwarf register number.
157     bool operator< (const LiveOutReg &LO) const { return RegNo < LO.RegNo; }
IsInvalidLiveOutReg158     static bool IsInvalid(const LiveOutReg &LO) { return LO.Reg == 0; }
159   };
160 
161   // OpTypes are used to encode information about the following logical
162   // operand (which may consist of several MachineOperands) for the
163   // OpParser.
164   typedef enum { DirectMemRefOp, IndirectMemRefOp, ConstantOp } OpType;
165 
166   StackMaps(AsmPrinter &AP);
167 
reset()168   void reset() {
169     CSInfos.clear();
170     ConstPool.clear();
171     FnStackSize.clear();
172   }
173 
174   /// \brief Generate a stackmap record for a stackmap instruction.
175   ///
176   /// MI must be a raw STACKMAP, not a PATCHPOINT.
177   void recordStackMap(const MachineInstr &MI);
178 
179   /// \brief Generate a stackmap record for a patchpoint instruction.
180   void recordPatchPoint(const MachineInstr &MI);
181 
182   /// \brief Generate a stackmap record for a statepoint instruction.
183   void recordStatepoint(const MachineInstr &MI);
184 
185   /// If there is any stack map data, create a stack map section and serialize
186   /// the map info into it. This clears the stack map data structures
187   /// afterwards.
188   void serializeToStackMapSection();
189 
190 private:
191   static const char *WSMP;
192   typedef SmallVector<Location, 8> LocationVec;
193   typedef SmallVector<LiveOutReg, 8> LiveOutVec;
194   typedef MapVector<uint64_t, uint64_t> ConstantPool;
195   typedef MapVector<const MCSymbol *, uint64_t> FnStackSizeMap;
196 
197   struct CallsiteInfo {
198     const MCExpr *CSOffsetExpr;
199     uint64_t ID;
200     LocationVec Locations;
201     LiveOutVec LiveOuts;
CallsiteInfoCallsiteInfo202     CallsiteInfo() : CSOffsetExpr(nullptr), ID(0) {}
CallsiteInfoCallsiteInfo203     CallsiteInfo(const MCExpr *CSOffsetExpr, uint64_t ID,
204                  LocationVec &&Locations, LiveOutVec &&LiveOuts)
205       : CSOffsetExpr(CSOffsetExpr), ID(ID), Locations(std::move(Locations)),
206         LiveOuts(std::move(LiveOuts)) {}
207   };
208 
209   typedef std::vector<CallsiteInfo> CallsiteInfoList;
210 
211   AsmPrinter &AP;
212   CallsiteInfoList CSInfos;
213   ConstantPool ConstPool;
214   FnStackSizeMap FnStackSize;
215 
216   MachineInstr::const_mop_iterator
217   parseOperand(MachineInstr::const_mop_iterator MOI,
218                MachineInstr::const_mop_iterator MOE,
219                LocationVec &Locs, LiveOutVec &LiveOuts) const;
220 
221   /// \brief Create a live-out register record for the given register @p Reg.
222   LiveOutReg createLiveOutReg(unsigned Reg,
223                               const TargetRegisterInfo *TRI) const;
224 
225   /// \brief Parse the register live-out mask and return a vector of live-out
226   /// registers that need to be recorded in the stackmap.
227   LiveOutVec parseRegisterLiveOutMask(const uint32_t *Mask) const;
228 
229   /// This should be called by the MC lowering code _immediately_ before
230   /// lowering the MI to an MCInst. It records where the operands for the
231   /// instruction are stored, and outputs a label to record the offset of
232   /// the call from the start of the text section. In special cases (e.g. AnyReg
233   /// calling convention) the return register is also recorded if requested.
234   void recordStackMapOpers(const MachineInstr &MI, uint64_t ID,
235                            MachineInstr::const_mop_iterator MOI,
236                            MachineInstr::const_mop_iterator MOE,
237                            bool recordResult = false);
238 
239   /// \brief Emit the stackmap header.
240   void emitStackmapHeader(MCStreamer &OS);
241 
242   /// \brief Emit the function frame record for each function.
243   void emitFunctionFrameRecords(MCStreamer &OS);
244 
245   /// \brief Emit the constant pool.
246   void emitConstantPoolEntries(MCStreamer &OS);
247 
248   /// \brief Emit the callsite info for each stackmap/patchpoint intrinsic call.
249   void emitCallsiteEntries(MCStreamer &OS);
250 
251   void print(raw_ostream &OS);
debug()252   void debug() { print(dbgs()); }
253 };
254 
255 }
256 
257 #endif
258