1; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck -check-prefix=SI %s
2; RUN: llc < %s -march=amdgcn -mcpu=tonga -verify-machineinstrs | FileCheck -check-prefix=SI %s
3
4; SI-LABEL: {{^}}vector_imin:
5; SI: v_min_i32_e32
6define void @vector_imin(i32 %p0, i32 %p1, i32 addrspace(1)* %in) #0 {
7main_body:
8  %load = load i32, i32 addrspace(1)* %in, align 4
9  %min = call i32 @llvm.AMDGPU.imin(i32 %p0, i32 %load)
10  %bc = bitcast i32 %min to float
11  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %bc, float %bc, float %bc, float %bc)
12  ret void
13}
14
15; SI-LABEL: {{^}}scalar_imin:
16; SI: s_min_i32
17define void @scalar_imin(i32 %p0, i32 %p1) #0 {
18entry:
19  %min = call i32 @llvm.AMDGPU.imin(i32 %p0, i32 %p1)
20  %bc = bitcast i32 %min to float
21  call void @llvm.SI.export(i32 15, i32 1, i32 1, i32 0, i32 0, float %bc, float %bc, float %bc, float %bc)
22  ret void
23}
24
25; Function Attrs: readnone
26declare i32 @llvm.AMDGPU.imin(i32, i32) #1
27
28declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
29
30attributes #0 = { nounwind }
31attributes #1 = { nounwind readnone }
32
33!0 = !{!"const", null, i32 1}
34