Searched refs:A1 (Results 1 – 9 of 9) sorted by relevance
| /art/compiler/jni/quick/mips/ |
| D | calling_convention_mips.cc | 95 entry_spills_.push_back(MipsManagedRegister::FromCoreRegister(A1)); in EntrySpills()
187 A0, A1, A2, A3
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| /art/runtime/arch/mips/ |
| D | registers_mips.h | 35 A1 = 5, enumerator
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| D | quick_method_frame_info_mips.h | 32 (1 << art::mips::A1) | (1 << art::mips::A2) | (1 << art::mips::A3);
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| D | context_mips.cc | 76 gprs_[A1] = nullptr; in SmashCallerSaves()
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| /art/runtime/arch/mips64/ |
| D | registers_mips64.h | 35 A1 = 5, enumerator
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| D | quick_method_frame_info_mips64.h | 33 (1 << art::mips64::A1) | (1 << art::mips64::A2) | (1 << art::mips64::A3) |
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| D | context_mips64.cc | 76 gprs_[A1] = nullptr; in SmashCallerSaves()
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| /art/compiler/optimizing/ |
| D | code_generator_mips64.h | 37 { A1, A2, A3, A4, A5, A6, A7 };
48 { A0, A1, A2, A3, A4, A5, A6, A7 };
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| /art/compiler/jni/quick/mips64/ |
| D | calling_convention_mips64.cc | 27 A0, A1, A2, A3, A4, A5, A6, A7
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