Searched refs:ArenaVector (Results 1 – 13 of 13) sorted by relevance
407 ArenaVector<BasicBlockId> predecessors;408 ArenaVector<SuccessorBlockInfo*> successor_blocks;524 ArenaVector<SuccessorBlockInfo*>::const_iterator successor_iter_;639 const ArenaVector<BasicBlock*>& GetBlockList() { in GetBlockList()643 const ArenaVector<BasicBlockId>& GetDfsOrder() { in GetDfsOrder()647 const ArenaVector<BasicBlockId>& GetDfsPostOrder() { in GetDfsPostOrder()651 const ArenaVector<BasicBlockId>& GetDomPostOrder() { in GetDomPostOrder()755 const ArenaVector<BasicBlockId>& GetTopologicalSortOrder() { in GetTopologicalSortOrder()760 const ArenaVector<BasicBlockId>& GetTopologicalSortOrderLoopEnds() { in GetTopologicalSortOrderLoopEnds()765 const ArenaVector<BasicBlockId>& GetTopologicalSortOrderIndexes() { in GetTopologicalSortOrderIndexes()[all …]
107 …const ArenaVector<BasicBlockId>* block_id_list_; /**< @brief the list of BasicBlocks we want to i…352 const ArenaVector<BasicBlockId>* const loop_ends_;353 ArenaVector<std::pair<uint16_t, bool>>* const loop_head_stack_;399 const ArenaVector<BasicBlockId>* const loop_ends_;400 ArenaVector<std::pair<uint16_t, bool>>* const loop_head_stack_;
41 const ArenaVector<uint8_t>* Patch(size_t code_size);60 ArenaVector<Advance> advances_;
23 const ArenaVector<uint8_t>* LazyDebugFrameOpCodeWriter::Patch(size_t code_size) { in Patch()31 ArenaVector<uint8_t> old_opcodes(this->opcodes_.get_allocator()); in Patch()
155 typedef ArenaVector<uint8_t> CodeBuffer;439 ArenaVector<RegisterInfo*> core_regs_;441 ArenaVector<RegisterInfo*> core64_regs_;443 ArenaVector<RegisterInfo*> sp_regs_; // Single precision float.445 ArenaVector<RegisterInfo*> dp_regs_; // Double precision float.447 ArenaVector<RegisterInfo*>* ref_regs_; // Points to core_regs_ or core64_regs_703 void DumpRegPool(ArenaVector<RegisterInfo*>* regs);718 RegStorage AllocTempBody(ArenaVector<RegisterInfo*>& regs, int* next_temp, bool required);729 RegStorage FindLiveReg(ArenaVector<RegisterInfo*>& regs, int s_reg);1786 ArenaVector<SwitchTable*> switch_tables_;[all …]
143 void Mir2Lir::DumpRegPool(ArenaVector<RegisterInfo*>* regs) { in DumpRegPool()337 RegStorage Mir2Lir::AllocTempBody(ArenaVector<RegisterInfo*>& regs, int* next_temp, bool required) { in AllocTempBody()460 RegStorage Mir2Lir::FindLiveReg(ArenaVector<RegisterInfo*>& regs, int s_reg) { in FindLiveReg()
832 ArenaVector<uint8_t> references_buffer(arena_->Adapter()); in CreateNativeGcMap()
2162 ArenaVector<SuccessorBlockInfo*>::const_iterator succ_bb_iter = bb->successor_blocks.cbegin(); in GenSmallPackedSwitch()
51 using ArenaVector = std::vector<T, ArenaAllocatorAdapter<T>>; variable
914 ArenaVector<LIR*> method_address_insns_;917 ArenaVector<LIR*> class_type_address_insns_;920 ArenaVector<LIR*> call_method_insns_;923 ArenaVector<LIR*> dex_cache_access_insns_;
1510 ArenaVector<RegisterInfo*>* regs = in ReserveVectorRegisters()
308 ArenaVector<LIR*> call_method_insns_;311 ArenaVector<LIR*> dex_cache_access_insns_;
408 ArenaVector<LIR*> call_method_insns_;409 ArenaVector<LIR*> dex_cache_access_insns_;