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/art/runtime/
Ddex_instruction_utils.h52 constexpr bool IsInstructionReturn(Instruction::Code opcode) { in IsInstructionReturn()
56 constexpr bool IsInstructionInvoke(Instruction::Code opcode) { in IsInstructionInvoke()
61 constexpr bool IsInstructionQuickInvoke(Instruction::Code opcode) { in IsInstructionQuickInvoke()
66 constexpr bool IsInstructionInvokeStatic(Instruction::Code opcode) { in IsInstructionInvokeStatic()
70 constexpr bool IsInstructionGoto(Instruction::Code opcode) { in IsInstructionGoto()
74 constexpr bool IsInstructionIfCc(Instruction::Code opcode) { in IsInstructionIfCc()
78 constexpr bool IsInstructionIfCcZ(Instruction::Code opcode) { in IsInstructionIfCcZ()
82 constexpr bool IsInstructionIGet(Instruction::Code code) { in IsInstructionIGet()
86 constexpr bool IsInstructionIPut(Instruction::Code code) { in IsInstructionIPut()
90 constexpr bool IsInstructionSGet(Instruction::Code code) { in IsInstructionSGet()
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Ddex_instruction.h82 enum Code { // private marker to avoid generate-operator-out.py from processing. enum
230 static const char* Name(Code opcode) { in Name()
396 Code Opcode(uint16_t inst_data) const { in Opcode()
398 return static_cast<Code>(inst_data & 0xFF); in Opcode()
402 Code Opcode() const { in Opcode()
406 void SetOpcode(Code opcode) { in SetOpcode()
437 static Format FormatOf(Code opcode) { in FormatOf()
442 static int FlagsOf(Code opcode) { in FlagsOf()
447 static int VerifyFlagsOf(Code opcode) { in VerifyFlagsOf()
578 std::ostream& operator<<(std::ostream& os, const Instruction::Code& code);
Ddex_instruction.cc93 Code opcode = static_cast<Code>(insn & 0xFF); in CanFlowThrough()
417 std::ostream& operator<<(std::ostream& os, const Instruction::Code& code) { in operator <<()
/art/compiler/dex/quick/x86/
Dquick_assemble_x86_test.cc196 Instruction::Code opcode, in TestVectorFn()
225 static_cast<Instruction::Code>(kMirOpPackedAddition), in TestAddpd()
229 static_cast<Instruction::Code>(kMirOpPackedAddition), in TestAddpd()
236 static_cast<Instruction::Code>(kMirOpPackedSubtract), in TestSubpd()
240 static_cast<Instruction::Code>(kMirOpPackedSubtract), in TestSubpd()
247 static_cast<Instruction::Code>(kMirOpPackedMultiply), in TestMulpd()
251 static_cast<Instruction::Code>(kMirOpPackedMultiply), in TestMulpd()
Dcodegen_x86.h83 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
180 void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
182 void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
184 void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
186 void GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src) OVERRIDE;
200 void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
202 void GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
204 void GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest,
208 void GenShiftOpLong(Instruction::Code opcode, RegLocation rl_dest,
218 bool GenLongImm(RegLocation rl_dest, RegLocation rl_src, Instruction::Code op);
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Dint_x86.cc1598 bool X86Mir2Lir::SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, in SmallLiteralDivRem()
1660 void X86Mir2Lir::GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, in GenArithOpLong()
1812 void X86Mir2Lir::GenMulLong(Instruction::Code, RegLocation rl_dest, RegLocation rl_src1, in GenMulLong() argument
1949 Instruction::Code op) { in GenLongRegOrMemOp()
1992 void X86Mir2Lir::GenLongArith(RegLocation rl_dest, RegLocation rl_src, Instruction::Code op) { in GenLongArith()
2050 RegLocation rl_src2, Instruction::Code op, in GenLongArith()
2328 void X86Mir2Lir::GenDivRemLong(Instruction::Code, RegLocation rl_dest, RegLocation rl_src1, in GenDivRemLong() argument
2551 RegLocation X86Mir2Lir::GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest, in GenShiftImmOpLong()
2637 void X86Mir2Lir::GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest, in GenShiftImmOpLong()
2660 void X86Mir2Lir::GenArithImmOpLong(Instruction::Code opcode, in GenArithImmOpLong()
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Dfp_x86.cc26 void X86Mir2Lir::GenArithOpFloat(Instruction::Code opcode, in GenArithOpFloat()
77 void X86Mir2Lir::GenArithOpDouble(Instruction::Code opcode, in GenArithOpDouble()
210 void X86Mir2Lir::GenConversion(Instruction::Code opcode, RegLocation rl_dest, in GenConversion()
467 void X86Mir2Lir::GenCmpFP(Instruction::Code code, RegLocation rl_dest, in GenCmpFP()
/art/runtime/quick/
Dinline_method_analyser.h162 static constexpr bool IsInstructionIGet(Instruction::Code opcode) { in IsInstructionIGet()
166 static constexpr bool IsInstructionIPut(Instruction::Code opcode) { in IsInstructionIPut()
170 static constexpr uint16_t IGetVariant(Instruction::Code opcode) { in IGetVariant()
174 static constexpr uint16_t IPutVariant(Instruction::Code opcode) { in IPutVariant()
Dinline_method_analyser.cc85 Instruction::Code opcode = instruction->Opcode(); in AnalyseMethodCode()
146 Instruction::Code return_opcode = return_instruction->Opcode(); in AnalyseReturnMethod()
170 Instruction::Code return_opcode = return_instruction->Opcode(); in AnalyseConstMethod()
202 Instruction::Code opcode = instruction->Opcode(); in AnalyseIGetMethod()
206 Instruction::Code return_opcode = return_instruction->Opcode(); in AnalyseIGetMethod()
265 Instruction::Code opcode = instruction->Opcode(); in AnalyseIPutMethod()
269 Instruction::Code return_opcode = return_instruction->Opcode(); in AnalyseIPutMethod()
/art/compiler/dex/quick/arm64/
Dcodegen_arm64.h54 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
56 bool HandleEasyDivRem(Instruction::Code dalvik_opcode, bool is_div,
58 bool HandleEasyDivRem64(Instruction::Code dalvik_opcode, bool is_div,
131 void GenShiftOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
133 void GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
139 void GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
141 void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
143 void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
145 void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
147 void GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src) OVERRIDE;
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Dfp_arm64.cc26 void Arm64Mir2Lir::GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, in GenArithOpFloat()
68 void Arm64Mir2Lir::GenArithOpDouble(Instruction::Code opcode, in GenArithOpDouble()
147 void Arm64Mir2Lir::GenConversion(Instruction::Code opcode, in GenConversion()
279 void Arm64Mir2Lir::GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, in GenCmpFP()
Dint_arm64.cc71 void Arm64Mir2Lir::GenShiftOpLong(Instruction::Code opcode, RegLocation rl_dest, in GenShiftOpLong()
416 bool Arm64Mir2Lir::SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, in SmallLiteralDivRem()
460 bool Arm64Mir2Lir::SmallLiteralDivRem64(Instruction::Code dalvik_opcode, bool is_div, in SmallLiteralDivRem64()
529 bool Arm64Mir2Lir::HandleEasyDivRem(Instruction::Code dalvik_opcode, bool is_div, in HandleEasyDivRem()
536 bool Arm64Mir2Lir::HandleEasyDivRem64(Instruction::Code dalvik_opcode, bool is_div, in HandleEasyDivRem64()
1085 void Arm64Mir2Lir::GenDivRemLong(Instruction::Code opcode, RegLocation rl_dest, in GenDivRemLong()
1134 void Arm64Mir2Lir::GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, in GenArithOpLong()
1342 void Arm64Mir2Lir::GenShiftImmOpLong(Instruction::Code opcode, in GenShiftImmOpLong()
1375 void Arm64Mir2Lir::GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest, in GenArithImmOpLong()
/art/compiler/dex/quick/arm/
Dcodegen_arm.h62 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
143 void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
145 void GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest,
151 void GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest,
153 void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
155 void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
157 void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
159 void GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src);
233 bool InexpensiveConstantInt(int32_t value, Instruction::Code opcode) OVERRIDE;
277 bool HandleEasyDivRem(Instruction::Code dalvik_opcode, bool is_div,
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Dfp_arm.cc26 void ArmMir2Lir::GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, in GenArithOpFloat()
72 void ArmMir2Lir::GenArithOpDouble(Instruction::Code opcode, in GenArithOpDouble()
145 void ArmMir2Lir::GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src) { in GenConversion()
296 void ArmMir2Lir::GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, in GenCmpFP()
/art/compiler/dex/quick/mips/
Dcodegen_mips.h73 bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, RegLocation rl_src,
142 void GenShiftOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
144 void GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
150 void GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
152 void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
154 void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
156 void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
158 void GenConversion(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src);
167 void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
279 void GenDivRemLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
Dfp_mips.cc26 void MipsMir2Lir::GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, in GenArithOpFloat()
72 void MipsMir2Lir::GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, in GenArithOpDouble()
132 void MipsMir2Lir::GenConversion(Instruction::Code opcode, RegLocation rl_dest, in GenConversion()
208 void MipsMir2Lir::GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, in GenCmpFP()
DREADME.mips51 Code expansion
53 Code expansion for the MIPS target is significantly higher than we see
Dint_mips.cc465 bool MipsMir2Lir::SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, in SmallLiteralDivRem()
532 void MipsMir2Lir::GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, in GenArithOpLong()
624 void MipsMir2Lir::GenDivRemLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, in GenDivRemLong()
828 void MipsMir2Lir::GenShiftOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, in GenShiftOpLong()
858 void MipsMir2Lir::GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest, in GenShiftImmOpLong()
896 void MipsMir2Lir::GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest, in GenArithImmOpLong()
/art/compiler/dex/
Dpost_opt_passes.cc35 Instruction::Code opcode = mir->dalvikInsn.opcode; in Worker()
37 if (opcode == static_cast<Instruction::Code> (kMirOpPhi)) { in Worker()
Ddex_to_dex_compiler.cc75 Instruction::Code new_opcode, bool is_put);
84 Instruction::Code new_opcode, bool is_range);
230 Instruction::Code new_opcode, in CompileInstanceFieldAccess()
255 Instruction::Code new_opcode, bool is_range) { in CompileInvokeVirtual()
Dmir_optimization.cc233 static constexpr ConditionCode ConditionCodeForIfCcZ(Instruction::Code opcode) { in ConditionCodeForIfCcZ()
445 static bool EvaluateBranch(Instruction::Code opcode, int32_t src1, int32_t src2) { in EvaluateBranch()
494 Instruction::Code opcode = mir->dalvikInsn.opcode; in BasicBlockOpt()
526 mir->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop); in BasicBlockOpt()
557 static_cast<Instruction::Code>(kMirOpFusedCmplFloat); in BasicBlockOpt()
561 static_cast<Instruction::Code>(kMirOpFusedCmplDouble); in BasicBlockOpt()
565 static_cast<Instruction::Code>(kMirOpFusedCmpgFloat); in BasicBlockOpt()
569 static_cast<Instruction::Code>(kMirOpFusedCmpgDouble); in BasicBlockOpt()
573 static_cast<Instruction::Code>(kMirOpFusedCmpLong); in BasicBlockOpt()
577 mir->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop); in BasicBlockOpt()
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Dmir_graph.h242 static uint32_t GetStartUseIndex(Instruction::Code opcode);
262 Instruction::Code opcode;
273 static bool IsPseudoMirOp(Instruction::Code opcode) { in IsPseudoMirOp()
472 Instruction::Code last_opcode = last_mir_insn->dalvikInsn.opcode; in BranchesToSuccessorOnlyIfNotZero()
1224 static uint64_t GetDataFlowAttributes(Instruction::Code opcode);
/art/compiler/dex/quick/
Dmir_to_lir.h792 virtual bool HandleEasyDivRem(Instruction::Code dalvik_opcode, bool is_div,
813 void GenCompareAndBranch(Instruction::Code opcode, RegLocation rl_src1, RegLocation rl_src2,
815 void GenCompareZeroAndBranch(Instruction::Code opcode, RegLocation rl_src, LIR* taken);
818 void GenIntNarrowing(Instruction::Code opcode, RegLocation rl_dest,
843 virtual void GenShiftOpLong(Instruction::Code opcode, RegLocation rl_dest,
845 void GenArithOpIntLit(Instruction::Code opcode, RegLocation rl_dest,
847 virtual void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest,
856 virtual void GenArithOpInt(Instruction::Code opcode, RegLocation rl_dest,
1140 virtual bool SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div,
1277 virtual void GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest,
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Ddex_file_method_inliner.cc688 invoke->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop); in GenInline()
691 invoke->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNullCheck); in GenInline()
697 move_result->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop); in GenInline()
870 Instruction::Code opcode = Instruction::MOVE_FROM16; in GenInlineReturnArg()
908 Instruction::Code opcode = static_cast<Instruction::Code>(Instruction::IGET + data.op_variant); in GenInlineIGet()
930 invoke->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop); in GenInlineIGet()
957 Instruction::Code opcode = static_cast<Instruction::Code>(Instruction::IPUT + data.op_variant); in GenInlineIPut()
989 invoke->dalvikInsn.opcode = static_cast<Instruction::Code>(kMirOpNop); in GenInlineIPut()
/art/test/115-native-bridge/
Dexpected.txt1 Code cache exists: './code_cache'.

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