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Searched refs:DF_B_WIDE (Results 1 – 5 of 5) sorted by relevance

/art/compiler/dex/
Dmir_dataflow.cc45 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
48 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
51 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_IS_MOVE,
174 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_B | DF_FP_C | DF_CORE_A,
177 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_FP_B | DF_FP_C | DF_CORE_A,
180 DF_DA | DF_UB | DF_B_WIDE | DF_UC | DF_C_WIDE | DF_CORE_A | DF_CORE_B | DF_CORE_C,
408 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
411 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
417 DF_DA | DF_A_WIDE | DF_UB | DF_B_WIDE | DF_FP_A | DF_FP_B,
429 DF_DA | DF_UB | DF_B_WIDE | DF_CORE_A | DF_CORE_B,
[all …]
Dmir_graph.h92 #define DF_B_WIDE (UINT64_C(1) << kBWide) macro
Dgvn_dead_code_elimination_test.cc313 mir->dalvikInsn.vB = SRegToVReg(mir->ssa_rep->uses, &use, (df_attrs & DF_B_WIDE) != 0); in DoPrepareMIRs()
/art/compiler/dex/quick/x86/
Dutility_x86.cc1042 if (attrs & DF_B_WIDE) { in AnalyzeFPInstruction()
/art/compiler/dex/quick/
Dmir_to_lir.cc502 if (attrs & DF_B_WIDE) { in CompileDalvikInstruction()