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Searched refs:GetFpuRegisterAt (Results 1 – 8 of 8) sorted by relevance

/art/compiler/optimizing/
Dcode_generator_arm.cc652 return Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(float_index_++)); in GetNextLocation()
666 calling_convention.GetFpuRegisterAt(index), in GetNextLocation()
667 calling_convention.GetFpuRegisterAt(index + 1)); in GetNextLocation()
1552 calling_convention.GetFpuRegisterAt(0))); in VisitTypeConversion()
1561 calling_convention.GetFpuRegisterAt(0), in VisitTypeConversion()
1562 calling_convention.GetFpuRegisterAt(1))); in VisitTypeConversion()
2331 locations->SetInAt(0, Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(0))); in VisitRem()
2332 locations->SetInAt(1, Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(1))); in VisitRem()
2340 calling_convention.GetFpuRegisterAt(0), calling_convention.GetFpuRegisterAt(1))); in VisitRem()
2342 calling_convention.GetFpuRegisterAt(2), calling_convention.GetFpuRegisterAt(3))); in VisitRem()
Dcode_generator.h490 F GetFpuRegisterAt(size_t index) const { in GetFpuRegisterAt() function
Dcode_generator_mips64.cc79 calling_convention.GetFpuRegisterAt(float_index_++)); in GetNextLocation()
1667 locations->SetInAt(0, Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(0))); in VisitCompare()
1668 locations->SetInAt(1, Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(1))); in VisitCompare()
2871 locations->SetInAt(0, Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(0))); in VisitRem()
2872 locations->SetInAt(1, Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(1))); in VisitRem()
3079 locations->SetInAt(0, Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(0))); in VisitTypeConversion()
Dintrinsics_x86_64.cc636 locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetFpuRegisterAt(0))); in CreateSSE41FPToFPLocations()
698 locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetFpuRegisterAt(0))); in CreateSSE41FPToIntLocations()
Dintrinsics_x86.cc759 locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetFpuRegisterAt(0))); in CreateSSE41FPToFPLocations()
822 locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetFpuRegisterAt(0))); in VisitMathRoundFloat()
Dcode_generator_arm64.cc386 next_location = LocationFrom(calling_convention.GetFpuRegisterAt(float_index_++)); in GetNextLocation()
2464 locations->SetInAt(0, LocationFrom(calling_convention.GetFpuRegisterAt(0))); in VisitRem()
2465 locations->SetInAt(1, LocationFrom(calling_convention.GetFpuRegisterAt(1))); in VisitRem()
Dcode_generator_x86.cc592 return Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(index)); in GetNextLocation()
602 return Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(index)); in GetNextLocation()
1521 XmmRegister parameter = calling_convention.GetFpuRegisterAt(0); in VisitTypeConversion()
Dcode_generator_x86_64.cc1280 return Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(index)); in GetNextLocation()
1290 return Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(index)); in GetNextLocation()