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Searched refs:GetHighReg (Results 1 – 11 of 11) sorted by relevance

/art/compiler/dex/quick/mips/
Dint_mips.cc68 NewLIR3(kMipsSlt, t0.GetReg(), rl_src1.reg.GetHighReg(), rl_src2.reg.GetHighReg()); in GenCmpLong()
69 NewLIR3(kMipsSlt, t1.GetReg(), rl_src2.reg.GetHighReg(), rl_src1.reg.GetHighReg()); in GenCmpLong()
241 NewLIR2(kMipsMtc1, r_src.GetHighReg(), r_dest.GetHighReg()); in OpRegCopyWide()
245 NewLIR2(kMipsMthc1, r_src.GetHighReg(), r_dest.GetReg()); in OpRegCopyWide()
253 NewLIR2(kMipsMfc1, r_dest.GetHighReg(), r_src.GetHighReg()); in OpRegCopyWide()
257 NewLIR2(kMipsMfhc1, r_dest.GetHighReg(), r_src.GetReg()); in OpRegCopyWide()
262 if (r_src.GetHighReg() != r_dest.GetLowReg()) { in OpRegCopyWide()
265 } else if (r_src.GetLowReg() != r_dest.GetHighReg()) { in OpRegCopyWide()
504 NewLIR3(kMipsSltu, rl_result.reg.GetHighReg(), rl_result.reg.GetLowReg(), in GenAddLong()
Dutility_mips.cc785 load2 = NewLIR3(opcode, r_dest.GetHighReg(), displacement + HIWORD_OFFSET, r_base.GetReg()); in LoadBaseDispBody()
811 load2 = NewLIR3(opcode, r_dest.GetHighReg(), HIWORD_OFFSET, r_tmp.GetReg()); in LoadBaseDispBody()
956 store2 = NewLIR3(opcode, r_src.GetHighReg(), displacement + HIWORD_OFFSET, r_base.GetReg()); in StoreBaseDispBody()
977 store2 = NewLIR3(opcode, r_src.GetHighReg(), HIWORD_OFFSET, r_scratch.GetReg()); in StoreBaseDispBody()
/art/compiler/dex/quick/x86/
Dint_x86.cc167 NewLIR2(kX86MovdxrRR, r_tmp.GetReg(), r_src.GetHighReg()); in OpRegCopyWide()
182 NewLIR2(kX86MovdrxRR, r_dest.GetHighReg(), temp_reg.GetReg()); in OpRegCopyWide()
191 if (r_src.GetHighReg() == r_dest.GetLowReg() && in OpRegCopyWide()
192 r_src.GetLowReg() == r_dest.GetHighReg()) { in OpRegCopyWide()
199 } else if (r_src.GetHighReg() == r_dest.GetLowReg()) { in OpRegCopyWide()
918 (rl_src1.reg.GetLowReg() != rl_result.reg.GetHighReg()) && in GenInlinedMinMax()
925 (rl_src1.reg.GetHighReg() != rl_result.reg.GetLowReg()) && in GenInlinedMinMax()
926 (rl_src1.reg.GetHighReg() != rl_result.reg.GetHighReg())) { in GenInlinedMinMax()
1348 if (rl_i.reg.GetLowReg() != rl_result.reg.GetHighReg()) { in GenInlinedReverseBits()
1351 if (rl_i.reg.GetHighReg() != rl_result.reg.GetLowReg() && in GenInlinedReverseBits()
[all …]
Dutility_x86.cc706 load = NewLIR3(opcode, r_dest.GetHighReg(), r_base.GetReg(), in LoadBaseIndexedDisp()
711 load2 = NewLIR3(opcode, r_dest.GetHighReg(), r_base.GetReg(), in LoadBaseIndexedDisp()
741 load = NewLIR5(opcode, r_dest.GetHighReg(), r_base.GetReg(), r_index.GetReg(), scale, in LoadBaseIndexedDisp()
752 load2 = NewLIR5(opcode, r_dest.GetHighReg(), r_base.GetReg(), r_index.GetReg(), scale, in LoadBaseIndexedDisp()
759 load2 = NewLIR5(opcode, r_dest.GetHighReg(), r_base.GetReg(), r_index.GetReg(), scale, in LoadBaseIndexedDisp()
878 store2 = NewLIR3(opcode, r_base.GetReg(), displacement + HIWORD_OFFSET, r_src.GetHighReg()); in StoreBaseIndexedDisp()
898 displacement + HIWORD_OFFSET, r_src.GetHighReg()); in StoreBaseIndexedDisp()
Dtarget_x86.cc524 DCHECK_EQ(res.reg.GetHighReg(), rs_rDX.GetReg()); in GetReturnWideAlt()
934 << ", high: " << static_cast<int>(loc.reg.GetHighReg()) in DumpRegLocation()
2063 NewLIR2(kX86MovdrxRR, temp_loc.reg.GetHighReg(), vector_src.GetReg()); in GenAddReduceVector()
2198 NewLIR2(kX86MovdrxRR, rl_result.reg.GetHighReg(), vector_src.GetReg()); in GenReduceVector()
2243 NewLIR2(kX86MovdxrRR, r_tmp.GetReg(), rs_src.GetHighReg()); in LoadVectorRegister()
/art/compiler/dex/quick/arm/
Dint_arm.cc467 NewLIR3(kThumb2Fmdrr, r_dest.GetReg(), r_src.GetLowReg(), r_src.GetHighReg()); in OpRegCopyWide()
471 NewLIR3(kThumb2Fmrrd, r_dest.GetLowReg(), r_dest.GetHighReg(), r_src.GetReg()); in OpRegCopyWide()
474 if (r_src.GetHighReg() != r_dest.GetLowReg()) { in OpRegCopyWide()
477 } else if (r_src.GetLowReg() != r_dest.GetHighReg()) { in OpRegCopyWide()
954 … eq */, r_tmp.GetReg(), rl_new_value.reg.GetLowReg(), rl_new_value.reg.GetHighReg(), r_ptr.GetReg(… in GenInlinedCas()
1160 NewLIR4(kThumb2OrrRRRs, t_reg.GetReg(), reg.GetLowReg(), reg.GetHighReg(), 0); in GenDivZeroCheckWide()
1230 if (rl_result.reg.GetLowReg() == rl_src.reg.GetHighReg()) { in GenNegLong()
1309 NewLIR3(kThumb2MulRRR, tmp1.GetReg(), rl_src1.reg.GetLowReg(), rl_src1.reg.GetHighReg()); in GenMulLong()
1314 NewLIR3(kThumb2MulRRR, tmp1.GetReg(), rl_src2.reg.GetLowReg(), rl_src1.reg.GetHighReg()); in GenMulLong()
1318 DCHECK_NE(rl_src1.reg.GetHighReg(), rl_src2.reg.GetHighReg()); in GenMulLong()
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Dutility_arm.cc737 r_dest.GetLowReg(), r_dest.GetHighReg(), rs_r15pc.GetReg(), 0, 0, data_target); in LoadConstantWide()
896 lir = NewLIR4(opcode, r_src_dest.GetLowReg(), r_src_dest.GetHighReg(), r_ptr.GetReg(), in LoadStoreUsingInsnWithOffsetImm8Shl2()
1046 load = NewLIR3(kThumb2Ldrexd, r_dest.GetLowReg(), r_dest.GetHighReg(), r_ptr.GetReg()); in LoadBaseDisp()
1205 NewLIR4(kThumb2Strexd, r_temp.GetReg(), r_src.GetLowReg(), r_src.GetHighReg(), r_ptr.GetReg()); in StoreBaseDisp()
/art/compiler/dex/
Dreg_storage.h240 int GetHighReg() const { in GetHighReg() function
248 return RegStorage(kValid | GetHighReg()); in GetHigh()
/art/compiler/dex/quick/
Dgen_invoke.cc1237 rl_result.reg.GetLowReg() == rl_src.reg.GetHighReg())) { in GenInlinedAbsLong()
1240 rl_result.reg.GetLowReg() != rl_src.reg.GetHighReg() && in GenInlinedAbsLong()
1241 rl_result.reg.GetHighReg() != rl_src.reg.GetLowReg() && in GenInlinedAbsLong()
1242 rl_result.reg.GetHighReg() != rl_src.reg.GetHighReg()) { in GenInlinedAbsLong()
Dgen_common.cc1463 …(rl_result.reg.GetLowReg() == rl_src1.reg.GetHighReg()) || (rl_result.reg.GetLowReg() == rl_src2.r… in GenLong3Addr()
1970 if (rl_result.reg.GetLowReg() == rl_src2.reg.GetHighReg()) { in GenArithOpLong()
Dralloc_util.cc552 int free_high = rl_free.reg.GetHighReg(); in FreeRegLocTemps()
554 int keep_high = rl_keep.reg.GetHighReg(); in FreeRegLocTemps()