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Searched refs:IS_LOAD (Results 1 – 10 of 10) sorted by relevance

/art/compiler/dex/quick/x86/
Dassemble_x86.cc47 { kX86 ## opname ## 8RM, kRegMem, IS_LOAD | IS_TERTIARY_OP | reg_def | REG_USE01 | SETS_CCODES …
48 { kX86 ## opname ## 8RA, kRegArray, IS_LOAD | IS_QUIN_OP | reg_def | REG_USE012 | SETS_CCODES …
49 { kX86 ## opname ## 8RT, kRegThread, IS_LOAD | IS_BINARY_OP | reg_def | REG_USE0 | SETS_CCODES …
59 { kX86 ## opname ## 16RM, kRegMem, IS_LOAD | IS_TERTIARY_OP | reg_def | REG_USE01 | SETS_CCODE…
60 { kX86 ## opname ## 16RA, kRegArray, IS_LOAD | IS_QUIN_OP | reg_def | REG_USE012 | SETS_CCODE…
61 { kX86 ## opname ## 16RT, kRegThread, IS_LOAD | IS_BINARY_OP | reg_def | REG_USE0 | SETS_CCODE…
75 { kX86 ## opname ## 32RM, kRegMem, IS_LOAD | IS_TERTIARY_OP | reg_def | REG_USE01 | SETS_CCODE…
76 { kX86 ## opname ## 32RA, kRegArray, IS_LOAD | IS_QUIN_OP | reg_def | REG_USE012 | SETS_CCODE…
77 { kX86 ## opname ## 32RT, kRegThread, IS_LOAD | IS_BINARY_OP | reg_def | REG_USE0 | SETS_CCODE…
91 { kX86 ## opname ## 64RM, kRegMem, IS_LOAD | IS_TERTIARY_OP | reg_def | REG_USE01 | SETS_CCODE…
[all …]
/art/compiler/dex/quick/
Dlocal_optimizations.cc41 (flags & (IS_QUAD_OP|IS_LOAD)) == (IS_QUAD_OP|IS_LOAD) || \
171 ((target_flags & (IS_LOAD | IS_STORE)) == (IS_LOAD | IS_STORE)) || in ApplyLoadStoreElimination()
172 !(target_flags & (IS_LOAD | IS_STORE))) { in ApplyLoadStoreElimination()
177 bool is_this_lir_load = target_flags & IS_LOAD; in ApplyLoadStoreElimination()
248 DCHECK((check_flags & IS_LOAD) || (check_flags & IS_STORE)); in ApplyLoadStoreElimination()
249 bool is_check_lir_load = check_flags & IS_LOAD; in ApplyLoadStoreElimination()
253 DCHECK(check_flags & IS_LOAD); in ApplyLoadStoreElimination()
340 if (!(target_flags & IS_LOAD) || in ApplyLoadHoisting()
343 ((target_flags & (IS_STORE | IS_LOAD)) == (IS_STORE | IS_LOAD))) { in ApplyLoadHoisting()
445 (GetTargetInstFlags(dep_lir->opcode) & IS_LOAD)) { in ApplyLoadHoisting()
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Dmir_to_lir-inl.h191 if (flags & (IS_LOAD | IS_STORE)) { in SetupResourceMasks()
193 if (flags & IS_LOAD) { in SetupResourceMasks()
Dmir_to_lir.h49 #define IS_LOAD (1ULL << kMemLoad) macro
98 #define IS_LOADX (IS_LOAD | IS_VOLATILE)
99 #define IS_LOAD_OFF (IS_LOAD | SCALED_OFFSET_X0)
100 #define IS_LOAD_OFF2 (IS_LOAD | SCALED_OFFSET_X2)
101 #define IS_LOAD_OFF4 (IS_LOAD | SCALED_OFFSET_X4)
Dcodegen_util.cc142 DCHECK(GetTargetInstFlags(lir->opcode) & (IS_LOAD | IS_STORE)); in SetMemRefType()
/art/compiler/dex/quick/mips/
Dassemble_mips.cc227 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE2 | IS_LOAD,
231 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE2 | IS_LOAD,
267 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE2 | IS_LOAD,
271 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE2 | IS_LOAD,
275 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE2 | IS_LOAD,
279 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE2 | IS_LOAD,
283 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE2 | IS_LOAD,
521 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE2 | IS_LOAD,
525 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE2 | IS_LOAD,
/art/compiler/dex/quick/arm64/
Dassemble_arm64.cc359 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12 | IS_LOAD,
367 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12 | IS_LOAD,
388 IS_BINARY_OP | REG_DEF0 | REG_USE_PC | IS_LOAD | NEEDS_FIXUP,
393 IS_BINARY_OP | REG_DEF0 | REG_USE_PC | IS_LOAD | NEEDS_FIXUP,
405 kFmtBitBlt, 12, 12, IS_QUAD_OP | REG_DEF0_USE12 | IS_LOAD,
409 kFmtBitBlt, 12, 12, IS_QUAD_OP | REG_DEF0_USE12 | IS_LOAD,
413 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF01 | REG_USE1 | IS_LOAD,
425 kFmtBitBlt, 21, 15, IS_QUAD_OP | REG_USE2 | REG_DEF012 | IS_LOAD,
429 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1 | IS_LOAD,
433 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1 | IS_LOAD,
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Dutility_arm64.cc104 DCHECK((check_flags & IS_LOAD) || (check_flags & IS_STORE)); in GetInstructionOffset()
/art/compiler/dex/quick/arm/
Dassemble_arm.cc219 IS_BINARY_OP | REG_DEF0_USE0 | REG_DEF_LIST1 | IS_LOAD,
227 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12 | IS_LOAD,
243 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12 | IS_LOAD,
251 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12 | IS_LOAD,
255 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12 | IS_LOAD,
259 kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE12 | IS_LOAD,
327 | IS_LOAD, "pop", "<!0R>", 2, kFixupNone),
568 IS_BINARY_OP | REG_DEF0_USE0 | REG_DEF_LIST1 | IS_LOAD,
677 | IS_LOAD, "pop", "<!0R>", 4, kFixupNone),
962 | IS_LOAD, "vpop", "<!0P>", 4, kFixupNone),
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Dutility_arm.cc1259 DCHECK((check_flags & IS_LOAD) || (check_flags & IS_STORE)); in GetInstructionOffset()