| /art/compiler/utils/arm/ |
| D | constants_arm.h | 151 LSL = 0, // Logical shift left enumerator
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| D | assembler_arm.h | 187 am_(am), is_immed_offset_(true), shift_(LSL) { in rn_()
191 am_(am), is_immed_offset_(false), shift_(LSL) { in rn_()
204 am_(Offset), is_immed_offset_(false), shift_(LSL) { in Address()
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| D | assembler_thumb2.cc | 917 case LSL: thumb_opcode = 0U /* 0b00 */; break; in Emit16BitDataProcessing()
1207 case LSL: opcode = 0U /* 0b00 */; break; in EmitShift()
1228 case LSL: opcode = 0U /* 0b00 */; break; in EmitShift()
1251 case LSL: opcode = 0U /* 0b00 */; break; in EmitShift()
1268 case LSL: opcode = 2U /* 0b0010 */; break; in EmitShift()
2324 EmitShift(rd, rm, LSL, shift_imm, setcc); in Lsl()
2363 EmitShift(rd, rm, LSL, rn, setcc); in Lsl()
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| D | assembler_arm32_test.cc | 165 arm::Shift::LSL, arm::Shift::LSR, arm::Shift::ASR, arm::Shift::ROR, arm::Shift::RRX in SetUpHelpers()
200 static constexpr arm::Shift kShifts[] = { arm::Shift::LSL, arm::Shift::LSR, arm::Shift::ASR, in CreateRegisterShifts()
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| D | assembler_arm32.cc | 1157 movs(rd, ShifterOperand(rm, LSL, shift_imm), cond); in Lsl()
1159 mov(rd, ShifterOperand(rm, LSL, shift_imm), cond); in Lsl()
1210 movs(rd, ShifterOperand(rm, LSL, rn), cond); in Lsl()
1212 mov(rd, ShifterOperand(rm, LSL, rn), cond); in Lsl()
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| D | assembler_arm.cc | 223 CHECK_EQ(shift_, LSL); in encodingThumb()
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| /art/compiler/utils/ |
| D | assembler_thumb_test.cc | 340 __ mov(R3, ShifterOperand(R4, LSL, 4)); in TEST()
347 __ mov(R8, ShifterOperand(R4, LSL, 4)); in TEST()
1254 __ ldr(R0, Address(R1, R2, LSL, 1)); in TEST()
1255 __ str(R0, Address(R1, R2, LSL, 1)); in TEST()
1257 __ ldr(R0, Address(R1, R2, LSL, 3)); in TEST()
1258 __ str(R0, Address(R1, R2, LSL, 3)); in TEST()
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| /art/compiler/optimizing/ |
| D | code_generator_arm.cc | 3215 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_2)); in VisitArrayGet()
3229 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_2)); in VisitArrayGet()
3245 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_4)); in VisitArrayGet()
3259 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_8)); in VisitArrayGet()
3273 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_4)); in VisitArrayGet()
3287 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_8)); in VisitArrayGet()
3365 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_2)); in VisitArraySet()
3382 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_4)); in VisitArraySet()
3410 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_8)); in VisitArraySet()
3424 __ add(IP, obj, ShifterOperand(index.AsRegister<Register>(), LSL, TIMES_4)); in VisitArraySet()
[all …]
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| D | intrinsics_arm.cc | 818 __ ldrh(out, Address(array_temp, idx, LSL, 1)); // out := array_temp[idx]. in VisitStringCharAt()
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| D | code_generator_arm64.cc | 1346 __ Add(temp, obj, Operand(index_reg, LSL, Primitive::ComponentSizeShift(type))); in VisitArrayGet()
1416 __ Add(temp, obj, Operand(index_reg, LSL, Primitive::ComponentSizeShift(value_type))); in VisitArraySet()
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