Searched refs:StoreOperandType (Results 1 – 14 of 14) sorted by relevance
| /art/compiler/utils/arm/ |
| D | assembler_thumb2_test.cc | 251 arm::StoreOperandType type = arm::kStoreWord; in TEST_F()
267 arm::StoreOperandType type = arm::kStoreWord; in TEST_F()
295 arm::StoreOperandType type = arm::kStoreWordPair; in TEST_F()
319 arm::StoreOperandType type = arm::kStoreWordPair; in TEST_F()
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| D | assembler_arm.h | 144 enum StoreOperandType { enum
208 static bool CanHoldStoreOffsetArm(StoreOperandType type, int offset);
211 static bool CanHoldStoreOffsetThumb(StoreOperandType type, int offset);
590 virtual void StoreToOffset(StoreOperandType type,
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| D | assembler_arm.cc | 312 bool Address::CanHoldStoreOffsetArm(StoreOperandType type, int offset) { in CanHoldStoreOffsetArm()
349 bool Address::CanHoldStoreOffsetThumb(StoreOperandType type, int offset) { in CanHoldStoreOffsetThumb()
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| D | assembler_arm32.h | 255 void StoreToOffset(StoreOperandType type,
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| D | assembler_thumb2.h | 294 void StoreToOffset(StoreOperandType type,
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| D | assembler_arm32.cc | 1512 void Arm32Assembler::StoreToOffset(StoreOperandType type, in StoreToOffset()
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| D | assembler_thumb2.cc | 2618 void Thumb2Assembler::StoreToOffset(StoreOperandType type, in StoreToOffset()
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| /art/compiler/utils/arm64/ |
| D | assembler_arm64.h | 55 enum StoreOperandType { enum
216 void StoreWToOffset(StoreOperandType type, WRegister source,
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| D | assembler_arm64.cc | 95 void Arm64Assembler::StoreWToOffset(StoreOperandType type, WRegister source, in StoreWToOffset()
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| /art/compiler/utils/mips64/ |
| D | assembler_mips64.h | 42 enum StoreOperandType { enum
220 void StoreToOffset(StoreOperandType type, GpuRegister reg, GpuRegister base, int32_t offset);
221 void StoreFpuToOffset(StoreOperandType type, FpuRegister reg, GpuRegister base, int32_t offset);
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| D | assembler_mips64.cc | 1017 void Mips64Assembler::StoreToOffset(StoreOperandType type, GpuRegister reg, GpuRegister base, in StoreToOffset()
1044 void Mips64Assembler::StoreFpuToOffset(StoreOperandType type, FpuRegister reg, GpuRegister base, in StoreFpuToOffset()
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| /art/compiler/utils/mips/ |
| D | assembler_mips.h | 43 enum StoreOperandType { enum
143 void StoreToOffset(StoreOperandType type, Register reg, Register base, int32_t offset);
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| D | assembler_mips.cc | 512 void MipsAssembler::StoreToOffset(StoreOperandType type, Register reg, Register base, in StoreToOffset()
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| /art/compiler/optimizing/ |
| D | code_generator_mips64.cc | 452 StoreOperandType store_type = double_slot ? kStoreDoubleword : kStoreWord; in Exchange()
682 StoreOperandType store_type = destination.IsStackSlot() ? kStoreWord : kStoreDoubleword; in MoveLocation()
697 StoreOperandType store_type = destination.IsStackSlot() ? kStoreWord : kStoreDoubleword; in MoveLocation()
756 StoreOperandType store_type = mem_loc.IsStackSlot() ? kStoreWord : kStoreDoubleword; in SwapLocations()
2177 StoreOperandType store_type = kStoreByte; in HandleFieldSet()
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