| /art/compiler/dex/quick/mips/ |
| D | int_mips.cc | 149 LIR* MipsMir2Lir::OpCmpImmBranch(ConditionCode cond, RegStorage reg, int check_value, LIR* target) { in OpCmpImmBranch() argument
151 if (check_value != 0) { in OpCmpImmBranch()
154 LoadConstant(t_reg, check_value); in OpCmpImmBranch()
171 LoadConstant(t_reg, check_value); in OpCmpImmBranch()
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| D | codegen_mips.h | 197 LIR* OpCmpImmBranch(ConditionCode cond, RegStorage reg, int check_value, LIR* target);
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| /art/compiler/dex/quick/arm64/ |
| D | codegen_arm64.h | 86 int offset, int check_value, LIR* target, LIR** compare) OVERRIDE;
203 LIR* OpCmpImmBranch(ConditionCode cond, RegStorage reg, int check_value, LIR* target) OVERRIDE;
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| D | int_arm64.cc | 268 LIR* Arm64Mir2Lir::OpCmpImmBranch(ConditionCode cond, RegStorage reg, int check_value, in OpCmpImmBranch() argument
272 if (check_value == 0) { in OpCmpImmBranch()
292 OpRegImm(kOpCmp, reg, check_value); in OpCmpImmBranch()
301 RegStorage base_reg, int offset, int check_value, in OpCmpMemImmBranch() argument
310 LIR* branch = OpCmpImmBranch(cond, temp_reg, check_value, target); in OpCmpMemImmBranch()
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| /art/compiler/dex/quick/x86/ |
| D | utility_x86.cc | 946 int offset, int check_value, LIR* target, LIR** compare) { in OpCmpMemImmBranch() argument
948 LIR* inst = NewLIR3(IS_SIMM8(check_value) ? kX86Cmp32MI8 : kX86Cmp32MI, base_reg.GetReg(), in OpCmpMemImmBranch()
949 offset, check_value); in OpCmpMemImmBranch()
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| D | codegen_x86.h | 296 LIR* OpCmpImmBranch(ConditionCode cond, RegStorage reg, int check_value, LIR* target) OVERRIDE;
815 int offset, int check_value, LIR* target, LIR** compare);
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| D | int_x86.cc | 109 int check_value, LIR* target) { in OpCmpImmBranch() argument
110 if ((check_value == 0) && (cond == kCondEq || cond == kCondNe)) { in OpCmpImmBranch()
115 NewLIR2(IS_SIMM8(check_value) ? kX86Cmp64RI8 : kX86Cmp64RI, reg.GetReg(), check_value); in OpCmpImmBranch()
117 NewLIR2(IS_SIMM8(check_value) ? kX86Cmp32RI8 : kX86Cmp32RI, reg.GetReg(), check_value); in OpCmpImmBranch()
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| /art/compiler/dex/quick/arm/ |
| D | codegen_arm.h | 199 LIR* OpCmpImmBranch(ConditionCode cond, RegStorage reg, int check_value, LIR* target);
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| D | int_arm.cc | 380 LIR* ArmMir2Lir::OpCmpImmBranch(ConditionCode cond, RegStorage reg, int check_value, LIR* target) { in OpCmpImmBranch() argument
394 if (!skip && reg.Low8() && (check_value == 0)) { in OpCmpImmBranch()
406 OpRegImm(kOpCmp, reg, check_value); in OpCmpImmBranch()
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| /art/compiler/dex/quick/ |
| D | codegen_util.cc | 1258 int offset, int check_value, LIR* target, LIR** compare) { in OpCmpMemImmBranch() argument
1264 LIR* branch = OpCmpImmBranch(cond, temp_reg, check_value, target); in OpCmpMemImmBranch()
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| D | mir_to_lir.h | 1137 int offset, int check_value, LIR* target, LIR** compare);
1407 virtual LIR* OpCmpImmBranch(ConditionCode cond, RegStorage reg, int check_value,
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