Searched refs:d0 (Results 1 – 9 of 9) sorted by relevance
/art/test/705-register-conflict/src/ |
D | Main.java | 28 double d0 = 0, d1 = 0, d2 = 0, d3 = 0, d4 = 0, d5 = 0, d6 = 0, d7 = 0; in $opt$registerConflictTest() local 33 d0 = a; in $opt$registerConflictTest() 34 d1 = d0 + 1; in $opt$registerConflictTest() 68 return d0 + d1 + d2 + d3 + d4 + d5 + d6 + d7 in $opt$registerConflictTest()
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/art/runtime/arch/arm64/ |
D | jni_entrypoints_arm64.S | 32 stp d0, d1, [sp, #-16]! 46 ldp d0, d1, [sp], #16
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D | quick_entrypoints_arm64.S | 210 stp d0, d1, [sp, #8] 300 ldp d0, d1, [sp, #8] 628 str d0, [x4] 804 LOADREG x15 8 d0 .LfillRegisters 929 LOADREG x15 8 d0 .LfillRegisters2 953 ldp d0, d1, [x1], #16 1458 fmov d0, x0 // Store result in d0 in case it was float or double 1592 ldp d0, d1, [sp, #64] 1607 fmov x2, d0 // d0 will contain floating point result, but needs to go into x2 1624 fmov d0, x0 [all …]
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/art/runtime/arch/arm/ |
D | quick_entrypoints_arm.S | 437 vstrne d0, [r9] @ store s0-s1/d0 into result pointer 996 vmov d0, r0, r1 1021 vmov d0, r0, r1 @ store into fpr, for when it's a fpr return... 1055 vpush {d0} @ save fp return value 1060 vstr d0, [sp] @ d0 -> [sp] for fpr_res 1445 vmov r0, r1, d0 1448 vmov d0, r0, r1 1462 vmov r0, r1, d0 1473 vmov r0, r1, d0
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/art/compiler/utils/ |
D | assembler_thumb_test_expected.cc.inc | 436 " 24: ee31 0b02 vadd.f64 d0, d1, d2\n", 437 " 28: ee31 0b42 vsub.f64 d0, d1, d2\n", 438 " 2c: ee21 0b02 vmul.f64 d0, d1, d2\n", 439 " 30: ee01 0b02 vmla.f64 d0, d1, d2\n", 440 " 34: ee01 0b42 vmls.f64 d0, d1, d2\n", 441 " 38: ee81 0b02 vdiv.f64 d0, d1, d2\n", 442 " 3c: eeb0 0bc1 vabs.f64 d0, d1\n", 443 " 40: eeb1 0b41 vneg.f64 d0, d1\n", 444 " 44: eeb1 0bc1 vsqrt.f64 d0, d1\n", 462 " 4: eeb4 0b41 vcmp.f64 d0, d1\n", [all …]
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/art/compiler/optimizing/ |
D | code_generator_arm64.h | 43 vixl::d0, vixl::d1, vixl::d2, vixl::d3, vixl::d4, vixl::d5, vixl::d6, vixl::d7 85 { vixl::d0, vixl::d1, vixl::d2, vixl::d3, vixl::d4, vixl::d5, vixl::d6, vixl::d7 };
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D | code_generator_arm64.cc | 92 return LocationFrom(d0); in ARM64ReturnLocation()
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/art/compiler/utils/arm64/ |
D | managed_register_arm64_test.cc | 671 EXPECT_TRUE(vixl::d0.Is(Arm64Assembler::reg_d(D0))); in TEST()
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/art/test/083-compiler-regressions/src/ |
D | Main.java | 5339 double d0 = 0; in largeFrameFloat() local 7339 d1 = d0; in largeFrameFloat()
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