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Searched refs:dd (Results 1 – 10 of 10) sorted by relevance

/art/test/003-omnibus-opcodes/src/
DFloatMath.java303 static void jlmTests(float ff, double dd) { in jlmTests() argument
311 Main.assertTrue(approxEqual(Math.abs(dd), dd, 0.001)); in jlmTests() local
312 Main.assertTrue(approxEqual(Math.abs(-dd), dd, 0.001)); in jlmTests()
313 Main.assertTrue(approxEqual(Math.min(dd, -5.0), -5.0, 0.001)); in jlmTests()
314 Main.assertTrue(approxEqual(Math.max(dd, -5.0), dd, 0.001)); in jlmTests() local
316 double sq = Math.sqrt(dd); in jlmTests()
317 Main.assertTrue(approxEqual(sq*sq, dd, 0.001)); in jlmTests()
/art/compiler/utils/arm/
Dassembler_arm32.h147 void vmovd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
151 bool vmovd(DRegister dd, double d_imm, Condition cond = AL) OVERRIDE;
155 void vldrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE;
156 void vstrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE;
159 void vaddd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
161 void vsubd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
163 void vmuld(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
165 void vmlad(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
167 void vmlsd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
169 void vdivd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
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Dassembler_arm32.cc353 void Arm32Assembler::vmovd(DRegister dd, DRegister dm, Condition cond) { in vmovd() argument
354 EmitVFPddd(cond, B23 | B21 | B20 | B6, dd, D0, dm); in vmovd()
373 bool Arm32Assembler::vmovd(DRegister dd, double d_imm, Condition cond) { in vmovd() argument
381 dd, D0, D0); in vmovd()
394 void Arm32Assembler::vaddd(DRegister dd, DRegister dn, DRegister dm, in vaddd() argument
396 EmitVFPddd(cond, B21 | B20, dd, dn, dm); in vaddd()
406 void Arm32Assembler::vsubd(DRegister dd, DRegister dn, DRegister dm, in vsubd() argument
408 EmitVFPddd(cond, B21 | B20 | B6, dd, dn, dm); in vsubd()
418 void Arm32Assembler::vmuld(DRegister dd, DRegister dn, DRegister dm, in vmuld() argument
420 EmitVFPddd(cond, B21, dd, dn, dm); in vmuld()
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Dassembler_thumb2.h184 void vmovd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE;
188 bool vmovd(DRegister dd, double d_imm, Condition cond = AL) OVERRIDE;
192 void vldrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE;
193 void vstrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE;
196 void vaddd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
198 void vsubd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
200 void vmuld(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
202 void vmlad(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
204 void vmlsd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
206 void vdivd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE;
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Dassembler_thumb2.cc461 bool Thumb2Assembler::vmovd(DRegister dd, double d_imm, Condition cond) { in vmovd() argument
469 dd, D0, D0); in vmovd()
481 void Thumb2Assembler::vmovd(DRegister dd, DRegister dm, Condition cond) { in vmovd() argument
482 EmitVFPddd(cond, B23 | B21 | B20 | B6, dd, D0, dm); in vmovd()
492 void Thumb2Assembler::vaddd(DRegister dd, DRegister dn, DRegister dm, in vaddd() argument
494 EmitVFPddd(cond, B21 | B20, dd, dn, dm); in vaddd()
504 void Thumb2Assembler::vsubd(DRegister dd, DRegister dn, DRegister dm, in vsubd() argument
506 EmitVFPddd(cond, B21 | B20 | B6, dd, dn, dm); in vsubd()
516 void Thumb2Assembler::vmuld(DRegister dd, DRegister dn, DRegister dm, in vmuld() argument
518 EmitVFPddd(cond, B21, dd, dn, dm); in vmuld()
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Dassembler_arm.h465 virtual void vmovd(DRegister dd, DRegister dm, Condition cond = AL) = 0;
469 virtual bool vmovd(DRegister dd, double d_imm, Condition cond = AL) = 0;
473 virtual void vldrd(DRegister dd, const Address& ad, Condition cond = AL) = 0;
474 virtual void vstrd(DRegister dd, const Address& ad, Condition cond = AL) = 0;
477 virtual void vaddd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) = 0;
479 virtual void vsubd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) = 0;
481 virtual void vmuld(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) = 0;
483 virtual void vmlad(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) = 0;
485 virtual void vmlsd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) = 0;
487 virtual void vdivd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) = 0;
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/art/test/451-spill-splot/src/
DMain.java36 float dd = 3; in main() local
49 System.out.println(aa + bb + cc + dd + ee + ff + gg + hh + ii + jj + kk + ll + mm + nn); in main()
65 dd = computeFloat(); in main()
/art/test/005-annotations/src/android/test/anno/
DAnnoArrayField.java17 double[] dd() default {0.987654321}; in dd() method
DTestAnnotations.java96 dd = {0.3,0.6,0.9},
/art/test/005-annotations/
Dexpected.txt2 …estAnnotations.thing1: @android.test.anno.AnnoArrayField(bb=[], cc=[a, b], dd=[0.987654321], ff=[3…
3 …notations.thing2: @android.test.anno.AnnoArrayField(bb=[-1, 0, 1], cc=[Q], dd=[0.3, 0.6, 0.9], ff=…