| /art/compiler/utils/arm/ |
| D | assembler_thumb2_test.cc | 213 TEST_F(AssemblerThumb2Test, eor) { in TEST_F() argument
215 __ eor(arm::R1, arm::R1, arm::ShifterOperand(arm::R0)); in TEST_F() local
216 __ eor(arm::R1, arm::R0, arm::ShifterOperand(arm::R1)); in TEST_F() local
217 __ eor(arm::R1, arm::R8, arm::ShifterOperand(arm::R0)); in TEST_F() local
218 __ eor(arm::R8, arm::R1, arm::ShifterOperand(arm::R0)); in TEST_F() local
219 __ eor(arm::R1, arm::R0, arm::ShifterOperand(arm::R8)); in TEST_F() local
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| D | assembler_arm32.h | 44 void eor(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
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| D | assembler_arm32_test.cc | 591 T4Helper(&arm::Arm32Assembler::eor, true, "eor{cond} {reg1}, {reg2}, {shift}", "eor"); in TEST_F()
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| D | assembler_thumb2.h | 66 void eor(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
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| D | assembler_arm.h | 353 virtual void eor(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) = 0;
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| D | assembler_arm32.cc | 65 void Arm32Assembler::eor(Register rd, Register rn, const ShifterOperand& so, in eor() function in art::arm::Arm32Assembler
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| D | assembler_thumb2.cc | 60 void Thumb2Assembler::eor(Register rd, Register rn, const ShifterOperand& so, in eor() function in art::arm::Thumb2Assembler
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| /art/runtime/arch/arm64/ |
| D | memcmp16_arm64.S | 53 eor tmp1, src1, src2
66 eor diff, data1, data2 /* Non-zero if differences found. */
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| D | quick_entrypoints_arm64.S | 1021 eor w2, w1, w2 // lock_word.ThreadId() ^ self->ThreadId()
1065 eor w3, w3, w2 // lock_word.ThreadId() ^ self->ThreadId()
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| /art/runtime/arch/arm/ |
| D | memcmp16_arm.S | 91 eor r0, r3, r1
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| D | quick_entrypoints_arm.S | 526 eor r3, r3, r2 @ lock_word.ThreadId() ^ self->ThreadId()
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| /art/compiler/optimizing/ |
| D | intrinsics_arm.cc | 281 __ eor(out_reg_lo, mask, ShifterOperand(out_reg_lo)); in GenAbsInteger() local
282 __ eor(out_reg_hi, mask, ShifterOperand(out_reg_hi)); in GenAbsInteger() local
289 __ eor(out_reg, mask, ShifterOperand(out_reg)); in GenAbsInteger() local
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| D | code_generator_arm.cc | 2694 __ eor(out.AsRegister<Register>(), in.AsRegister<Register>(), ShifterOperand(1)); in VisitBooleanNot() local
4038 __ eor(out, first, ShifterOperand(second)); in HandleBitwiseOperation() local
4061 __ eor(out.AsRegisterPairLow<Register>(), in HandleBitwiseOperation() local
4064 __ eor(out.AsRegisterPairHigh<Register>(), in HandleBitwiseOperation() local
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| /art/compiler/utils/ |
| D | assembler_thumb_test.cc | 219 __ eor(R0, R1, ShifterOperand(R2)); in TEST() local
230 __ eor(R0, R0, ShifterOperand(R1)); in TEST() local
264 __ eor(R0, R1, ShifterOperand(0x55)); in TEST() local
298 __ eor(R0, R1, ShifterOperand(0x550055)); in TEST() local
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| D | assembler_thumb_test_expected.cc.inc | 26 " 10: ea81 0002 eor.w r0, r1, r2\n",
56 " 16: f081 0055 eor.w r0, r1, #85 ; 0x55\n",
78 " 18: f081 1055 eor.w r0, r1, #5570645 ; 0x550055\n",
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| /art/compiler/dex/quick/arm64/ |
| D | int_arm64.cc | 486 uint64_t eor = DecodeLogicalImmediate(/*is_wide*/true, magic_table[lit].magic64_eor); in SmallLiteralDivRem64() local
487 reconstructed_imm = base ^ eor; in SmallLiteralDivRem64()
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