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/art/compiler/linker/arm64/
Drelative_patcher_arm64_test.cc256 auto expected_thunk_code = GenNopsAndAdrpLdr(0u, thunk_offset, target_offset); in TestNopsAdrpInsn2LdrHasThunk() local
257 ASSERT_EQ(expected_thunk_code.size(), 8u); in TestNopsAdrpInsn2LdrHasThunk()
258 expected_thunk_code.erase(expected_thunk_code.begin() + 4u, expected_thunk_code.begin() + 8u); in TestNopsAdrpInsn2LdrHasThunk()
259 InsertInsn(&expected_thunk_code, 4u, b_in); in TestNopsAdrpInsn2LdrHasThunk()
260 ASSERT_EQ(expected_thunk_code.size(), 8u); in TestNopsAdrpInsn2LdrHasThunk()
264 ASSERT_EQ(thunk_size, expected_thunk_code.size()); in TestNopsAdrpInsn2LdrHasThunk()
266 if (ArrayRef<const uint8_t>(expected_thunk_code) != thunk_code) { in TestNopsAdrpInsn2LdrHasThunk()
267 DumpDiff(ArrayRef<const uint8_t>(expected_thunk_code), thunk_code); in TestNopsAdrpInsn2LdrHasThunk()