| /art/compiler/dex/quick/arm64/ |
| D | utility_arm64.cc | 162 static int CountLeadingZeros(bool is_wide, uint64_t value) { in CountLeadingZeros() argument
163 return (is_wide) ? __builtin_clzll(value) : __builtin_clz((uint32_t)value); in CountLeadingZeros()
166 static int CountTrailingZeros(bool is_wide, uint64_t value) { in CountTrailingZeros() argument
167 return (is_wide) ? __builtin_ctzll(value) : __builtin_ctz((uint32_t)value); in CountTrailingZeros()
170 static int CountSetBits(bool is_wide, uint64_t value) { in CountSetBits() argument
171 return ((is_wide) ? in CountSetBits()
184 int Arm64Mir2Lir::EncodeLogicalImmediate(bool is_wide, uint64_t value) { in EncodeLogicalImmediate() argument
209 (!is_wide && (uint32_t)value == ~UINT32_C(0))) { in EncodeLogicalImmediate()
213 unsigned lead_zero = CountLeadingZeros(is_wide, value); in EncodeLogicalImmediate()
214 unsigned lead_one = CountLeadingZeros(is_wide, ~value); in EncodeLogicalImmediate()
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| D | target_arm64.cc | 265 static uint64_t RepeatBitsAcrossReg(bool is_wide, uint64_t value, unsigned width) { in RepeatBitsAcrossReg() argument
267 unsigned reg_size = (is_wide) ? 64 : 32; in RepeatBitsAcrossReg()
284 uint64_t Arm64Mir2Lir::DecodeLogicalImmediate(bool is_wide, int value) { in DecodeLogicalImmediate() argument
316 return RepeatBitsAcrossReg(is_wide, RotateRight(bits, imm_r & mask, width), width); in DecodeLogicalImmediate()
416 bool is_wide = IS_WIDE(lir->opcode); in BuildInsnString() local
417 uint64_t imm = DecodeLogicalImmediate(is_wide, operand); in BuildInsnString()
481 bool is_wide = IS_WIDE(lir->opcode); in BuildInsnString() local
483 snprintf(tbuf, arraysize(tbuf), "%c%d", (is_wide) ? 'x' : 'w', in BuildInsnString()
486 strcpy(tbuf, (is_wide) ? "xzr" : "wzr"); in BuildInsnString()
491 bool is_wide = IS_WIDE(lir->opcode); in BuildInsnString() local
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| D | int_arm64.cc | 115 bool is_wide = rs_dest.Is64Bit(); in GenSelect() local
117 RegStorage zero_reg = is_wide ? rs_xzr : rs_wzr; in GenSelect()
148 if (is_wide) { in GenSelect()
179 NewLIR4(is_wide ? WIDE(opcode) : opcode, rs_dest.GetReg(), left_op.GetReg(), right_op.GetReg(), in GenSelect()
215 bool is_wide = rl_dest.ref || rl_dest.wide; in GenSelect() local
216 int opcode = is_wide ? WIDE(kA64Csel4rrrc) : kA64Csel4rrrc; in GenSelect()
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| D | codegen_arm64.h | 387 int EncodeLogicalImmediate(bool is_wide, uint64_t value);
388 uint64_t DecodeLogicalImmediate(bool is_wide, int value);
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| /art/runtime/quick/ |
| D | inline_method_analyser.h | 131 uint16_t is_wide : 1; member
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| D | inline_method_analyser.cc | 158 data->is_wide = (return_opcode == Instruction::RETURN_WIDE) ? 1u : 0u; in AnalyseReturnMethod()
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| /art/compiler/optimizing/ |
| D | code_generator_x86.h | 180 uint32_t stack_adjustment, bool is_fp, bool is_wide);
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| D | builder.cc | 180 bool is_wide = (parameter->GetType() == Primitive::kPrimLong) in InitializeParameters() local
182 if (is_wide) { in InitializeParameters()
764 bool is_wide = (type == Primitive::kPrimLong) || (type == Primitive::kPrimDouble); in BuildInvoke() local
766 && is_wide in BuildInvoke()
779 if (is_wide) { in BuildInvoke()
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| D | code_generator_x86.cc | 2242 bool is_wide) { in PushOntoFPStack() argument
2244 DCHECK(!is_wide); in PushOntoFPStack()
2251 DCHECK(is_wide); in PushOntoFPStack()
2259 if (!is_wide) { in PushOntoFPStack()
2293 const bool is_wide = !is_float; in GenerateRemFP() local
2294 PushOntoFPStack(second, elem_size, 2 * elem_size, /* is_fp */ true, is_wide); in GenerateRemFP()
2295 PushOntoFPStack(first, 0, 2 * elem_size, /* is_fp */ true, is_wide); in GenerateRemFP()
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| D | code_generator_arm.cc | 2852 bool is_wide = field_type == Primitive::kPrimLong || field_type == Primitive::kPrimDouble; in HandleFieldSet() local
2854 && is_wide in HandleFieldSet()
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| /art/compiler/dex/quick/x86/ |
| D | target_x86.cc | 1987 bool is_wide = opsize == k64 || opsize == kDouble; in GenAddReduceVector() local
1993 if (is_wide) { in GenAddReduceVector()
2138 bool is_wide = false; in GenReduceVector() local
2232 AnnotateDalvikRegAccess(l, displacement >> 2, false /* is_load */, is_wide /* is_64bit */); in GenReduceVector()
2258 bool is_wide = false; in GenSetVector() local
2272 is_wide = true; in GenSetVector()
2294 if (!is_wide) { in GenSetVector()
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| /art/compiler/dex/ |
| D | mir_optimization.cc | 1880 bool is_wide, bool is_sub) { in CombineMultiplyAdd() argument
1881 if (is_wide) { in CombineMultiplyAdd()
1894 add_mir->ssa_rep->num_uses = is_wide ? 6 : 3; in CombineMultiplyAdd()
1897 if (is_wide) { in CombineMultiplyAdd()
1910 if (is_wide) { in CombineMultiplyAdd()
1924 if (is_wide) { in CombineMultiplyAdd()
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| D | mir_graph.h | 1337 bool is_wide, bool is_sub);
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| /art/compiler/dex/quick/ |
| D | dex_file_method_inliner.cc | 874 DCHECK_EQ(data.is_wide, 0u); in GenInlineReturnArg()
877 DCHECK_EQ(data.is_wide, 1u); in GenInlineReturnArg()
886 DCHECK_EQ(data.is_wide, 0u); in GenInlineReturnArg()
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| D | mir_to_lir.cc | 376 bool wide = (data.is_wide != 0u); in GenSpecialIdentity()
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| /art/compiler/dex/quick/mips/ |
| D | utility_mips.cc | 835 void MipsMir2Lir::ForceImplicitNullCheck(RegStorage reg, int opt_flags, bool is_wide) { in ForceImplicitNullCheck() argument
844 if (is_wide) { in ForceImplicitNullCheck()
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| D | codegen_mips.h | 82 void ForceImplicitNullCheck(RegStorage reg, int opt_flags, bool is_wide);
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