| /art/compiler/optimizing/ |
| D | bounds_check_elimination.cc | 46 static bool WouldAddOverflowOrUnderflow(int32_t left, int32_t right) { in WouldAddOverflowOrUnderflow() argument
50 if ((right > 0) && (left <= INT_MAX - right)) { in WouldAddOverflowOrUnderflow()
54 if ((right < 0) && (left >= INT_MIN - right)) { in WouldAddOverflowOrUnderflow()
66 HInstruction* left = bin_op->GetLeft(); in IsAddOrSubAConstant() local
69 *left_instruction = left; in IsAddOrSubAConstant()
94 HInstruction *left; in DetectValueBoundFromValue() local
96 if (IsAddOrSubAConstant(instruction, &left, &right)) { in DetectValueBoundFromValue()
97 if (left->IsArrayLength()) { in DetectValueBoundFromValue()
99 return ValueBound(left, right); in DetectValueBoundFromValue()
366 HInstruction* left = index; in Run() local
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| D | instruction_simplifier.cc | 327 HInstruction* left = instruction->GetLeft(); in VisitAdd() local
329 bool left_is_neg = left->IsNeg(); in VisitAdd()
338 HNeg* neg = left_is_neg ? left->AsNeg() : right->AsNeg(); in VisitAdd()
349 HInstruction* other = left_is_neg ? right : left; in VisitAdd()
635 HInstruction* left = instruction->GetLeft(); in VisitSub() local
637 if (left->IsConstant()) { in VisitSub()
638 if (Int64FromConstant(left->AsConstant()) == 0) { in VisitSub()
653 if (left->IsNeg() && right->IsNeg()) { in VisitSub()
665 HAdd* add = new(GetGraph()->GetArena()) HAdd(type, left, right->AsNeg()->GetInput()); in VisitSub()
672 if (left->IsNeg() && left->HasOnlyOneNonEnvironmentUse()) { in VisitSub()
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| D | constant_folding.cc | 88 HInstruction* left = instruction->GetLeft(); in VisitShift() local
89 if (left->IsConstant() && left->AsConstant()->IsZero()) { in VisitShift()
94 instruction->ReplaceWith(left); in VisitShift()
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| D | nodes.h | 1864 HInstruction* left, in HBinaryOperation() argument
1866 SetRawInputAt(0, left); in HBinaryOperation()
1879 HInstruction* left = InputAt(0); in OrderInputsWithConstantOnTheRight() local
1881 if (left->IsConstant() && !right->IsConstant()) { in OrderInputsWithConstantOnTheRight()
1883 ReplaceInput(left, 1); in OrderInputsWithConstantOnTheRight()
1893 HInstruction* left = InputAt(0); in OrderInputs() local
1895 if (left == right || (!left->IsConstant() && right->IsConstant())) { in OrderInputs()
1902 if (left->GetId() > right->GetId()) { in OrderInputs()
1904 ReplaceInput(left, 1); in OrderInputs()
2690 HAdd(Primitive::Type result_type, HInstruction* left, HInstruction* right) in HAdd() argument
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| D | ssa_builder.cc | 185 HInstruction* left = equality_instr->InputAt(0); in FixNullConstantType() local
189 if ((left->GetType() == Primitive::kPrimNot) && (right->GetType() == Primitive::kPrimInt)) { in FixNullConstantType()
192 && (left->GetType() == Primitive::kPrimInt)) { in FixNullConstantType()
193 int_operand = left; in FixNullConstantType()
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| D | code_generator_arm.cc | 964 Register left = locations->InAt(0).AsRegister<Register>(); in GenerateTestAndBranch() local
966 __ cmp(left, ShifterOperand(locations->InAt(1).AsRegister<Register>())); in GenerateTestAndBranch()
972 if (GetAssembler()->ShifterOperandCanHold(R0, left, CMP, value, &operand)) { in GenerateTestAndBranch()
973 __ cmp(left, operand); in GenerateTestAndBranch()
977 __ cmp(left, ShifterOperand(temp)); in GenerateTestAndBranch()
1043 Register left = locations->InAt(0).AsRegister<Register>(); in VisitCondition() local
1046 __ cmp(left, ShifterOperand(locations->InAt(1).AsRegister<Register>())); in VisitCondition()
1051 if (GetAssembler()->ShifterOperandCanHold(R0, left, CMP, value, &operand)) { in VisitCondition()
1052 __ cmp(left, operand); in VisitCondition()
1056 __ cmp(left, ShifterOperand(temp)); in VisitCondition()
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| D | code_generator_arm64.cc | 1533 Register left = InputRegisterAt(compare, 0); in VisitCompare() local
1536 __ Cmp(left, right); in VisitCompare()
1544 FPRegister left = InputFPRegisterAt(compare, 0); in VisitCompare() local
1552 __ Fcmp(left, 0.0); in VisitCompare()
1554 __ Fcmp(left, InputFPRegisterAt(compare, 1)); in VisitCompare()
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| D | code_generator_x86.cc | 3084 Location left = locations->InAt(0); in VisitCompare() local
3090 Register left_low = left.AsRegisterPairLow<Register>(); in VisitCompare()
3091 Register left_high = left.AsRegisterPairHigh<Register>(); in VisitCompare()
3133 __ ucomiss(left.AsFpuRegister<XmmRegister>(), right.AsFpuRegister<XmmRegister>()); in VisitCompare()
3138 __ ucomisd(left.AsFpuRegister<XmmRegister>(), right.AsFpuRegister<XmmRegister>()); in VisitCompare()
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| D | code_generator_x86_64.cc | 1055 Location left = locations->InAt(0); in VisitCompare() local
1062 CpuRegister left_reg = left.AsRegister<CpuRegister>(); in VisitCompare()
1083 XmmRegister left_reg = left.AsFpuRegister<XmmRegister>(); in VisitCompare()
1096 XmmRegister left_reg = left.AsFpuRegister<XmmRegister>(); in VisitCompare()
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| /art/runtime/gc/space/ |
| D | region_space-inl.h | 283 size_t left = 0; in AllocLarge() local
284 while (left + num_regs - 1 < num_regions_) { in AllocLarge()
286 size_t right = left; in AllocLarge()
287 DCHECK_LT(right, left + num_regs) in AllocLarge()
289 while (right < left + num_regs) { in AllocLarge()
299 DCHECK_EQ(left + num_regs, right); in AllocLarge()
300 Region* first_reg = ®ions_[left]; in AllocLarge()
305 for (size_t p = left + 1; p < right; ++p) { in AllocLarge()
319 left = right + 1; in AllocLarge()
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| /art/cmdline/detail/ |
| D | cmdline_parser_detail.h | 55 static std::true_type EqualityOperatorTest(const TL& left, const TR& right,
56 … std::remove_reference<decltype(left == right)>* = 0); // NOLINT [whitespace/operators] [3]
59 static std::false_type EqualityOperatorTest(const TL& left, const T& ... args);
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| /art/runtime/base/ |
| D | bit_vector.cc | 308 uint32_t left = storage_size_ - size; in Copy() local
310 if (left > 0) { in Copy()
311 memset(storage_ + size, 0, kWordBytes * left); in Copy()
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| /art/runtime/verifier/ |
| D | reg_type_cache.cc | 319 const RegType& RegTypeCache::FromUnresolvedMerge(const RegType& left, const RegType& right) { in FromUnresolvedMerge() argument
324 if (left.IsUnresolvedMergedReference()) { in FromUnresolvedMerge()
325 const UnresolvedMergedType* left_merge = down_cast<const UnresolvedMergedType*>(&left); in FromUnresolvedMerge()
328 } else if (left.IsUnresolvedTypes()) { in FromUnresolvedMerge()
329 types.SetBit(left.GetId()); in FromUnresolvedMerge()
332 left_resolved = &left; in FromUnresolvedMerge()
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| D | reg_type_cache.h | 67 const RegType& FromUnresolvedMerge(const RegType& left, const RegType& right)
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| /art/runtime/arch/mips64/ |
| D | quick_entrypoints_mips64.S | 647 dsll $t3, $t3, 4 # shift the frame size left 4 to align to 16 bytes
750 dsll $t3, $t3, 4 # shift the frame size left 4 to align to 16 bytes
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| /art/compiler/dex/quick/arm64/ |
| D | codegen_arm64.h | 392 void GenSelect(int32_t left, int32_t right, ConditionCode code, RegStorage rs_dest,
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