Searched refs:op4 (Results 1 – 4 of 4) sorted by relevance
| /art/disassembler/ |
| D | disassembler_arm.cc | 539 uint32_t op4 = (instr >> 20) & 3; in DumpThumb32() local
550 if ((op4 & 1) == 1) { in DumpThumb32()
566 switch (op4) { in DumpThumb32()
641 if (op4 == 2) { in DumpThumb32()
799 uint32_t op4 = (instr >> 4) & 0x1; in DumpThumb32() local
864 } else if ((op3 >> 4) == 2 && op4 == 0) { // 10xxxx, op = 0 in DumpThumb32()
998 } else if ((op3 >> 4) == 2 && op4 == 1) { // 10xxxx, op = 1 in DumpThumb32()
1354 uint32_t op4 = (instr >> 8) & 0xF; // 1PUW for imm8 in DumpThumb32() local
1371 } else if (op4 == 0xC) { in DumpThumb32()
1409 } else if (is_word && Rn.r == SP && imm8 == 4 && op4 == (is_load ? 0xB : 0xD)) { in DumpThumb32()
[all …]
|
| /art/compiler/dex/quick/x86/ |
| D | quick_assemble_x86_test.cc | 138 int opcode, int op0 = 0, int op1 = 0, int op2 = 0, int op3 = 0, int op4 = 0) { in Test() argument
148 lir.operands[4] = op4; in Test()
|
| /art/compiler/dex/quick/ |
| D | mir_to_lir-inl.h | 47 int op1, int op2, int op3, int op4, LIR* target) { in RawLIR() argument
55 insn->operands[4] = op4; in RawLIR()
|
| D | mir_to_lir.h | 654 int op2 = 0, int op3 = 0, int op4 = 0, LIR* target = nullptr);
|