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Searched refs:orr (Results 1 – 12 of 12) sorted by relevance

/art/runtime/arch/arm64/
Dmemcmp16_arm64.S120 orr data1, data1, tmp2
121 orr data2, data2, tmp2
Dquick_entrypoints_arm64.S1013orr x2, x1, x2 // x2 holds thread id with count of 0 with preserved read barrie…
/art/runtime/arch/arm/
Dmemcmp16_arm.S202 orr ip, ip, lr, lsl #16
/art/compiler/utils/
Dassembler_thumb_test.cc218 __ orr(R0, R1, ShifterOperand(R2)); in TEST() local
229 __ orr(R0, R0, ShifterOperand(R1)); in TEST() local
263 __ orr(R0, R1, ShifterOperand(0x55)); in TEST() local
297 __ orr(R0, R1, ShifterOperand(0x550055)); in TEST() local
Dassembler_thumb_test_expected.cc.inc25 " c: ea41 0002 orr.w r0, r1, r2\n",
55 " 12: f041 0055 orr.w r0, r1, #85 ; 0x55\n",
77 " 14: f041 1055 orr.w r0, r1, #5570645 ; 0x550055\n",
/art/compiler/optimizing/
Dcode_generator_arm.cc2535 __ orr(o_h, o_h, ShifterOperand(temp)); in HandleShift() local
2549 __ orr(o_l, o_l, ShifterOperand(temp)); in HandleShift() local
2562 __ orr(o_l, o_l, ShifterOperand(temp)); in HandleShift() local
4035 __ orr(out, first, ShifterOperand(second)); in HandleBitwiseOperation() local
4053 __ orr(out.AsRegisterPairLow<Register>(), in HandleBitwiseOperation() local
4056 __ orr(out.AsRegisterPairHigh<Register>(), in HandleBitwiseOperation() local
/art/compiler/utils/arm/
Dassembler_arm32.h70 void orr(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
Dassembler_arm32_test.cc595 T4Helper(&arm::Arm32Assembler::orr, true, "orr{cond} {reg1}, {reg2}, {shift}", "orr"); in TEST_F()
Dassembler_thumb2.h92 void orr(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE;
Dassembler_arm.h379 virtual void orr(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) = 0;
Dassembler_arm32.cc145 void Arm32Assembler::orr(Register rd, Register rn, in orr() function in art::arm::Arm32Assembler
Dassembler_thumb2.cc142 void Thumb2Assembler::orr(Register rd, Register rn, in orr() function in art::arm::Thumb2Assembler